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Cal STAR — firmware, DAQ server, and engine design
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dev_h3lis100dl.h
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1#ifndef STAR_DEV_H3LIS100DL_H
2#define STAR_DEV_H3LIS100DL_H
3
4/*
5 * H3LIS100DL high-g accelerometer (U3), SPI mode 3. Datasheet DocID027504
6 * Rev 2. Note: the rev 1 schematic/BOM say H3LIS331DLTR; the assembled board
7 * carries the H3LIS100DLTR (Inez, 2026-11-04).
8 *
9 * Configuration (page numbers in DocID027504):
10 * CTRL_REG1 0x37 PM = 001 normal mode, DR = 10 400 Hz, X/Y/Z on (p.25-26)
11 * CTRL_REG3 0x02 INT1 = data ready, active high, push-pull (p.28)
12 * CTRL_REG4 0x00 4-wire SPI (p.28)
13 * Output: 8-bit two's complement OUT_X/Y/Z at 29h/2Bh/2Dh (p.30),
14 * 780 mg/digit, fixed +-100 g (p.9).
15 *
16 * The data-ready line is a level, not a pulse: it stays high until the data
17 * is read, so a missed read would leave a rising-edge interrupt silent. The
18 * caller must also read on a timeout (see sensors_core).
19 */
20
21#include <stdint.h>
22
23#include "dev_bus.h"
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
29#define H3LIS_WHO_AM_I_VALUE 0x32U
30#define H3LIS_MG_PER_DIGIT 780
31
32typedef struct {
33 int8_t accel[3]; /* raw x, y, z; g = raw * 0.78 */
35
36/* Identify, configure and verify. */
37int h3lis_init(const dev_bus_t* bus);
38
39/* Power-down (Idle): CTRL_REG1 PM = 000 (Table 18 p.25), axes left on:
40 * 0x07, the power-on value (p.24). h3lis_init() wakes it again. */
41int h3lis_power_down(const dev_bus_t* bus);
42
43/* One 5-byte burst from OUT_X (29h) with auto-increment. */
44int h3lis_read(const dev_bus_t* bus, h3lis_sample_t* out);
45
46#ifdef __cplusplus
47}
48#endif
49#endif
int h3lis_power_down(const dev_bus_t *bus)
int h3lis_read(const dev_bus_t *bus, h3lis_sample_t *out)
int h3lis_init(const dev_bus_t *bus)