STAR
Cal STAR — firmware, DAQ server, and engine design
Loading...
Searching...
No Matches
FLASHEx Private macros to check input parameters
Collaboration diagram for FLASHEx Private macros to check input parameters:

Macros

#define IS_FLASH_TYPEERASE(VALUE)
#define IS_WRPSTATE(VALUE)
#define IS_OPTIONBYTE(VALUE)
#define IS_OB_BOOT_ADDRESS(ADDRESS)
#define IS_OB_RDP_LEVEL(LEVEL)
#define IS_OB_IWDG_SOURCE(SOURCE)
#define IS_OB_STOP_SOURCE(SOURCE)
#define IS_OB_STDBY_SOURCE(SOURCE)
#define IS_OB_IWDG_STOP_FREEZE(FREEZE)
#define IS_OB_IWDG_STDBY_FREEZE(FREEZE)
#define IS_OB_BOR_LEVEL(LEVEL)
#define IS_FLASH_LATENCY(LATENCY)
#define IS_FLASH_SECTOR(SECTOR)
#define IS_OB_WRP_SECTOR(SECTOR)
#define IS_OB_PCROP_RDP(CONFIG)
#define IS_OB_SECURE_RDP(CONFIG)
#define IS_OB_USER_IOHSLV(VALUE)
#define IS_OB_IWDG1_SOURCE(SOURCE)
#define IS_OB_STOP_D1_RESET(VALUE)
#define IS_OB_STDBY_D1_RESET(VALUE)
#define IS_OB_USER_IWDG_STOP(VALUE)
#define IS_OB_USER_IWDG_STDBY(VALUE)
#define IS_OB_USER_ST_RAM_SIZE(VALUE)
#define IS_OB_USER_SECURITY(VALUE)
#define IS_OB_USER_TYPE(TYPE)
#define IS_OB_BOOT_ADD_OPTION(VALUE)
#define IS_FLASH_TYPECRC(VALUE)

Detailed Description

Macro Definition Documentation

◆ IS_FLASH_LATENCY

#define IS_FLASH_LATENCY ( LATENCY)
Value:
(((LATENCY) == FLASH_LATENCY_0) || \
((LATENCY) == FLASH_LATENCY_1) || \
((LATENCY) == FLASH_LATENCY_2) || \
((LATENCY) == FLASH_LATENCY_3) || \
((LATENCY) == FLASH_LATENCY_4) || \
((LATENCY) == FLASH_LATENCY_5) || \
((LATENCY) == FLASH_LATENCY_6) || \
((LATENCY) == FLASH_LATENCY_7) || \
((LATENCY) == FLASH_LATENCY_8) || \
((LATENCY) == FLASH_LATENCY_9) || \
((LATENCY) == FLASH_LATENCY_10) || \
((LATENCY) == FLASH_LATENCY_11) || \
((LATENCY) == FLASH_LATENCY_12) || \
((LATENCY) == FLASH_LATENCY_13) || \
((LATENCY) == FLASH_LATENCY_14) || \
((LATENCY) == FLASH_LATENCY_15))
#define FLASH_LATENCY_7
FLASH Seven Latency cycles.
#define FLASH_LATENCY_0
FLASH Zero Latency cycle.
#define FLASH_LATENCY_15
FLASH Fifteen Latency cycles.
#define FLASH_LATENCY_12
FLASH Twelve Latency cycles.
#define FLASH_LATENCY_11
FLASH Eleven Latency cycles.
#define FLASH_LATENCY_5
FLASH Five Latency cycles.
#define FLASH_LATENCY_1
FLASH One Latency cycle.
#define FLASH_LATENCY_3
FLASH Three Latency cycles.
#define FLASH_LATENCY_13
FLASH Thirteen Latency cycles.
#define FLASH_LATENCY_8
FLASH Eight Latency cycle.
#define FLASH_LATENCY_4
FLASH Four Latency cycles.
#define FLASH_LATENCY_2
FLASH Two Latency cycles.
#define FLASH_LATENCY_10
FLASH Ten Latency cycles.
#define FLASH_LATENCY_9
FLASH Nine Latency cycle.
#define FLASH_LATENCY_6
FLASH Six Latency cycles.
#define FLASH_LATENCY_14
FLASH Fourteen Latency cycles.

Definition at line 948 of file stm32h7xx_hal_flash_ex.h.

◆ IS_FLASH_SECTOR

#define IS_FLASH_SECTOR ( SECTOR)
Value:
((SECTOR) < FLASH_SECTOR_TOTAL)
#define FLASH_SECTOR_TOTAL

Definition at line 965 of file stm32h7xx_hal_flash_ex.h.

◆ IS_FLASH_TYPECRC

#define IS_FLASH_TYPECRC ( VALUE)
Value:
(((VALUE) == FLASH_CRC_ADDR) || \
((VALUE) == FLASH_CRC_SECTORS) || \
((VALUE) == FLASH_CRC_BANK))
#define FLASH_CRC_BANK
CRC selection type by bank.
#define FLASH_CRC_SECTORS
CRC selection type by sectors.
#define FLASH_CRC_ADDR
CRC selection type by address.

Definition at line 1034 of file stm32h7xx_hal_flash_ex.h.

◆ IS_FLASH_TYPEERASE

#define IS_FLASH_TYPEERASE ( VALUE)
Value:
(((VALUE) == FLASH_TYPEERASE_SECTORS) || \
#define FLASH_TYPEERASE_MASSERASE
Flash Mass erase activation.
#define FLASH_TYPEERASE_SECTORS
Sectors erase only.

Definition at line 913 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_BOOT_ADD_OPTION

#define IS_OB_BOOT_ADD_OPTION ( VALUE)
Value:
(((VALUE) == OB_BOOT_ADD0) || \
((VALUE) == OB_BOOT_ADD1) || \
((VALUE) == OB_BOOT_ADD_BOTH))
#define OB_BOOT_ADD1
Select Boot Address 1.
#define OB_BOOT_ADD0
Select Boot Address 0.
#define OB_BOOT_ADD_BOTH
Select Boot Address 0 and 1.

Definition at line 1030 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_BOOT_ADDRESS

#define IS_OB_BOOT_ADDRESS ( ADDRESS)
Value:
((ADDRESS) <= 0x8013U)

Definition at line 929 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_BOR_LEVEL

#define IS_OB_BOR_LEVEL ( LEVEL)
Value:
(((LEVEL) == OB_BOR_LEVEL0) || ((LEVEL) == OB_BOR_LEVEL1) || \
((LEVEL) == OB_BOR_LEVEL2) || ((LEVEL) == OB_BOR_LEVEL3))
#define OB_BOR_LEVEL0
Reset level threshold is set to 1.6V.
#define OB_BOR_LEVEL3
Reset level threshold is set to 2.7V.
#define OB_BOR_LEVEL1
Reset level threshold is set to 2.1V.
#define OB_BOR_LEVEL2
Reset level threshold is set to 2.4V.

Definition at line 945 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_IWDG1_SOURCE

#define IS_OB_IWDG1_SOURCE ( SOURCE)
Value:
(((SOURCE) == OB_IWDG1_SW) || ((SOURCE) == OB_IWDG1_HW))
#define OB_IWDG1_HW
Software independent watchdog 1.
#define OB_IWDG1_SW
Hardware independent watchdog 1.

Definition at line 989 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_IWDG_SOURCE

#define IS_OB_IWDG_SOURCE ( SOURCE)
Value:
(((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
#define OB_IWDG_SW
Software IWDG selected.
#define OB_IWDG_HW
Hardware IWDG selected.

Definition at line 935 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_IWDG_STDBY_FREEZE

#define IS_OB_IWDG_STDBY_FREEZE ( FREEZE)
Value:
(((FREEZE) == OB_IWDG_STDBY_FREEZE) || ((FREEZE) == OB_IWDG_STDBY_ACTIVE))
#define OB_IWDG_STDBY_FREEZE
Freeze IWDG counter in STANDBY mode.
#define OB_IWDG_STDBY_ACTIVE
IWDG counter active in STANDBY mode.

Definition at line 943 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_IWDG_STOP_FREEZE

#define IS_OB_IWDG_STOP_FREEZE ( FREEZE)
Value:
(((FREEZE) == OB_IWDG_STOP_FREEZE) || ((FREEZE) == OB_IWDG_STOP_ACTIVE))
#define OB_IWDG_STOP_ACTIVE
IWDG counter active in STOP mode.
#define OB_IWDG_STOP_FREEZE
Freeze IWDG counter in STOP mode.

Definition at line 941 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_PCROP_RDP

#define IS_OB_PCROP_RDP ( CONFIG)
Value:
(((CONFIG) == OB_PCROP_RDP_NOT_ERASE) || \
((CONFIG) == OB_PCROP_RDP_ERASE))
#define OB_PCROP_RDP_NOT_ERASE
PCROP area is not erased when the RDP level is decreased from Level 1 to Level 0 or during a mass era...
#define OB_PCROP_RDP_ERASE
PCROP area is erased when the RDP level is decreased from Level 1 to Level 0 (full mass erase).

Definition at line 973 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_RDP_LEVEL

#define IS_OB_RDP_LEVEL ( LEVEL)
Value:
(((LEVEL) == OB_RDP_LEVEL_0) ||\
((LEVEL) == OB_RDP_LEVEL_1) ||\
((LEVEL) == OB_RDP_LEVEL_2))
#define OB_RDP_LEVEL_2
Warning: When enabling read protection level 2 it s no more possible to go back to level 1 or 0.
#define OB_RDP_LEVEL_0
#define OB_RDP_LEVEL_1

Definition at line 931 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_SECURE_RDP

#define IS_OB_SECURE_RDP ( CONFIG)
Value:
(((CONFIG) == OB_SECURE_RDP_NOT_ERASE) || \
((CONFIG) == OB_SECURE_RDP_ERASE))
#define OB_SECURE_RDP_NOT_ERASE
Secure area is not erased when the RDP level is decreased from Level 1 to Level 0 or during a mass er...
#define OB_SECURE_RDP_ERASE
Secure area is erased when the RDP level is decreased from Level 1 to Level 0 (full mass erase).

Definition at line 976 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_STDBY_D1_RESET

#define IS_OB_STDBY_D1_RESET ( VALUE)
Value:
(((VALUE) == OB_STDBY_NO_RST_D1) || ((VALUE) == OB_STDBY_RST_D1))
#define OB_STDBY_NO_RST_D1
No reset generated when entering the D1 to standby mode.
#define OB_STDBY_RST_D1
Reset generated when entering the D1 to standby mode.

Definition at line 995 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_STDBY_SOURCE

#define IS_OB_STDBY_SOURCE ( SOURCE)
Value:
(((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST))
#define OB_STDBY_RST
Reset generated when entering in STANDBY.
#define OB_STDBY_NO_RST
No reset generated when entering in STANDBY.

Definition at line 939 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_STOP_D1_RESET

#define IS_OB_STOP_D1_RESET ( VALUE)
Value:
(((VALUE) == OB_STOP_NO_RST_D1) || ((VALUE) == OB_STOP_RST_D1))
#define OB_STOP_NO_RST_D1
No reset generated when entering the D1 to stop mode.
#define OB_STOP_RST_D1
Reset generated when entering the D1 to stop mode.

Definition at line 993 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_STOP_SOURCE

#define IS_OB_STOP_SOURCE ( SOURCE)
Value:
(((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST))
#define OB_STOP_NO_RST
No reset generated when entering in STOP.
#define OB_STOP_RST
Reset generated when entering in STOP.

Definition at line 937 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_USER_IOHSLV

#define IS_OB_USER_IOHSLV ( VALUE)
Value:
(((VALUE) == OB_IOHSLV_DISABLE) || ((VALUE) == OB_IOHSLV_ENABLE))
#define OB_IOHSLV_ENABLE
IOHSLV enabled.
#define OB_IOHSLV_DISABLE
IOHSLV disabled.

Definition at line 983 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_USER_IWDG_STDBY

#define IS_OB_USER_IWDG_STDBY ( VALUE)
Value:
(((VALUE) == OB_IWDG_STDBY_FREEZE) || ((VALUE) == OB_IWDG_STDBY_ACTIVE))

Definition at line 999 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_USER_IWDG_STOP

#define IS_OB_USER_IWDG_STOP ( VALUE)
Value:
(((VALUE) == OB_IWDG_STOP_FREEZE) || ((VALUE) == OB_IWDG_STOP_ACTIVE))

Definition at line 997 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_USER_SECURITY

#define IS_OB_USER_SECURITY ( VALUE)
Value:
(((VALUE) == OB_SECURITY_ENABLE) || ((VALUE) == OB_SECURITY_DISABLE))
#define OB_SECURITY_ENABLE
security disabled
#define OB_SECURITY_DISABLE
security enabled

Definition at line 1004 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_USER_ST_RAM_SIZE

#define IS_OB_USER_ST_RAM_SIZE ( VALUE)
Value:
(((VALUE) == OB_ST_RAM_SIZE_2KB) || ((VALUE) == OB_ST_RAM_SIZE_4KB) || \
((VALUE) == OB_ST_RAM_SIZE_8KB) || ((VALUE) == OB_ST_RAM_SIZE_16KB))
#define OB_ST_RAM_SIZE_2KB
2 Kbytes reserved to ST code
#define OB_ST_RAM_SIZE_8KB
8 Kbytes reserved to ST code
#define OB_ST_RAM_SIZE_16KB
16 Kbytes reserved to ST code
#define OB_ST_RAM_SIZE_4KB
4 Kbytes reserved to ST code

Definition at line 1001 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_USER_TYPE

#define IS_OB_USER_TYPE ( TYPE)
Value:
((((TYPE) & OB_USER_ALL) != 0U) && \
(((TYPE) & ~OB_USER_ALL) == 0U))
#define OB_USER_ALL

Definition at line 1027 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OB_WRP_SECTOR

#define IS_OB_WRP_SECTOR ( SECTOR)
Value:
((SECTOR) != 0x00000000U)

Definition at line 970 of file stm32h7xx_hal_flash_ex.h.

◆ IS_OPTIONBYTE

#define IS_OPTIONBYTE ( VALUE)
Value:
((((VALUE) & OPTIONBYTE_ALL) != 0U) && \
(((VALUE) & ~OPTIONBYTE_ALL) == 0U))
#define OPTIONBYTE_ALL
All option byte configuration.

Definition at line 926 of file stm32h7xx_hal_flash_ex.h.

◆ IS_WRPSTATE

#define IS_WRPSTATE ( VALUE)
Value:
(((VALUE) == OB_WRPSTATE_DISABLE) || \
((VALUE) == OB_WRPSTATE_ENABLE))
#define OB_WRPSTATE_ENABLE
Enable the write protection of the desired bank 1 sectors.
#define OB_WRPSTATE_DISABLE
Disable the write protection of the desired bank 1 sectors.

Definition at line 923 of file stm32h7xx_hal_flash_ex.h.