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PWR Exported Macro
Collaboration diagram for PWR Exported Macro:

Macros

#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__)
 Configure the main internal regulator output voltage.
#define __HAL_PWR_GET_FLAG(__FLAG__)
 Check PWR flags are set or not.
#define __HAL_PWR_GET_WAKEUPFLAG(__FLAG__)
 Check PWR wake up flags are set or not.
#define __HAL_PWR_CLEAR_FLAG(__FLAG__)
 Clear CPU PWR flags.
#define __HAL_PWR_CLEAR_WAKEUPFLAG(__FLAG__)
 Clear PWR wake up flags.
#define __HAL_PWR_PVD_EXTI_ENABLE_IT()
 Enable the PVD EXTI Line 16.
#define __HAL_PWR_PVD_EXTI_DISABLE_IT()
 Disable the PVD EXTI Line 16.
#define __HAL_PWR_PVD_EXTI_ENABLE_EVENT()
 Enable event on PVD EXTI Line 16.
#define __HAL_PWR_PVD_EXTI_DISABLE_EVENT()
 Disable event on PVD EXTI Line 16.
#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE()
 Enable the PVD Rising Interrupt Trigger.
#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE()
 Disable the PVD Rising Interrupt Trigger.
#define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE()
 Enable the PVD Falling Interrupt Trigger.
#define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()
 Disable the PVD Falling Interrupt Trigger.
#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE()
 Enable the PVD Rising & Falling Interrupt Trigger.
#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE()
 Disable the PVD Rising & Falling Interrupt Trigger.
#define __HAL_PWR_PVD_EXTI_GET_FLAG()
 Check whether the specified PVD EXTI interrupt flag is set or not.
#define __HAL_PWR_PVD_EXTI_CLEAR_FLAG()
 Clear the PVD EXTI flag.
#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT()
 Generates a Software interrupt on PVD EXTI line.

Detailed Description

Macro Definition Documentation

◆ __HAL_PWR_CLEAR_FLAG

#define __HAL_PWR_CLEAR_FLAG ( __FLAG__)
Value:
#define SET_BIT(REG, BIT)
Definition stm32h7xx.h:207
#define PWR_CPUCR_CSSF
Clear D1 domain CPU1 STANDBY, STOP and HOLD flags.
#define PWR

Clear CPU PWR flags.

Parameters
__FLAG__: Specifies the flag to clear.
Note
This parameter is not used for the STM32H7 family and is kept as parameter just to maintain compatibility with other families.
This macro clear all CPU flags. For single core devices except STM32H7Axxx and STM32H7Bxxx, CPU flags are STOPF, SBF, SBF_D1 and SBF_D2. For STM32H7Axxx and STM32H7Bxxx lines, CPU flags are STOPF and SBF.
Return values
None.

Definition at line 516 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_CLEAR_WAKEUPFLAG

#define __HAL_PWR_CLEAR_WAKEUPFLAG ( __FLAG__)
Value:
SET_BIT(PWR->WKUPCR, (__FLAG__))

Clear PWR wake up flags.

Parameters
__FLAG__: Specifies the wake up flag to be cleared. This parameter can be one of the following values :
  • PWR_FLAG_WKUP1 : This parameter clear Wake up line 1 flag.
  • PWR_FLAG_WKUP2 : This parameter clear Wake up line 2 flag.
  • PWR_FLAG_WKUP3 : This parameter clear Wake up line 3 flag.
  • PWR_FLAG_WKUP4 : This parameter clear Wake up line 4 flag.
  • PWR_FLAG_WKUP5 : This parameter clear Wake up line 5 flag.
  • PWR_FLAG_WKUP6 : This parameter clear Wake up line 6 flag.
Note
The PWR_FLAG_WKUP3 and PWR_FLAG_WKUP5 are available only for devices that support GPIOI port.
Return values
None.

Definition at line 532 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_GET_FLAG

#define __HAL_PWR_GET_FLAG ( __FLAG__)
Value:
(((__FLAG__) == PWR_FLAG_PVDO) ? ((PWR->CSR1 & PWR_CSR1_PVDO) == PWR_CSR1_PVDO) :\
((__FLAG__) == PWR_FLAG_AVDO) ? ((PWR->CSR1 & PWR_CSR1_AVDO) == PWR_CSR1_AVDO) :\
((__FLAG__) == PWR_FLAG_ACTVOSRDY) ? ((PWR->CSR1 & PWR_CSR1_ACTVOSRDY) == PWR_CSR1_ACTVOSRDY) :\
((__FLAG__) == PWR_FLAG_BRR) ? ((PWR->CR2 & PWR_CR2_BRRDY) == PWR_CR2_BRRDY) :\
((__FLAG__) == PWR_FLAG_VOSRDY) ? ((PWR->SRDCR & PWR_SRDCR_VOSRDY) == PWR_SRDCR_VOSRDY) :\
((__FLAG__) == PWR_FLAG_SCUEN) ? ((PWR->CR3 & PWR_CR3_SCUEN) == PWR_CR3_SCUEN) :\
((__FLAG__) == PWR_FLAG_STOP) ? ((PWR->CPUCR & PWR_CPUCR_STOPF) == PWR_CPUCR_STOPF) :\
((__FLAG__) == PWR_FLAG_SB) ? ((PWR->CPUCR & PWR_CPUCR_SBF) == PWR_CPUCR_SBF) :\
((__FLAG__) == PWR_FLAG_MMCVDO) ? ((PWR->CSR1 & PWR_CSR1_MMCVDO) == PWR_CSR1_MMCVDO) :\
((__FLAG__) == PWR_FLAG_USB33RDY) ? ((PWR->CR3 & PWR_CR3_USB33RDY) == PWR_CR3_USB33RDY) :\
((__FLAG__) == PWR_FLAG_TEMPH) ? ((PWR->CR2 & PWR_CR2_TEMPH) == PWR_CR2_TEMPH) :\
((__FLAG__) == PWR_FLAG_TEMPL) ? ((PWR->CR2 & PWR_CR2_TEMPL) == PWR_CR2_TEMPL) :\
((__FLAG__) == PWR_FLAG_VBATH) ? ((PWR->CR2 & PWR_CR2_VBATH) == PWR_CR2_VBATH) :\
#define PWR_FLAG_SCUEN
#define PWR_FLAG_TEMPH
#define PWR_FLAG_BRR
#define PWR_FLAG_STOP
#define PWR_FLAG_ACTVOSRDY
#define PWR_FLAG_VOSRDY
#define PWR_FLAG_VBATH
#define PWR_FLAG_AVDO
#define PWR_FLAG_SB
#define PWR_FLAG_TEMPL
#define PWR_FLAG_PVDO
#define PWR_FLAG_USB33RDY
#define PWR_CSR1_AVDO
Analog Voltage Detect Output.
#define PWR_CR2_TEMPL
Monitored temperature level above low threshold.
#define PWR_CR2_VBATL
Monitored VBAT level above low threshold.
#define PWR_CPUCR_STOPF
STOP Flag.
#define PWR_CPUCR_SBF
System STANDBY Flag.
#define PWR_CR3_USB33RDY
USB supply ready.
#define PWR_CSR1_ACTVOSRDY
Ready bit for current actual used VOS for VDD11 Voltage Scaling.
#define PWR_CR2_VBATH
Monitored VBAT level above high threshold.
#define PWR_CR2_TEMPH
Monitored temperature level above high threshold.
#define PWR_CR2_BRRDY
Backup regulator ready.
#define PWR_CSR1_PVDO
Programmable Voltage Detect Output.
#define PWR_CR3_SCUEN
Supply configuration update enable.

Check PWR flags are set or not.

Parameters
__FLAG__: Specifies the flag to check. This parameter can be one of the following values:
  • PWR_FLAG_PVDO : PVD Output. This flag is valid only if PVD is enabled by the HAL_PWR_EnablePVD() function. The PVD is stopped by STANDBY mode. For this reason, this bit is equal to 0 after STANDBY or reset until the PVDE bit is set.
  • PWR_FLAG_AVDO : AVD Output. This flag is valid only if AVD is enabled by the HAL_PWREx_EnableAVD() function. The AVD is stopped by STANDBY mode. For this reason, this bit is equal to 0 after STANDBY or reset until the AVDE bit is set.
  • PWR_FLAG_ACTVOSRDY : This flag indicates that the Regulator voltage scaling output selection is ready.
  • PWR_FLAG_BRR : Backup regulator ready flag. This bit is not reset when the device wakes up from STANDBY mode or by a system reset or power-on reset.
  • PWR_FLAG_VOSRDY : This flag indicates that the Regulator voltage scaling output selection is ready. mode or by a system reset or power-on reset.
  • PWR_FLAG_USB33RDY : This flag indicates that the USB supply from regulator is ready.
  • PWR_FLAG_TEMPH : This flag indicates that the temperature equal or above high threshold level.
  • PWR_FLAG_TEMPL : This flag indicates that the temperature equal or below low threshold level.
  • PWR_FLAG_VBATH : This flag indicates that VBAT level equal or above high threshold level.
  • PWR_FLAG_VBATL : This flag indicates that VBAT level equal or below low threshold level.
  • PWR_FLAG_STOP : This flag indicates that the system entered in STOP mode.
  • PWR_FLAG_SB : This flag indicates that the system entered in STANDBY mode.
  • PWR_FLAG_SB_D1 : This flag indicates that the D1 domain entered in STANDBY mode.
  • PWR_FLAG_SB_D2 : This flag indicates that the D2 domain entered in STANDBY mode.
  • PWR_FLAG2_STOP : This flag indicates that the system entered in STOP mode.
  • PWR_FLAG2_SB : This flag indicates that the system entered in STANDBY mode.
  • PWR_FLAG2_SB_D1 : This flag indicates that the D1 domain entered in STANDBY mode.
  • PWR_FLAG2_SB_D2 : This flag indicates that the D2 domain entered in STANDBY mode.
  • PWR_FLAG_CPU_HOLD : This flag indicates that the CPU1 wakes up with hold.
  • PWR_FLAG_CPU2_HOLD : This flag indicates that the CPU2 wakes up with hold.
  • PWR_FLAG_SMPSEXTRDY : This flag indicates that the SMPS External supply is sready.
  • PWR_FLAG_SCUEN : This flag indicates that the supply configuration update is enabled.
  • PWR_FLAG_MMCVDO : This flag indicates that the VDDMMC is above or equal to 1.2 V.
Note
The PWR_FLAG_PVDO, PWR_FLAG_AVDO, PWR_FLAG_ACTVOSRDY, PWR_FLAG_BRR, PWR_FLAG_VOSRDY, PWR_FLAG_USB33RDY, PWR_FLAG_TEMPH, PWR_FLAG_TEMPL, PWR_FLAG_VBATH, PWR_FLAG_VBATL, PWR_FLAG_STOP and PWR_FLAG_SB flags are used for all H7 family lines. The PWR_FLAG2_STOP, PWR_FLAG2_SB, PWR_FLAG2_SB_D1, PWR_FLAG2_SB_D2, PWR_FLAG_CPU_HOLD and PWR_FLAG_CPU2_HOLD flags are used only for H7 dual core lines. The PWR_FLAG_SB_D1 and PWR_FLAG_SB_D2 flags are used for all H7 family except STM32H7Axxx and STM32H7Bxxx lines. The PWR_FLAG_MMCVDO flag is used only for STM32H7Axxx and STM32H7Bxxx lines. The PWR_FLAG_SCUEN flag is used for devices that support only LDO regulator. The PWR_FLAG_SMPSEXTRDY flag is used for devices that support LDO and SMPS regulators.
Return values
The(FLAG) state (TRUE or FALSE).

Definition at line 455 of file stm32h7xx_hal_pwr.h.

Referenced by SystemClock_Config().

◆ __HAL_PWR_GET_WAKEUPFLAG

#define __HAL_PWR_GET_WAKEUPFLAG ( __FLAG__)
Value:
((PWR->WKUPFR & (__FLAG__)) ? 0 : 1)

Check PWR wake up flags are set or not.

Parameters
__FLAG__specifies the wake up flag to check. This parameter can be one of the following values:
  • PWR_FLAG_WKUP1 : This parameter clear Wake up line 1 flag.
  • PWR_FLAG_WKUP2 : This parameter clear Wake up line 2 flag.
  • PWR_FLAG_WKUP3 : This parameter clear Wake up line 3 flag.
  • PWR_FLAG_WKUP4 : This parameter clear Wake up line 4 flag.
  • PWR_FLAG_WKUP5 : This parameter clear Wake up line 5 flag.
  • PWR_FLAG_WKUP6 : This parameter clear Wake up line 6 flag.
Note
The PWR_FLAG_WKUP3 and PWR_FLAG_WKUP5 are available only for devices that support GPIOI port.
Return values
The(FLAG) state (TRUE or FALSE).

Definition at line 487 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_PVD_EXTI_CLEAR_FLAG

#define __HAL_PWR_PVD_EXTI_CLEAR_FLAG ( )
Value:
#define PWR_EXTI_LINE_PVD
External interrupt line 16 Connected to the PVD EXTI Line.
#define EXTI

Clear the PVD EXTI flag.

Return values
None.

Definition at line 652 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_PVD_EXTI_DISABLE_EVENT

#define __HAL_PWR_PVD_EXTI_DISABLE_EVENT ( )
Value:
#define CLEAR_BIT(REG, BIT)
Definition stm32h7xx.h:209

Disable event on PVD EXTI Line 16.

Return values
None.

Definition at line 580 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE

#define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE ( )
Value:

Disable the PVD Falling Interrupt Trigger.

Return values
None.

Definition at line 612 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_PVD_EXTI_DISABLE_IT

#define __HAL_PWR_PVD_EXTI_DISABLE_IT ( )
Value:

Disable the PVD EXTI Line 16.

Return values
None.

Definition at line 552 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE

#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE ( )
Value:

Disable the PVD Rising Interrupt Trigger.

Return values
None.

Definition at line 600 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE

#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE ( )
Value:
do { \
__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \
__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \
} while(0);

Disable the PVD Rising & Falling Interrupt Trigger.

Return values
None.

Definition at line 628 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_PVD_EXTI_ENABLE_EVENT

#define __HAL_PWR_PVD_EXTI_ENABLE_EVENT ( )
Value:

Enable event on PVD EXTI Line 16.

Return values
None.

Definition at line 566 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE

#define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE ( )
Value:

Enable the PVD Falling Interrupt Trigger.

Return values
None.

Definition at line 606 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_PVD_EXTI_ENABLE_IT

#define __HAL_PWR_PVD_EXTI_ENABLE_IT ( )
Value:

Enable the PVD EXTI Line 16.

Return values
None.

Definition at line 538 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE

#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE ( )
Value:

Enable the PVD Rising Interrupt Trigger.

Return values
None.

Definition at line 594 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE

#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE ( )
Value:
do { \
__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \
__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \
} while(0);

Enable the PVD Rising & Falling Interrupt Trigger.

Return values
None.

Definition at line 618 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_PVD_EXTI_GENERATE_SWIT

#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT ( )
Value:

Generates a Software interrupt on PVD EXTI line.

Return values
None.

Definition at line 666 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_PVD_EXTI_GET_FLAG

#define __HAL_PWR_PVD_EXTI_GET_FLAG ( )
Value:
#define READ_BIT(REG, BIT)
Definition stm32h7xx.h:211

Check whether the specified PVD EXTI interrupt flag is set or not.

Return values
EXTIPVD Line Status.

Definition at line 638 of file stm32h7xx_hal_pwr.h.

◆ __HAL_PWR_VOLTAGESCALING_CONFIG

#define __HAL_PWR_VOLTAGESCALING_CONFIG ( __REGULATOR__)
Value:
do { \
__IO uint32_t tmpreg = 0x00; \
/* Configure the Voltage Scaling */ \
MODIFY_REG (PWR->D3CR, PWR_D3CR_VOS, (__REGULATOR__)); \
/* Delay after setting the voltage scaling */ \
tmpreg = READ_BIT(PWR->D3CR, PWR_D3CR_VOS); \
UNUSED(tmpreg); \
} while(0)
#define __IO
Defines 'read / write' permissions.
#define PWR_D3CR_VOS
Voltage Scaling selection according performance.

Configure the main internal regulator output voltage.

Parameters
__REGULATOR__: Specifies the regulator output voltage to achieve a trade-off between performance and power consumption when the device does not operate at the maximum frequency (refer to the datasheet for more details). This parameter can be one of the following values:
  • PWR_REGULATOR_VOLTAGE_SCALE0 : Regulator voltage output Scale 0 mode.
  • PWR_REGULATOR_VOLTAGE_SCALE1 : Regulator voltage output Scale 1 mode.
  • PWR_REGULATOR_VOLTAGE_SCALE2 : Regulator voltage output Scale 2 mode.
  • PWR_REGULATOR_VOLTAGE_SCALE3 : Regulator voltage output Scale 3 mode.
Note
For STM32H74x and STM32H75x lines, configuring Voltage Scale 0 is only possible when Vcore is supplied from LDO (Low DropOut). The SYSCFG Clock must be enabled through __HAL_RCC_SYSCFG_CLK_ENABLE() macro before configuring Voltage Scale 0 using __HAL_PWR_VOLTAGESCALING_CONFIG(). Transition to Voltage Scale 0 is only possible when the system is already in Voltage Scale 1. Transition from Voltage Scale 0 is only possible to Voltage Scale 1 then once in Voltage Scale 1 it is possible to switch to another voltage scale. After each regulator voltage setting, wait on VOSRDY flag to be set using macro __HAL_PWR_GET_FLAG(). To enter low power mode , and if current regulator voltage is Voltage Scale 0 then first switch to Voltage Scale 1 before entering low power mode.
Return values
None.

Definition at line 288 of file stm32h7xx_hal_pwr.h.

Referenced by SystemClock_Config().