20#ifndef STM32H7xx_HAL_I2C_H
21#define STM32H7xx_HAL_I2C_H
163#define HAL_I2C_ERROR_NONE (0x00000000U)
164#define HAL_I2C_ERROR_BERR (0x00000001U)
165#define HAL_I2C_ERROR_ARLO (0x00000002U)
166#define HAL_I2C_ERROR_AF (0x00000004U)
167#define HAL_I2C_ERROR_OVR (0x00000008U)
168#define HAL_I2C_ERROR_DMA (0x00000010U)
169#define HAL_I2C_ERROR_TIMEOUT (0x00000020U)
170#define HAL_I2C_ERROR_SIZE (0x00000040U)
171#define HAL_I2C_ERROR_DMA_PARAM (0x00000080U)
172#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
173#define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U)
175#define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U)
223#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
243 void (* AddrCallback)(
struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
254#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
260 HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U,
261 HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U,
262 HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U,
263 HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U,
264 HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U,
265 HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U,
266 HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U,
267 HAL_I2C_ERROR_CB_ID = 0x07U,
268 HAL_I2C_ABORT_CB_ID = 0x08U,
270 HAL_I2C_MSPINIT_CB_ID = 0x09U,
271 HAL_I2C_MSPDEINIT_CB_ID = 0x0AU
273} HAL_I2C_CallbackIDTypeDef;
280typedef void (*pI2C_AddrCallbackTypeDef)(
I2C_HandleTypeDef *hi2c, uint8_t TransferDirection,
281 uint16_t AddrMatchCode);
301#define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
302#define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
303#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
304#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
305#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
306#define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE)
311#define I2C_OTHER_FRAME (0x000000AAU)
312#define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U)
320#define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
321#define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
329#define I2C_DUALADDRESS_DISABLE (0x00000000U)
330#define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
338#define I2C_OA2_NOMASK ((uint8_t)0x00U)
339#define I2C_OA2_MASK01 ((uint8_t)0x01U)
340#define I2C_OA2_MASK02 ((uint8_t)0x02U)
341#define I2C_OA2_MASK03 ((uint8_t)0x03U)
342#define I2C_OA2_MASK04 ((uint8_t)0x04U)
343#define I2C_OA2_MASK05 ((uint8_t)0x05U)
344#define I2C_OA2_MASK06 ((uint8_t)0x06U)
345#define I2C_OA2_MASK07 ((uint8_t)0x07U)
353#define I2C_GENERALCALL_DISABLE (0x00000000U)
354#define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
362#define I2C_NOSTRETCH_DISABLE (0x00000000U)
363#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
371#define I2C_MEMADD_SIZE_8BIT (0x00000001U)
372#define I2C_MEMADD_SIZE_16BIT (0x00000002U)
380#define I2C_DIRECTION_TRANSMIT (0x00000000U)
381#define I2C_DIRECTION_RECEIVE (0x00000001U)
389#define I2C_RELOAD_MODE I2C_CR2_RELOAD
390#define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
391#define I2C_SOFTEND_MODE (0x00000000U)
399#define I2C_NO_STARTSTOP (0x00000000U)
400#define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP)
401#define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN)
402#define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START)
413#define I2C_IT_ERRI I2C_CR1_ERRIE
414#define I2C_IT_TCI I2C_CR1_TCIE
415#define I2C_IT_STOPI I2C_CR1_STOPIE
416#define I2C_IT_NACKI I2C_CR1_NACKIE
417#define I2C_IT_ADDRI I2C_CR1_ADDRIE
418#define I2C_IT_RXI I2C_CR1_RXIE
419#define I2C_IT_TXI I2C_CR1_TXIE
427#define I2C_FLAG_TXE I2C_ISR_TXE
428#define I2C_FLAG_TXIS I2C_ISR_TXIS
429#define I2C_FLAG_RXNE I2C_ISR_RXNE
430#define I2C_FLAG_ADDR I2C_ISR_ADDR
431#define I2C_FLAG_AF I2C_ISR_NACKF
432#define I2C_FLAG_STOPF I2C_ISR_STOPF
433#define I2C_FLAG_TC I2C_ISR_TC
434#define I2C_FLAG_TCR I2C_ISR_TCR
435#define I2C_FLAG_BERR I2C_ISR_BERR
436#define I2C_FLAG_ARLO I2C_ISR_ARLO
437#define I2C_FLAG_OVR I2C_ISR_OVR
438#define I2C_FLAG_PECERR I2C_ISR_PECERR
439#define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
440#define I2C_FLAG_ALERT I2C_ISR_ALERT
441#define I2C_FLAG_BUSY I2C_ISR_BUSY
442#define I2C_FLAG_DIR I2C_ISR_DIR
461#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
462#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
463 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \
464 (__HANDLE__)->MspInitCallback = NULL; \
465 (__HANDLE__)->MspDeInitCallback = NULL; \
468#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
485#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
501#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
517#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & \
518 (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
543#define I2C_FLAG_MASK (0x0001FFFFU)
544#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \
545 (__FLAG__)) == (__FLAG__)) ? SET : RESET)
564#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? \
565 ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \
566 ((__HANDLE__)->Instance->ICR = (__FLAG__)))
572#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
578#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
584#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
607#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
609 pI2C_CallbackTypeDef pCallback);
625 uint16_t Size, uint32_t Timeout);
627 uint16_t Size, uint32_t Timeout);
633 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
635 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
647 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
649 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
671 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
673 uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
737#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
738 ((MODE) == I2C_ADDRESSINGMODE_10BIT))
740#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
741 ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
743#define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
744 ((MASK) == I2C_OA2_MASK01) || \
745 ((MASK) == I2C_OA2_MASK02) || \
746 ((MASK) == I2C_OA2_MASK03) || \
747 ((MASK) == I2C_OA2_MASK04) || \
748 ((MASK) == I2C_OA2_MASK05) || \
749 ((MASK) == I2C_OA2_MASK06) || \
750 ((MASK) == I2C_OA2_MASK07))
752#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
753 ((CALL) == I2C_GENERALCALL_ENABLE))
755#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
756 ((STRETCH) == I2C_NOSTRETCH_ENABLE))
758#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
759 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
761#define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
762 ((MODE) == I2C_AUTOEND_MODE) || \
763 ((MODE) == I2C_SOFTEND_MODE))
765#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
766 ((REQUEST) == I2C_GENERATE_START_READ) || \
767 ((REQUEST) == I2C_GENERATE_START_WRITE) || \
768 ((REQUEST) == I2C_NO_STARTSTOP))
770#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
771 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
772 ((REQUEST) == I2C_NEXT_FRAME) || \
773 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
774 ((REQUEST) == I2C_LAST_FRAME) || \
775 ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
776 IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
778#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
779 ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
781#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \
782 (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | \
783 I2C_CR2_NBYTES | I2C_CR2_RELOAD | \
786#define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) \
788#define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) \
790#define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
791#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1))
792#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2))
794#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
795#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
797#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \
798 (uint16_t)(0xFF00U))) >> 8U)))
799#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
801#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? \
802 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \
803 (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & \
804 (~I2C_CR2_RD_WRN)) : \
805 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \
806 (I2C_CR2_ADD10) | (I2C_CR2_START) | \
807 (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)))
809#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == \
810 ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
811#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
#define __IO
Defines 'read / write' permissions.
struct __DMA_HandleTypeDef DMA_HandleTypeDef
DMA handle Structure definition.
@ HAL_I2C_MODE_MASTER
I2C communication is in Master Mode.
@ HAL_I2C_MODE_MEM
I2C communication is in Memory Mode.
@ HAL_I2C_MODE_SLAVE
I2C communication is in Slave Mode.
@ HAL_I2C_MODE_NONE
No I2C communication on going.
@ HAL_I2C_STATE_BUSY
An internal process is ongoing.
@ HAL_I2C_STATE_LISTEN
Address Listen Mode is ongoing.
@ HAL_I2C_STATE_BUSY_TX_LISTEN
Address Listen Mode and Data Transmission process is ongoing.
@ HAL_I2C_STATE_ABORT
Abort user request ongoing.
@ HAL_I2C_STATE_BUSY_RX
Data Reception process is ongoing.
@ HAL_I2C_STATE_BUSY_RX_LISTEN
Address Listen Mode and Data Reception process is ongoing.
@ HAL_I2C_STATE_RESET
Peripheral is not yet Initialized.
@ HAL_I2C_STATE_BUSY_TX
Data Transmission process is ongoing.
@ HAL_I2C_STATE_READY
Peripheral Initialized and ready for use.
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
I2C MSP De-Initialization This function freeze the hardware resources used in this example.
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
I2C MSP Initialization This function configures the hardware resources used in this example.
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(const I2C_HandleTypeDef *hi2c)
uint32_t HAL_I2C_GetError(const I2C_HandleTypeDef *hi2c)
HAL_I2C_StateTypeDef HAL_I2C_GetState(const I2C_HandleTypeDef *hi2c)
void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
struct __I2C_HandleTypeDef I2C_HandleTypeDef
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition.
HAL_LockTypeDef
HAL Lock structures definition.
Header file of I2C HAL Extended module.
uint32_t GeneralCallMode
Specifies if general call mode is selected.
uint32_t NoStretchMode
Specifies if nostretch mode is selected.
uint32_t OwnAddress2Masks
Specifies the acknowledge mask address second device own address if dual addressing mode is selected.
uint32_t AddressingMode
Specifies if 7-bit or 10-bit addressing mode is selected.
uint32_t OwnAddress2
Specifies the second device own address if dual addressing mode is selected This parameter can be a 7...
uint32_t Timing
Specifies the I2C_TIMINGR_register value.
uint32_t OwnAddress1
Specifies the first device own address.
uint32_t DualAddressMode
Specifies if dual addressing mode is selected.
Inter-integrated Circuit Interface.
__IO uint32_t PreviousState
I2C communication Previous state.
I2C_TypeDef * Instance
I2C registers base address.
uint16_t XferSize
I2C transfer size.
HAL_StatusTypeDef(* XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)
I2C transfer IRQ handler function pointer.
__IO uint16_t XferCount
I2C transfer counter.
__IO HAL_I2C_StateTypeDef State
I2C communication state.
__IO uint32_t Memaddress
I2C Target memory address.
DMA_HandleTypeDef * hdmarx
I2C Rx DMA handle parameters.
__IO uint32_t XferOptions
I2C sequantial transfer options, this parameter can be a value of I2C Sequential Transfer Options.
__IO uint32_t Devaddress
I2C Target device address.
__IO uint32_t ErrorCode
I2C Error code.
I2C_InitTypeDef Init
I2C communication parameters.
HAL_LockTypeDef Lock
I2C locking object.
__IO HAL_I2C_ModeTypeDef Mode
I2C communication mode.
__IO uint32_t AddrEventCount
I2C Address Event counter.
DMA_HandleTypeDef * hdmatx
I2C Tx DMA handle parameters.
uint8_t * pBuffPtr
Pointer to I2C transfer buffer.