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stm32h7xx_hal_mmc.h
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1/**
2 ******************************************************************************
3 * @file stm32h7xx_hal_mmc.h
4 * @author MCD Application Team
5 * @brief Header file of MMC HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_MMC_H
21#define STM32H7xx_HAL_MMC_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_ll_sdmmc.h"
29
30/** @addtogroup STM32H7xx_HAL_Driver
31 * @{
32 */
33#if defined (SDMMC1) || defined (SDMMC2)
34
35/** @addtogroup MMC
36 * @{
37 */
38
39/* Exported types ------------------------------------------------------------*/
40/** @defgroup MMC_Exported_Types MMC Exported Types
41 * @{
42 */
43
44/** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure
45 * @{
46 */
47typedef enum
48{
49 HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */
50 HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */
51 HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */
52 HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */
53 HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */
54 HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */
55 HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfer State */
56 HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */
57} HAL_MMC_StateTypeDef;
58/**
59 * @}
60 */
61
62/** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure
63 * @{
64 */
65typedef uint32_t HAL_MMC_CardStateTypeDef;
66
67#define HAL_MMC_CARD_IDLE 0x00000000U /*!< Card is in idle state (can't be checked by CMD13) */
68#define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready (can't be checked by CMD13) */
69#define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state (can't be checked by CMD13) */
70#define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */
71#define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */
72#define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */
73#define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */
74#define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */
75#define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */
76#define HAL_MMC_CARD_BUSTEST 0x00000009U /*!< Card is in bus test state */
77#define HAL_MMC_CARD_SLEEP 0x0000000AU /*!< Card is in sleep state (can't be checked by CMD13) */
78#define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error (can't be checked by CMD13) */
79/**
80 * @}
81 */
82
83/** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition
84 * @{
85 */
86#define MMC_InitTypeDef SDMMC_InitTypeDef
87#define MMC_TypeDef SDMMC_TypeDef
88
89/**
90 * @brief MMC Card Information Structure definition
91 */
92typedef struct
93{
94 uint32_t CardType; /*!< Specifies the card Type */
95
96 uint32_t Class; /*!< Specifies the class of the card class */
97
98 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */
99
100 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */
101
102 uint32_t BlockSize; /*!< Specifies one block size in bytes */
103
104 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */
105
106 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */
107
108} HAL_MMC_CardInfoTypeDef;
109
110/**
111 * @brief MMC handle Structure definition
112 */
113#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
114typedef struct __MMC_HandleTypeDef
115#else
116typedef struct
117#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
118{
119 MMC_TypeDef *Instance; /*!< MMC registers base address */
120
121 MMC_InitTypeDef Init; /*!< MMC required parameters */
122
123 HAL_LockTypeDef Lock; /*!< MMC locking object */
124
125 const uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */
126
127 uint32_t TxXferSize; /*!< MMC Tx Transfer size */
128
129 uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */
130
131 uint32_t RxXferSize; /*!< MMC Rx Transfer size */
132
133 __IO uint32_t Context; /*!< MMC transfer context */
134
135 __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */
136
137 __IO uint32_t ErrorCode; /*!< MMC Card Error codes */
138
139 __IO uint16_t RPMBErrorCode; /*!< MMC RPMB Area Error codes */
140
141 HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */
142
143 uint32_t CSD[4U]; /*!< MMC card specific data table */
144
145 uint32_t CID[4U]; /*!< MMC card identification number table */
146
147 uint32_t Ext_CSD[128];
148
149#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
150 void (* TxCpltCallback)(struct __MMC_HandleTypeDef *hmmc);
151 void (* RxCpltCallback)(struct __MMC_HandleTypeDef *hmmc);
152 void (* ErrorCallback)(struct __MMC_HandleTypeDef *hmmc);
153 void (* AbortCpltCallback)(struct __MMC_HandleTypeDef *hmmc);
154 void (* Read_DMADblBuf0CpltCallback)(struct __MMC_HandleTypeDef *hmmc);
155 void (* Read_DMADblBuf1CpltCallback)(struct __MMC_HandleTypeDef *hmmc);
156 void (* Write_DMADblBuf0CpltCallback)(struct __MMC_HandleTypeDef *hmmc);
157 void (* Write_DMADblBuf1CpltCallback)(struct __MMC_HandleTypeDef *hmmc);
158
159 void (* MspInitCallback)(struct __MMC_HandleTypeDef *hmmc);
160 void (* MspDeInitCallback)(struct __MMC_HandleTypeDef *hmmc);
161#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
162} MMC_HandleTypeDef;
163
164
165/**
166 * @}
167 */
168
169/** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register
170 * @{
171 */
172typedef struct
173{
174 __IO uint8_t CSDStruct; /*!< CSD structure */
175 __IO uint8_t SysSpecVersion; /*!< System specification version */
176 __IO uint8_t Reserved1; /*!< Reserved */
177 __IO uint8_t TAAC; /*!< Data read access time 1 */
178 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
179 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
180 __IO uint16_t CardComdClasses; /*!< Card command classes */
181 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
182 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
183 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
184 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
185 __IO uint8_t DSRImpl; /*!< DSR implemented */
186 __IO uint8_t Reserved2; /*!< Reserved */
187 __IO uint32_t DeviceSize; /*!< Device Size */
188 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
189 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
190 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
191 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
192 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
193 __IO uint8_t EraseGrSize; /*!< Erase group size */
194 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
195 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
196 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
197 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
198 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
199 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
200 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
201 __IO uint8_t Reserved3; /*!< Reserved */
202 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
203 __IO uint8_t FileFormatGroup; /*!< File format group */
204 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
205 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
206 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
207 __IO uint8_t FileFormat; /*!< File format */
208 __IO uint8_t ECC; /*!< ECC code */
209 __IO uint8_t CSD_CRC; /*!< CSD CRC */
210 __IO uint8_t Reserved4; /*!< Always 1 */
211
212} HAL_MMC_CardCSDTypeDef;
213/**
214 * @}
215 */
216
217/** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register
218 * @{
219 */
220typedef struct
221{
222 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
223 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
224 __IO uint32_t ProdName1; /*!< Product Name part1 */
225 __IO uint8_t ProdName2; /*!< Product Name part2 */
226 __IO uint8_t ProdRev; /*!< Product Revision */
227 __IO uint32_t ProdSN; /*!< Product Serial Number */
228 __IO uint8_t Reserved1; /*!< Reserved1 */
229 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
230 __IO uint8_t CID_CRC; /*!< CID CRC */
231 __IO uint8_t Reserved2; /*!< Always 1 */
232
233} HAL_MMC_CardCIDTypeDef;
234/**
235 * @}
236 */
237
238#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
239/** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition
240 * @{
241 */
242typedef enum
243{
244 HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */
245 HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */
246 HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */
247 HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */
248 HAL_MMC_READ_DMA_DBL_BUF0_CPLT_CB_ID = 0x04U, /*!< MMC Rx DMA Double Buffer 0 Complete Callback ID */
249 HAL_MMC_READ_DMA_DBL_BUF1_CPLT_CB_ID = 0x05U, /*!< MMC Rx DMA Double Buffer 1 Complete Callback ID */
250 HAL_MMC_WRITE_DMA_DBL_BUF0_CPLT_CB_ID = 0x06U, /*!< MMC Tx DMA Double Buffer 0 Complete Callback ID */
251 HAL_MMC_WRITE_DMA_DBL_BUF1_CPLT_CB_ID = 0x07U, /*!< MMC Tx DMA Double Buffer 1 Complete Callback ID */
252
253 HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */
254 HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */
255} HAL_MMC_CallbackIDTypeDef;
256/**
257 * @}
258 */
259
260/** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition
261 * @{
262 */
263typedef void (*pMMC_CallbackTypeDef)(MMC_HandleTypeDef *hmmc);
264/**
265 * @}
266 */
267#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
268/**
269 * @}
270 */
271
272/* Exported constants --------------------------------------------------------*/
273/** @defgroup MMC_Exported_Constants Exported Constants
274 * @{
275 */
276
277#define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */
278
279/** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition
280 * @{
281 */
282#define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */
283#define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */
284#define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */
285#define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */
286#define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */
287#define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */
288#define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */
289#define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */
290#define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the */
291/*!< number of transferred bytes does not match the block length */
292#define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */
293#define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */
294#define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */
295#define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock */
296/*!< command or if there was an attempt to access a locked card */
297#define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */
298#define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */
299#define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */
300#define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */
301#define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */
302#define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */
303#define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */
304#define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */
305#define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */
306#define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */
307#define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out */
308/*!< of erase sequence command was received */
309#define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */
310#define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */
311#define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */
312#define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */
313#define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */
314#define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */
315#define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */
316#define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */
317#define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */
318/*!< response results after operating with RPMB partition */
319#define HAL_MMC_ERROR_RPMB_OPERATION_OK 0x0000U /*!< Operation OK */
320#define HAL_MMC_ERROR_RPMB_GENERAL_FAILURE 0x0001U /*!< General failure */
321#define HAL_MMC_ERROR_RPMB_AUTHENTICATION_FAILURE 0x0002U /*!< Authentication failure */
322#define HAL_MMC_ERROR_RPMB_COUNTER_FAILURE 0x0003U /*!< Counter failure */
323#define HAL_MMC_ERROR_RPMB_ADDRESS_FAILURE 0x0004U /*!< Address failure */
324#define HAL_MMC_ERROR_RPMB_WRITE_FAILURE 0x0005U /*!< Write failure */
325#define HAL_MMC_ERROR_RPMB_READ_FAILURE 0x0006U /*!< Read failure */
326#define HAL_MMC_ERROR_RPMB_KEY_NOT_YET_PROG 0x0007U /*!< Authentication Key not yet programmed */
327#define HAL_MMC_ERROR_RPMB_COUNTER_EXPIRED 0x0080U /*!< Write Counter has expired i.e. reached its max value */
328
329#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
330#define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */
331#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
332/**
333 * @}
334 */
335
336/** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration
337 * @{
338 */
339#define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */
340#define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */
341#define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */
342#define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */
343#define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */
344#define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */
345#define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */
346
347/**
348 * @}
349 */
350
351/** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode
352 * @{
353 */
354/**
355 * @brief
356 */
357#define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< High voltage in byte mode */
358#define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< Dual voltage in byte mode */
359#define MMC_LOW_VOLTAGE_RANGE 0x80000080U /*!< Low voltage in byte mode */
360#define EMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< High voltage in sector mode */
361#define EMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< Dual voltage in sector mode */
362#define EMMC_LOW_VOLTAGE_RANGE 0xC0000080U /*!< Low voltage in sector mode */
363#define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U
364/**
365 * @}
366 */
367
368/** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards
369 * @{
370 */
371#define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */
372#define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */
373
374/**
375 * @}
376 */
377
378/** @defgroup MMC_Exported_Constansts_Group5 MMC Erase Type
379 * @{
380 */
381#define HAL_MMC_ERASE 0x00000000U /*!< Erase the erase groups identified by CMD35 & 36 */
382#define HAL_MMC_TRIM 0x00000001U /*!< Erase the write blocks identified by CMD35 & 36 */
383#define HAL_MMC_DISCARD 0x00000003U /*!< Discard the write blocks identified by CMD35 & 36 */
384#define HAL_MMC_SECURE_ERASE 0x80000000U /*!< Perform a secure purge according SRT on the erase groups identified by CMD35 & 36 */
385#define HAL_MMC_SECURE_TRIM_STEP1 0x80000001U /*!< Mark the write blocks identified by CMD35 & 36 for secure erase */
386#define HAL_MMC_SECURE_TRIM_STEP2 0x80008000U /*!< Perform a secure purge according SRT on the write blocks previously identified */
387
388#define IS_MMC_ERASE_TYPE(TYPE) (((TYPE) == HAL_MMC_ERASE) || \
389 ((TYPE) == HAL_MMC_TRIM) || \
390 ((TYPE) == HAL_MMC_DISCARD) || \
391 ((TYPE) == HAL_MMC_SECURE_ERASE) || \
392 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP1) || \
393 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP2))
394/**
395 * @}
396 */
397
398/** @defgroup MMC_Exported_Constansts_Group6 MMC Secure Removal Type
399 * @{
400 */
401#define HAL_MMC_SRT_ERASE 0x00000001U /*!< Information removed by an erase */
402#define HAL_MMC_SRT_WRITE_CHAR_ERASE 0x00000002U /*!< Information removed by an overwriting with a character followed by an erase */
403#define HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM 0x00000004U /*!< Information removed by an overwriting with a character, its complement then a random character */
404#define HAL_MMC_SRT_VENDOR_DEFINED 0x00000008U /*!< Information removed using a vendor defined */
405
406
407#define IS_MMC_SRT_TYPE(TYPE) (((TYPE) == HAL_MMC_SRT_ERASE) || \
408 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_ERASE) || \
409 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM) || \
410 ((TYPE) == HAL_MMC_SRT_VENDOR_DEFINED))
411/**
412 * @}
413 */
414
415/** @defgroup MMC_Exported_Constansts_Group7 MMC Partitions types
416 * @{
417 */
418typedef uint32_t HAL_MMC_PartitionTypeDef;
419
420#define HAL_MMC_USER_AREA_PARTITION 0x00000000U /*!< User area partition */
421#define HAL_MMC_BOOT_PARTITION1 0x00000100U /*!< Boot partition 1 */
422#define HAL_MMC_BOOT_PARTITION2 0x00000200U /*!< Boot partition 2 */
423#define HAL_MMC_RPMB_PARTITION 0x00000300U /*!< RPMB partition */
424/**
425 * @}
426 */
427
428/**
429 * @}
430 */
431
432/* Exported macro ------------------------------------------------------------*/
433/** @defgroup MMC_Exported_macros MMC Exported Macros
434 * @brief macros to handle interrupts and specific clock configurations
435 * @{
436 */
437/** @brief Reset MMC handle state.
438 * @param __HANDLE__ MMC Handle.
439 * @retval None
440 */
441#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
442#define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \
443 (__HANDLE__)->State = HAL_MMC_STATE_RESET; \
444 (__HANDLE__)->MspInitCallback = NULL; \
445 (__HANDLE__)->MspDeInitCallback = NULL; \
446 } while(0)
447#else
448#define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET)
449#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
450
451/**
452 * @brief Enable the MMC device interrupt.
453 * @param __HANDLE__ MMC Handle.
454 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled.
455 * This parameter can be one or a combination of the following values:
456 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
457 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
458 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
459 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
460 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
461 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
462 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
463 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
464 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
465 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
466 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
467 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
468 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
469 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
470 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
471 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
472 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
473 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
474 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
475 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
476 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
477 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
478 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
479 * @retval None
480 */
481#define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
482
483/**
484 * @brief Disable the MMC device interrupt.
485 * @param __HANDLE__ MMC Handle.
486 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled.
487 * This parameter can be one or a combination of the following values:
488 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
489 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
490 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
491 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
492 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
493 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
494 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
495 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
496 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
497 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
498 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
499 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
500 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
501 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
502 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
503 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
504 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
505 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
506 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
507 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
508 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
509 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
510 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
511 * @retval None
512 */
513#define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
514
515/**
516 * @brief Check whether the specified MMC flag is set or not.
517 * @param __HANDLE__ MMC Handle.
518 * @param __FLAG__ specifies the flag to check.
519 * This parameter can be one of the following values:
520 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
521 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
522 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
523 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout
524 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
525 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
526 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
527 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
528 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero)
529 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold
530 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
531 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12
532 * @arg SDMMC_FLAG_DPSMACT: Data path state machine active
533 * @arg SDMMC_FLAG_CPSMACT: Command path state machine active
534 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty
535 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full
536 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full
537 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full
538 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty
539 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty
540 * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy)
541 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected
542 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received
543 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received
544 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout
545 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion
546 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure
547 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error
548 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete
549 * @retval The new state of MMC FLAG (SET or RESET).
550 */
551#define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
552
553/**
554 * @brief Clear the MMC's pending flags.
555 * @param __HANDLE__ MMC Handle.
556 * @param __FLAG__ specifies the flag to clear.
557 * This parameter can be one or a combination of the following values:
558 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
559 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
560 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
561 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout
562 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
563 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
564 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
565 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
566 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero)
567 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold
568 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
569 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12
570 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected
571 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received
572 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received
573 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout
574 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion
575 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure
576 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error
577 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete
578 * @retval None
579 */
580#define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
581
582/**
583 * @brief Check whether the specified MMC interrupt has occurred or not.
584 * @param __HANDLE__ MMC Handle.
585 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check.
586 * This parameter can be one of the following values:
587 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
588 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
589 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
590 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
591 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
592 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
593 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
594 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
595 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
596 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
597 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
598 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
599 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
600 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
601 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
602 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
603 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
604 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
605 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
606 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
607 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
608 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
609 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
610 * @retval The new state of MMC IT (SET or RESET).
611 */
612#define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
613
614/**
615 * @brief Clear the MMC's interrupt pending bits.
616 * @param __HANDLE__ MMC Handle.
617 * @param __INTERRUPT__ specifies the interrupt pending bit to clear.
618 * This parameter can be one or a combination of the following values:
619 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
620 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
621 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
622 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
623 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
624 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
625 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
626 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
627 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
628 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
629 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
630 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
631 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
632 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
633 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
634 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
635 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
636 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
637 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
638 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
639 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
640 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
641 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
642 * @retval None
643 */
644#define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
645
646/**
647 * @}
648 */
649
650/* Include MMC HAL Extension module */
651#include "stm32h7xx_hal_mmc_ex.h"
652
653/* Exported functions --------------------------------------------------------*/
654/** @defgroup MMC_Exported_Functions MMC Exported Functions
655 * @{
656 */
657
658/** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions
659 * @{
660 */
661HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc);
662HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc);
663HAL_StatusTypeDef HAL_MMC_DeInit(MMC_HandleTypeDef *hmmc);
664void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc);
665void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc);
666
667/**
668 * @}
669 */
670
671/** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions
672 * @{
673 */
674/* Blocking mode: Polling */
675HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd,
676 uint32_t NumberOfBlocks,
677 uint32_t Timeout);
678HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd,
679 uint32_t NumberOfBlocks, uint32_t Timeout);
680HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
681/* Non-Blocking mode: IT */
682HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd,
683 uint32_t NumberOfBlocks);
684HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd,
685 uint32_t NumberOfBlocks);
686/* Non-Blocking mode: DMA */
687HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd,
688 uint32_t NumberOfBlocks);
689HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint32_t BlockAdd,
690 uint32_t NumberOfBlocks);
691
692void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc);
693
694/* Callback in non blocking modes (DMA) */
695void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc);
696void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc);
697void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc);
698void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc);
699
700#if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U)
701/* MMC callback registering/unregistering */
702HAL_StatusTypeDef HAL_MMC_RegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId,
703 pMMC_CallbackTypeDef pCallback);
704HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId);
705#endif /* USE_HAL_MMC_REGISTER_CALLBACKS */
706/**
707 * @}
708 */
709
710/** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions
711 * @{
712 */
713HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode);
714HAL_StatusTypeDef HAL_MMC_ConfigSpeedBusOperation(MMC_HandleTypeDef *hmmc, uint32_t SpeedMode);
715HAL_StatusTypeDef HAL_MMC_SwitchPartition(MMC_HandleTypeDef *hmmc, HAL_MMC_PartitionTypeDef Partition);
716/**
717 * @}
718 */
719
720/** @defgroup MMC_Exported_Functions_Group4 MMC card related functions
721 * @{
722 */
723HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc);
724HAL_StatusTypeDef HAL_MMC_GetCardCID(const MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID);
725HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD);
726HAL_StatusTypeDef HAL_MMC_GetCardInfo(const MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo);
727HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout);
728/**
729 * @}
730 */
731
732/** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions
733 * @{
734 */
735HAL_MMC_StateTypeDef HAL_MMC_GetState(const MMC_HandleTypeDef *hmmc);
736uint32_t HAL_MMC_GetError(const MMC_HandleTypeDef *hmmc);
737uint32_t HAL_MMC_GetRPMBError(const MMC_HandleTypeDef *hmmc);
738/**
739 * @}
740 */
741
742/** @defgroup MMC_Exported_Functions_Group6 Peripheral Abort management
743 * @{
744 */
745HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc);
746HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc);
747/**
748 * @}
749 */
750
751/** @defgroup MMC_Exported_Functions_Group7 Peripheral Erase management
752 * @{
753 */
754HAL_StatusTypeDef HAL_MMC_EraseSequence(MMC_HandleTypeDef *hmmc, uint32_t EraseType, uint32_t BlockStartAdd,
755 uint32_t BlockEndAdd);
756HAL_StatusTypeDef HAL_MMC_Sanitize(MMC_HandleTypeDef *hmmc);
757HAL_StatusTypeDef HAL_MMC_ConfigSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t SRTMode);
758HAL_StatusTypeDef HAL_MMC_GetSupportedSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t *SupportedSRT);
759/**
760 * @}
761 */
762
763/** @defgroup MMC_Exported_Functions_Group8 Peripheral Sleep management
764 * @{
765 */
766HAL_StatusTypeDef HAL_MMC_SleepDevice(MMC_HandleTypeDef *hmmc);
767HAL_StatusTypeDef HAL_MMC_AwakeDevice(MMC_HandleTypeDef *hmmc);
768/**
769 * @}
770 */
771
772/** @defgroup MMC_Exported_Functions_Group9 Replay Protected Memory Block management
773 * @{
774 */
775HAL_StatusTypeDef HAL_MMC_RPMB_ProgramAuthenticationKey(MMC_HandleTypeDef *hmmc, const uint8_t *pKey, uint32_t Timeout);
776HAL_StatusTypeDef HAL_MMC_RPMB_ProgramAuthenticationKey_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pKey,
777 uint32_t Timeout);
778uint32_t HAL_MMC_RPMB_GetWriteCounter(MMC_HandleTypeDef *hmmc, uint8_t *pNonce, uint32_t Timeout);
779uint32_t HAL_MMC_RPMB_GetWriteCounter_IT(MMC_HandleTypeDef *hmmc, uint8_t *pNonce);
780HAL_StatusTypeDef HAL_MMC_RPMB_WriteBlocks(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint16_t BlockAdd,
781 uint16_t NumberOfBlocks, const uint8_t *pMAC, uint32_t Timeout);
782HAL_StatusTypeDef HAL_MMC_RPMB_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, const uint8_t *pData, uint16_t BlockAdd,
783 uint16_t NumberOfBlocks, const uint8_t *pMAC);
784HAL_StatusTypeDef HAL_MMC_RPMB_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint16_t BlockAdd,
785 uint16_t NumberOfBlocks, const uint8_t *pNonce, uint8_t *pMAC,
786 uint32_t Timeout);
787HAL_StatusTypeDef HAL_MMC_RPMB_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint16_t BlockAdd,
788 uint16_t NumberOfBlocks, const uint8_t *pNonce, uint8_t *pMAC);
789
790/**
791 * @}
792 */
793
794/* Private types -------------------------------------------------------------*/
795/** @defgroup MMC_Private_Types MMC Private Types
796 * @{
797 */
798
799/**
800 * @}
801 */
802
803/* Private defines -----------------------------------------------------------*/
804/** @defgroup MMC_Private_Defines MMC Private Defines
805 * @{
806 */
807#define MMC_EXT_CSD_DATA_SEC_SIZE_INDEX 61
808#define MMC_EXT_CSD_DATA_SEC_SIZE_POS 8
809/**
810 * @}
811 */
812
813/* Private variables ---------------------------------------------------------*/
814/** @defgroup MMC_Private_Variables MMC Private Variables
815 * @{
816 */
817
818/**
819 * @}
820 */
821
822/* Private constants ---------------------------------------------------------*/
823/** @defgroup MMC_Private_Constants MMC Private Constants
824 * @{
825 */
826
827/**
828 * @}
829 */
830
831/* Private macros ------------------------------------------------------------*/
832/** @defgroup MMC_Private_Macros MMC Private Macros
833 * @{
834 */
835
836/**
837 * @}
838 */
839
840/* Private functions prototypes ----------------------------------------------*/
841/** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes
842 * @{
843 */
844
845/**
846 * @}
847 */
848
849/* Private functions ---------------------------------------------------------*/
850/** @defgroup MMC_Private_Functions MMC Private Functions
851 * @{
852 */
853
854/**
855 * @}
856 */
857
858
859/**
860 * @}
861 */
862
863/**
864 * @}
865 */
866#endif /* SDMMC1 || SDMMC2 */
867
868/**
869 * @}
870 */
871
872#ifdef __cplusplus
873}
874#endif
875
876
877#endif /* STM32H7xx_HAL_MMC_H */
__IO
#define __IO
Defines 'read / write' permissions.
Definition core_armv81mml.h:290
HAL_MMC_TxCpltCallback
void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc)
Definition emmc_stm32.c:215
HAL_MMC_ErrorCallback
void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc)
Definition emmc_stm32.c:226
HAL_MMC_RxCpltCallback
void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc)
Definition emmc_stm32.c:222
State
State
Definition main.cpp:72
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition stm32h7xx_hal_def.h:40
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition stm32h7xx_hal_def.h:51
stm32h7xx_hal_mmc_ex.h
Header file of SD HAL extended module.
HAL_MMC_MspInit
void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc)
MMC MSP Initialization This function configures the hardware resources used in this example.
Definition stm32h7xx_hal_msp.c:331
HAL_MMC_MspDeInit
void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc)
MMC MSP De-Initialization This function freeze the hardware resources used in this example.
Definition stm32h7xx_hal_msp.c:395
stm32h7xx_ll_sdmmc.h
Header file of SDMMC HAL module.