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stm32h7xx_hal_sd.h
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1/**
2 ******************************************************************************
3 * @file stm32h7xx_hal_sd.h
4 * @author MCD Application Team
5 * @brief Header file of SD HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_SD_H
21#define STM32H7xx_HAL_SD_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_ll_sdmmc.h"
29#if defined (DLYB_SDMMC1) || defined (DLYB_SDMMC2) || defined (DLYB_SDMMC3)
30#include "stm32h7xx_ll_delayblock.h"
31#endif /* (DLYB_SDMMC1) || (DLYB_SDMMC2) */
32
33/** @addtogroup STM32H7xx_HAL_Driver
34 * @{
35 */
36#if defined (SDMMC1) || defined (SDMMC2)
37
38/** @defgroup SD SD
39 * @brief SD HAL module driver
40 * @{
41 */
42
43/* Exported types ------------------------------------------------------------*/
44/** @defgroup SD_Exported_Types SD Exported Types
45 * @{
46 */
47
48/** @defgroup SD_Exported_Types_Group1 SD State enumeration structure
49 * @{
50 */
51typedef enum
52{
53 HAL_SD_STATE_RESET = ((uint32_t)0x00000000U), /*!< SD not yet initialized or disabled */
54 HAL_SD_STATE_READY = ((uint32_t)0x00000001U), /*!< SD initialized and ready for use */
55 HAL_SD_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< SD Timeout state */
56 HAL_SD_STATE_BUSY = ((uint32_t)0x00000003U), /*!< SD process ongoing */
57 HAL_SD_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< SD Programming State */
58 HAL_SD_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< SD Receiving State */
59 HAL_SD_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< SD Transfer State */
60 HAL_SD_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< SD is in error state */
61} HAL_SD_StateTypeDef;
62/**
63 * @}
64 */
65
66/** @defgroup SD_Exported_Types_Group2 SD Card State enumeration structure
67 * @{
68 */
69typedef uint32_t HAL_SD_CardStateTypeDef;
70
71#define HAL_SD_CARD_READY 0x00000001U /*!< Card state is ready */
72#define HAL_SD_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */
73#define HAL_SD_CARD_STANDBY 0x00000003U /*!< Card is in standby state */
74#define HAL_SD_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */
75#define HAL_SD_CARD_SENDING 0x00000005U /*!< Card is sending an operation */
76#define HAL_SD_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */
77#define HAL_SD_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */
78#define HAL_SD_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */
79#define HAL_SD_CARD_ERROR 0x000000FFU /*!< Card response Error */
80/**
81 * @}
82 */
83
84/** @defgroup SD_Exported_Types_Group3 SD Handle Structure definition
85 * @{
86 */
87#define SD_InitTypeDef SDMMC_InitTypeDef
88#define SD_TypeDef SDMMC_TypeDef
89
90/**
91 * @brief SD Card Information Structure definition
92 */
93typedef struct
94{
95 uint32_t CardType; /*!< Specifies the card Type */
96
97 uint32_t CardVersion; /*!< Specifies the card version */
98
99 uint32_t Class; /*!< Specifies the class of the card class */
100
101 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */
102
103 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */
104
105 uint32_t BlockSize; /*!< Specifies one block size in bytes */
106
107 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */
108
109 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */
110
111 uint32_t CardSpeed; /*!< Specifies the card Speed */
112
113} HAL_SD_CardInfoTypeDef;
114
115/**
116 * @brief SD handle Structure definition
117 */
118#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
119typedef struct __SD_HandleTypeDef
120#else
121typedef struct
122#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
123{
124 SD_TypeDef *Instance; /*!< SD registers base address */
125
126 SD_InitTypeDef Init; /*!< SD required parameters */
127
128 HAL_LockTypeDef Lock; /*!< SD locking object */
129
130 const uint8_t *pTxBuffPtr; /*!< Pointer to SD Tx transfer Buffer */
131
132 uint32_t TxXferSize; /*!< SD Tx Transfer size */
133
134 uint8_t *pRxBuffPtr; /*!< Pointer to SD Rx transfer Buffer */
135
136 uint32_t RxXferSize; /*!< SD Rx Transfer size */
137
138 __IO uint32_t Context; /*!< SD transfer context */
139
140 __IO HAL_SD_StateTypeDef State; /*!< SD card State */
141
142 __IO uint32_t ErrorCode; /*!< SD Card Error codes */
143
144 HAL_SD_CardInfoTypeDef SdCard; /*!< SD Card information */
145
146 uint32_t CSD[4]; /*!< SD card specific data table */
147
148 uint32_t CID[4]; /*!< SD card identification number table */
149
150#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
151 void (* TxCpltCallback)(struct __SD_HandleTypeDef *hsd);
152 void (* RxCpltCallback)(struct __SD_HandleTypeDef *hsd);
153 void (* ErrorCallback)(struct __SD_HandleTypeDef *hsd);
154 void (* AbortCpltCallback)(struct __SD_HandleTypeDef *hsd);
155 void (* Read_DMADblBuf0CpltCallback)(struct __SD_HandleTypeDef *hsd);
156 void (* Read_DMADblBuf1CpltCallback)(struct __SD_HandleTypeDef *hsd);
157 void (* Write_DMADblBuf0CpltCallback)(struct __SD_HandleTypeDef *hsd);
158 void (* Write_DMADblBuf1CpltCallback)(struct __SD_HandleTypeDef *hsd);
159#if (USE_SD_TRANSCEIVER != 0U)
160 void (* DriveTransceiver_1_8V_Callback)(FlagStatus status);
161#endif /* USE_SD_TRANSCEIVER */
162
163 void (* MspInitCallback)(struct __SD_HandleTypeDef *hsd);
164 void (* MspDeInitCallback)(struct __SD_HandleTypeDef *hsd);
165#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
166} SD_HandleTypeDef;
167
168/**
169 * @}
170 */
171
172/** @defgroup SD_Exported_Types_Group4 Card Specific Data: CSD Register
173 * @{
174 */
175typedef struct
176{
177 __IO uint8_t CSDStruct; /*!< CSD structure */
178 __IO uint8_t SysSpecVersion; /*!< System specification version */
179 __IO uint8_t Reserved1; /*!< Reserved */
180 __IO uint8_t TAAC; /*!< Data read access time 1 */
181 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
182 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
183 __IO uint16_t CardComdClasses; /*!< Card command classes */
184 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
185 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
186 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
187 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
188 __IO uint8_t DSRImpl; /*!< DSR implemented */
189 __IO uint8_t Reserved2; /*!< Reserved */
190 __IO uint32_t DeviceSize; /*!< Device Size */
191 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
192 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
193 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
194 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
195 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
196 __IO uint8_t EraseGrSize; /*!< Erase group size */
197 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
198 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
199 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
200 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
201 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
202 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
203 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
204 __IO uint8_t Reserved3; /*!< Reserved */
205 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
206 __IO uint8_t FileFormatGroup; /*!< File format group */
207 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
208 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
209 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
210 __IO uint8_t FileFormat; /*!< File format */
211 __IO uint8_t ECC; /*!< ECC code */
212 __IO uint8_t CSD_CRC; /*!< CSD CRC */
213 __IO uint8_t Reserved4; /*!< Always 1 */
214} HAL_SD_CardCSDTypeDef;
215/**
216 * @}
217 */
218
219/** @defgroup SD_Exported_Types_Group5 Card Identification Data: CID Register
220 * @{
221 */
222typedef struct
223{
224 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
225 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
226 __IO uint32_t ProdName1; /*!< Product Name part1 */
227 __IO uint8_t ProdName2; /*!< Product Name part2 */
228 __IO uint8_t ProdRev; /*!< Product Revision */
229 __IO uint32_t ProdSN; /*!< Product Serial Number */
230 __IO uint8_t Reserved1; /*!< Reserved1 */
231 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
232 __IO uint8_t CID_CRC; /*!< CID CRC */
233 __IO uint8_t Reserved2; /*!< Always 1 */
234
235} HAL_SD_CardCIDTypeDef;
236/**
237 * @}
238 */
239
240/** @defgroup SD_Exported_Types_Group6 SD Card Status returned by ACMD13
241 * @{
242 */
243typedef struct
244{
245 __IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */
246 __IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */
247 __IO uint16_t CardType; /*!< Carries information about card type */
248 __IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */
249 __IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */
250 __IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */
251 __IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */
252 __IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */
253 __IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */
254 __IO uint8_t EraseOffset; /*!< Carries information about the erase offset */
255 __IO uint8_t UhsSpeedGrade; /*!< Carries information about the speed grade of UHS card */
256 __IO uint8_t UhsAllocationUnitSize; /*!< Carries information about the UHS card's allocation unit size */
257 __IO uint8_t VideoSpeedClass; /*!< Carries information about the Video Speed Class of UHS card */
258} HAL_SD_CardStatusTypeDef;
259/**
260 * @}
261 */
262
263#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
264/** @defgroup SD_Exported_Types_Group7 SD Callback ID enumeration definition
265 * @{
266 */
267typedef enum
268{
269 HAL_SD_TX_CPLT_CB_ID = 0x00U, /*!< SD Tx Complete Callback ID */
270 HAL_SD_RX_CPLT_CB_ID = 0x01U, /*!< SD Rx Complete Callback ID */
271 HAL_SD_ERROR_CB_ID = 0x02U, /*!< SD Error Callback ID */
272 HAL_SD_ABORT_CB_ID = 0x03U, /*!< SD Abort Callback ID */
273 HAL_SD_READ_DMA_DBL_BUF0_CPLT_CB_ID = 0x04U, /*!< SD Rx DMA Double Buffer 0 Complete Callback ID */
274 HAL_SD_READ_DMA_DBL_BUF1_CPLT_CB_ID = 0x05U, /*!< SD Rx DMA Double Buffer 1 Complete Callback ID */
275 HAL_SD_WRITE_DMA_DBL_BUF0_CPLT_CB_ID = 0x06U, /*!< SD Tx DMA Double Buffer 0 Complete Callback ID */
276 HAL_SD_WRITE_DMA_DBL_BUF1_CPLT_CB_ID = 0x07U, /*!< SD Tx DMA Double Buffer 1 Complete Callback ID */
277
278 HAL_SD_MSP_INIT_CB_ID = 0x10U, /*!< SD MspInit Callback ID */
279 HAL_SD_MSP_DEINIT_CB_ID = 0x11U /*!< SD MspDeInit Callback ID */
280} HAL_SD_CallbackIDTypeDef;
281/**
282 * @}
283 */
284
285/** @defgroup SD_Exported_Types_Group8 SD Callback pointer definition
286 * @{
287 */
288typedef void (*pSD_CallbackTypeDef)(SD_HandleTypeDef *hsd);
289#if (USE_SD_TRANSCEIVER != 0U)
290typedef void (*pSD_TransceiverCallbackTypeDef)(FlagStatus status);
291#endif /* USE_SD_TRANSCEIVER */
292/**
293 * @}
294 */
295#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
296/**
297 * @}
298 */
299
300/* Exported constants --------------------------------------------------------*/
301/** @defgroup SD_Exported_Constants SD Exported Constants
302 * @{
303 */
304
305#define BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */
306
307/** @defgroup SD_Exported_Constansts_Group1 SD Error status enumeration Structure definition
308 * @{
309 */
310#define HAL_SD_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */
311#define HAL_SD_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */
312#define HAL_SD_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */
313#define HAL_SD_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */
314#define HAL_SD_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */
315#define HAL_SD_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */
316#define HAL_SD_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */
317#define HAL_SD_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */
318#define HAL_SD_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the */
319/*!< number of transferred bytes does not match the block length */
320#define HAL_SD_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */
321#define HAL_SD_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */
322#define HAL_SD_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */
323#define HAL_SD_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock */
324/*!< command or if there was an attempt to access a locked card */
325#define HAL_SD_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */
326#define HAL_SD_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */
327#define HAL_SD_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */
328#define HAL_SD_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */
329#define HAL_SD_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */
330#define HAL_SD_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */
331#define HAL_SD_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */
332#define HAL_SD_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */
333#define HAL_SD_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */
334#define HAL_SD_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */
335#define HAL_SD_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out */
336/*!< of erase sequence command was received */
337#define HAL_SD_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */
338#define HAL_SD_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */
339#define HAL_SD_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */
340#define HAL_SD_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */
341#define HAL_SD_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */
342#define HAL_SD_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */
343#define HAL_SD_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */
344#define HAL_SD_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */
345#define HAL_SD_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */
346
347#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
348#define HAL_SD_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */
349#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
350/**
351 * @}
352 */
353
354/** @defgroup SD_Exported_Constansts_Group2 SD context enumeration
355 * @{
356 */
357#define SD_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */
358#define SD_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */
359#define SD_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */
360#define SD_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */
361#define SD_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */
362#define SD_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */
363#define SD_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */
364
365/**
366 * @}
367 */
368
369/** @defgroup SD_Exported_Constansts_Group3 SD Supported Memory Cards
370 * @{
371 */
372#define CARD_NORMAL_SPEED ((uint32_t)0x00000000U) /*!< Normal Speed Card <12.5Mo/s , Spec Version 1.01 */
373#define CARD_HIGH_SPEED ((uint32_t)0x00000100U) /*!< High Speed Card <25Mo/s , Spec version 2.00 */
374#define CARD_ULTRA_HIGH_SPEED ((uint32_t)0x00000200U) /*!< UHS-I SD Card <50Mo/s for SDR50, DDR5 Cards
375 and <104Mo/s for SDR104, Spec version 3.01 */
376
377#define CARD_SDSC ((uint32_t)0x00000000U) /*!< SD Standard Capacity <2Go */
378#define CARD_SDHC_SDXC ((uint32_t)0x00000001U) /*!< SD High Capacity <32Go, SD Extended Capacity <2To */
379#define CARD_SECURED ((uint32_t)0x00000003U)
380
381/**
382 * @}
383 */
384
385/** @defgroup SD_Exported_Constansts_Group4 SD Supported Version
386 * @{
387 */
388#define CARD_V1_X ((uint32_t)0x00000000U)
389#define CARD_V2_X ((uint32_t)0x00000001U)
390/**
391 * @}
392 */
393
394/**
395 * @}
396 */
397
398/* Exported macro ------------------------------------------------------------*/
399/** @defgroup SD_Exported_macros SD Exported Macros
400 * @brief macros to handle interrupts and specific clock configurations
401 * @{
402 */
403/** @brief Reset SD handle state.
404 * @param __HANDLE__ SD Handle.
405 * @retval None
406 */
407#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
408#define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) do { \
409 (__HANDLE__)->State = HAL_SD_STATE_RESET; \
410 (__HANDLE__)->MspInitCallback = NULL; \
411 (__HANDLE__)->MspDeInitCallback = NULL; \
412 } while(0)
413#else
414#define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SD_STATE_RESET)
415#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
416
417/**
418 * @brief Enable the SD device interrupt.
419 * @param __HANDLE__ SD Handle.
420 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled.
421 * This parameter can be one or a combination of the following values:
422 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
423 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
424 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
425 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
426 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
427 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
428 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
429 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
430 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
431 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
432 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
433 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
434 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
435 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
436 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
437 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
438 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
439 * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt
440 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
441 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
442 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
443 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
444 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
445 * @retval None
446 */
447#define __HAL_SD_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
448
449/**
450 * @brief Disable the SD device interrupt.
451 * @param __HANDLE__ SD Handle.
452 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled.
453 * This parameter can be one or a combination of the following values:
454 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
455 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
456 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
457 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
458 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
459 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
460 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
461 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
462 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
463 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
464 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
465 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
466 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
467 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
468 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
469 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
470 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
471 * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt
472 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
473 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
474 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
475 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
476 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
477 * @retval None
478 */
479#define __HAL_SD_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
480
481/**
482 * @brief Check whether the specified SD flag is set or not.
483 * @param __HANDLE__ SD Handle.
484 * @param __FLAG__ specifies the flag to check.
485 * This parameter can be one of the following values:
486 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
487 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
488 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
489 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout
490 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
491 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
492 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
493 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
494 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero)
495 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold
496 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
497 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12
498 * @arg SDMMC_FLAG_DPSMACT: Data path state machine active
499 * @arg SDMMC_FLAG_CPSMACT: Command path state machine active
500 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty
501 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full
502 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full
503 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full
504 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty
505 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty
506 * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy)
507 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected
508 * @arg SDMMC_FLAG_SDIOIT: SDIO interrupt received
509 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received
510 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout
511 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion
512 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure
513 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error
514 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete
515 * @retval The new state of SD FLAG (SET or RESET).
516 */
517#define __HAL_SD_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
518
519/**
520 * @brief Clear the SD's pending flags.
521 * @param __HANDLE__ SD Handle.
522 * @param __FLAG__ specifies the flag to clear.
523 * This parameter can be one or a combination of the following values:
524 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
525 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
526 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
527 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout
528 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
529 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
530 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
531 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
532 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero)
533 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold
534 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
535 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12
536 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected
537 * @arg SDMMC_FLAG_SDIOIT: SDIO interrupt received
538 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received
539 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout
540 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion
541 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure
542 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error
543 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete
544 * @retval None
545 */
546#define __HAL_SD_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
547
548/**
549 * @brief Check whether the specified SD interrupt has occurred or not.
550 * @param __HANDLE__ SD Handle.
551 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check.
552 * This parameter can be one of the following values:
553 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
554 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
555 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
556 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
557 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
558 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
559 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
560 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
561 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
562 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
563 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
564 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
565 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
566 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
567 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
568 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
569 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
570 * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt
571 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
572 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
573 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
574 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
575 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
576 * @retval The new state of SD IT (SET or RESET).
577 */
578#define __HAL_SD_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
579
580/**
581 * @brief Clear the SD's interrupt pending bits.
582 * @param __HANDLE__ SD Handle.
583 * @param __INTERRUPT__ specifies the interrupt pending bit to clear.
584 * This parameter can be one or a combination of the following values:
585 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
586 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
587 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
588 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
589 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
590 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
591 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
592 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
593 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt
594 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt
595 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
596 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt
597 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt
598 * @arg SDMMC_IT_SDIOIT: SDIO interrupt received interrupt
599 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt
600 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt
601 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt
602 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt
603 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt
604 * @retval None
605 */
606#define __HAL_SD_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
607
608/**
609 * @}
610 */
611
612/* Include SD HAL Extension module */
613#include "stm32h7xx_hal_sd_ex.h"
614
615/* Exported functions --------------------------------------------------------*/
616/** @defgroup SD_Exported_Functions SD Exported Functions
617 * @{
618 */
619
620/** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions
621 * @{
622 */
623HAL_StatusTypeDef HAL_SD_Init(SD_HandleTypeDef *hsd);
624HAL_StatusTypeDef HAL_SD_InitCard(SD_HandleTypeDef *hsd);
625HAL_StatusTypeDef HAL_SD_DeInit(SD_HandleTypeDef *hsd);
626void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
627void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
628/**
629 * @}
630 */
631
632/** @defgroup SD_Exported_Functions_Group2 Input and Output operation functions
633 * @{
634 */
635/* Blocking mode: Polling */
636HAL_StatusTypeDef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks,
637 uint32_t Timeout);
638HAL_StatusTypeDef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd,
639 uint32_t NumberOfBlocks, uint32_t Timeout);
640HAL_StatusTypeDef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
641/* Non-Blocking mode: IT */
642HAL_StatusTypeDef HAL_SD_ReadBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd,
643 uint32_t NumberOfBlocks);
644HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd,
645 uint32_t NumberOfBlocks);
646/* Non-Blocking mode: DMA */
647HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd,
648 uint32_t NumberOfBlocks);
649HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, const uint8_t *pData, uint32_t BlockAdd,
650 uint32_t NumberOfBlocks);
651
652void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
653
654/* Callback in non blocking modes (DMA) */
655void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd);
656void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd);
657void HAL_SD_ErrorCallback(SD_HandleTypeDef *hsd);
658void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd);
659
660#if (USE_SD_TRANSCEIVER != 0U)
661/* Callback to switch in 1.8V mode */
662void HAL_SD_DriveTransceiver_1_8V_Callback(FlagStatus status);
663#endif /* USE_SD_TRANSCEIVER */
664
665#if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
666/* SD callback registering/unregistering */
667HAL_StatusTypeDef HAL_SD_RegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackID,
668 pSD_CallbackTypeDef pCallback);
669HAL_StatusTypeDef HAL_SD_UnRegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackID);
670
671#if (USE_SD_TRANSCEIVER != 0U)
672HAL_StatusTypeDef HAL_SD_RegisterTransceiverCallback(SD_HandleTypeDef *hsd, pSD_TransceiverCallbackTypeDef pCallback);
673HAL_StatusTypeDef HAL_SD_UnRegisterTransceiverCallback(SD_HandleTypeDef *hsd);
674#endif /* USE_SD_TRANSCEIVER */
675#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
676
677/**
678 * @}
679 */
680
681/** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions
682 * @{
683 */
684HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode);
685HAL_StatusTypeDef HAL_SD_ConfigSpeedBusOperation(SD_HandleTypeDef *hsd, uint32_t SpeedMode);
686/**
687 * @}
688 */
689
690/** @defgroup SD_Exported_Functions_Group4 SD card related functions
691 * @{
692 */
693HAL_SD_CardStateTypeDef HAL_SD_GetCardState(SD_HandleTypeDef *hsd);
694HAL_StatusTypeDef HAL_SD_GetCardCID(const SD_HandleTypeDef *hsd, HAL_SD_CardCIDTypeDef *pCID);
695HAL_StatusTypeDef HAL_SD_GetCardCSD(SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypeDef *pCSD);
696HAL_StatusTypeDef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypeDef *pStatus);
697HAL_StatusTypeDef HAL_SD_GetCardInfo(const SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo);
698/**
699 * @}
700 */
701
702/** @defgroup SD_Exported_Functions_Group5 Peripheral State and Errors functions
703 * @{
704 */
705HAL_SD_StateTypeDef HAL_SD_GetState(const SD_HandleTypeDef *hsd);
706uint32_t HAL_SD_GetError(const SD_HandleTypeDef *hsd);
707/**
708 * @}
709 */
710
711/** @defgroup SD_Exported_Functions_Group6 Perioheral Abort management
712 * @{
713 */
714HAL_StatusTypeDef HAL_SD_Abort(SD_HandleTypeDef *hsd);
715HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd);
716/**
717 * @}
718 */
719
720/* Private types -------------------------------------------------------------*/
721/** @defgroup SD_Private_Types SD Private Types
722 * @{
723 */
724
725/**
726 * @}
727 */
728
729/* Private defines -----------------------------------------------------------*/
730/** @defgroup SD_Private_Defines SD Private Defines
731 * @{
732 */
733
734/**
735 * @}
736 */
737
738/* Private variables ---------------------------------------------------------*/
739/** @defgroup SD_Private_Variables SD Private Variables
740 * @{
741 */
742
743/**
744 * @}
745 */
746
747/* Private constants ---------------------------------------------------------*/
748/** @defgroup SD_Private_Constants SD Private Constants
749 * @{
750 */
751
752/**
753 * @}
754 */
755
756/* Private macros ------------------------------------------------------------*/
757/** @defgroup SD_Private_Macros SD Private Macros
758 * @{
759 */
760
761/**
762 * @}
763 */
764
765/* Private functions prototypes ----------------------------------------------*/
766/** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes
767 * @{
768 */
769
770/**
771 * @}
772 */
773
774/* Private functions ---------------------------------------------------------*/
775/** @defgroup SD_Private_Functions SD Private Functions
776 * @{
777 */
778
779/**
780 * @}
781 */
782
783
784/**
785 * @}
786 */
787
788/**
789 * @}
790 */
791#endif /* SDMMC1 || SDMMC2 */
792
793/**
794 * @}
795 */
796
797#ifdef __cplusplus
798}
799#endif
800
801
802#endif /* STM32H7xx_HAL_SD_H */
__IO
#define __IO
Defines 'read / write' permissions.
Definition core_armv81mml.h:290
State
State
Definition main.cpp:72
FlagStatus
FlagStatus
Definition stm32h7xx.h:181
anonymous_namespace{radio_task.cpp}::status
radio_status_t status
Definition radio_task.cpp:83
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition stm32h7xx_hal_def.h:40
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition stm32h7xx_hal_def.h:51
stm32h7xx_hal_sd_ex.h
Header file of SD HAL extended module.
stm32h7xx_ll_delayblock.h
Header file of Delay Block module.
stm32h7xx_ll_sdmmc.h
Header file of SDMMC HAL module.