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Cal STAR — firmware, DAQ server, and engine design
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test_ism330dhcx.c
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1#include <stdio.h>
2#include <stdlib.h>
3#include <string.h>
4
5#include "dev_ism330dhcx.h"
6#include "fake_regs.h"
7
8#define CHECK(c) \
9 do { \
10 if (!(c)) { \
11 fprintf(stderr, "%s:%d: %s\n", __FILE__, __LINE__, #c); \
12 exit(1); \
13 } \
14 } while (0)
15
16/* A chip that answers WHO_AM_I and finishes its reset after two reads. */
17static void healthy(fake_regs_t* f) {
18 fake_regs_init(f, false);
19 f->regs[0x0F] = 0x6B;
20 f->self_clear_reg = 0x12;
21 f->self_clear_bits = 0x01;
22 f->clear_after_reads = 2;
23}
24
27 healthy(&f);
28 dev_bus_t bus = fake_regs_bus(&f);
29 CHECK(ism330_init(&bus) == DEV_OK);
30 /* Reset first, then the configuration in this order (DS13012 Rev 7). */
31 static const uint8_t reg[] = {0x12, 0x12, 0x13, 0x10, 0x11, 0x0B, 0x0D};
32 static const uint8_t val[] = {0x01, 0x44, 0x04, 0x74, 0x71, 0x80, 0x01};
33 CHECK(f.writes == sizeof(reg));
34 for (unsigned i = 0; i < sizeof(reg); ++i) {
35 CHECK(f.write_reg[i] == reg[i]);
36 CHECK(f.write_val[i] == val[i]);
37 }
38 CHECK(f.delays_ms >= 1);
39}
40
43 healthy(&f);
44 f.regs[0x0F] = 0x6A;
45 dev_bus_t bus = fake_regs_bus(&f);
47 CHECK(f.writes == 0);
48}
49
52 fake_regs_init(&f, false);
53 memset(f.regs, 0xFF, sizeof(f.regs));
54 dev_bus_t bus = fake_regs_bus(&f);
56}
57
60 healthy(&f);
61 f.clear_after_reads = 0; /* SW_RESET stays set */
62 dev_bus_t bus = fake_regs_bus(&f);
64 CHECK(f.writes == 1); /* only the reset itself */
65}
66
69 healthy(&f);
70 f.stuck[0x10] = 0x0F; /* low bits of CTRL1_XL ignore writes */
71 f.regs[0x10] = 0x0A;
72 dev_bus_t bus = fake_regs_bus(&f);
74}
75
76static void test_bus_error_is_reported(void) {
78 healthy(&f);
79 f.fail_after = 3;
80 dev_bus_t bus = fake_regs_bus(&f);
82}
83
84static void test_read_decodes_the_burst(void) {
86 healthy(&f);
87 /* 20h..2Dh: temp 0x0100 (+1 degC), gyro x/y/z, accel x/y/z,
88 * little-endian, two's complement. */
89 static const uint8_t out[14] = {0x00, 0x01, 0x34, 0x12, 0xCC, 0xED, 0x00,
90 0x80, 0xFF, 0x7F, 0x01, 0x00, 0x00, 0xF8};
91 memcpy(&f.regs[0x20], out, sizeof(out));
92 dev_bus_t bus = fake_regs_bus(&f);
94 CHECK(ism330_read(&bus, &s) == DEV_OK);
95 CHECK(s.temp == 256);
96 CHECK(s.gyro[0] == 0x1234);
97 CHECK(s.gyro[1] == -0x1234);
98 CHECK(s.gyro[2] == -32768);
99 CHECK(s.accel[0] == 32767);
100 CHECK(s.accel[1] == 1);
101 CHECK(s.accel[2] == -2048); /* -2048 x 0.488 mg = -1.0 g */
102 CHECK(f.transfers == 1); /* one burst, not 7 reads */
103}
104
112
@ DEV_ERR_VERIFY
Definition dev_bus.h:20
@ DEV_OK
Definition dev_bus.h:17
@ DEV_ERR_PARAM
Definition dev_bus.h:22
@ DEV_ERR_TIMEOUT
Definition dev_bus.h:21
@ DEV_ERR_ID
Definition dev_bus.h:19
@ DEV_ERR_BUS
Definition dev_bus.h:18
uint8_t reg
int ism330_init(const dev_bus_t *bus)
int ism330_read(const dev_bus_t *bus, ism330_sample_t *out)
dev_bus_t fake_regs_bus(fake_regs_t *f)
Definition fake_regs.c:59
void fake_regs_init(fake_regs_t *f, bool ms_bit)
Definition fake_regs.c:5
#define NULL
Definition usbd_def.h:44
uint8_t self_clear_bits
Definition fake_regs.h:21
uint8_t regs[128]
Definition fake_regs.h:17
unsigned writes
Definition fake_regs.h:26
uint8_t self_clear_reg
Definition fake_regs.h:20
uint8_t stuck[128]
Definition fake_regs.h:24
unsigned delays_ms
Definition fake_regs.h:29
uint8_t write_reg[64]
Definition fake_regs.h:27
unsigned transfers
Definition fake_regs.h:25
int fail_after
Definition fake_regs.h:19
unsigned clear_after_reads
Definition fake_regs.h:22
uint8_t write_val[64]
Definition fake_regs.h:28
int main()
static void test_read_decodes_the_burst(void)
static void test_wrong_identity_is_refused_before_any_write(void)
static void test_bus_error_is_reported(void)
static void test_init_writes_the_datasheet_configuration(void)
#define CHECK(c)
static void test_missing_arguments_are_refused(void)
static void test_reset_that_never_finishes_times_out(void)
static void test_register_that_does_not_read_back_fails(void)
static void test_dead_bus_reads_ff_and_is_refused(void)
static void healthy(fake_regs_t *f)