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ADC Extended Private Macros
STM32H7xx_HAL_Driver » ADCEx
Collaboration diagram for ADC Extended Private Macros:

Macros

#define ADC_IS_SOFTWARE_START_INJECTED(__HANDLE__)
 Test if conversion trigger of injected group is software start or external trigger.
#define ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(__HANDLE__)
 Check if conversion is on going on regular or injected groups.
#define ADC_IS_CONVERSION_ONGOING_INJECTED(__HANDLE__)
 Check if conversion is on going on injected group.
#define ADC_JSQR_RK(__CHANNELNB__, __RANKNB__)
 Set the selected injected Channel rank.
#define ADC_CFGR_INJECT_CONTEXT_QUEUE(__INJECT_CONTEXT_QUEUE_MODE__)
 Configure ADC injected context queue.
#define ADC_CFGR_INJECT_DISCCONTINUOUS(__INJECT_DISCONTINUOUS_MODE__)
 Configure ADC discontinuous conversion mode for injected group.
#define ADC_CFGR_REG_DISCONTINUOUS(__REG_DISCONTINUOUS_MODE__)
 Configure ADC discontinuous conversion mode for regular group.
#define ADC_CFGR_DISCONTINUOUS_NUM(__NBR_DISCONTINUOUS_CONV__)
 Configure the number of discontinuous conversions for regular group.
#define ADC_CFGR_AUTOWAIT(__AUTOWAIT__)
 Configure the ADC auto delay mode.
#define ADC_CFGR_CONTINUOUS(__CONTINUOUS_MODE__)
 Configure ADC continuous conversion mode.
#define ADC_CFGR_DMACONTREQ(__DMACONTREQ_MODE__)
 Enable the ADC DMA continuous request.
#define ADC_OFR_CHANNEL(__CHANNEL__)
 Configure the channel number into offset OFRx register.
#define ADC_DIFSEL_CHANNEL(__CHANNEL__)
 Configure the channel number into differential mode selection register.
#define ADC_CALFACT_DIFF_SET(__CALIBRATION_FACTOR__)
 Configure calibration factor in differential mode to be set into calibration register.
#define ADC_CALFACT_DIFF_GET(__CALIBRATION_FACTOR__)
 Calibration factor in differential mode to be retrieved from calibration register.
#define ADC_TRX_HIGHTHRESHOLD(__THRESHOLD__)
 Configure the analog watchdog high threshold into registers TR1, TR2 or TR3.
#define ADC_CCR_MULTI_DMACONTREQ(__DMACONTREQ_MODE__)
 Configure the ADC DMA continuous request for ADC multimode.
#define ADC_OFFSET_SHIFT_RESOLUTION(__HANDLE__, __OFFSET__)
 Shift the offset in function of the selected ADC resolution.
#define ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, __THRESHOLD__)
 Shift the AWD1 threshold in function of the selected ADC resolution.
#define ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, __THRESHOLD__)
 Shift the AWD2 and AWD3 threshold in function of the selected ADC resolution.
#define ADC12_COMMON_REGISTER(__HANDLE__)
 Clear Common Control Register.
#define ADC_MASTER_REGISTER(__HANDLE__)
 Report Master Instance.
#define ADC_IS_DUAL_REGULAR_CONVERSION_ENABLE(__HANDLE__)
 Check whether or not dual regular conversions are enabled.
#define ADC12_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__)
 Verification of condition for ADC start conversion: ADC must be in non-MultiMode or MultiMode with handle of ADC master.
#define ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(__HANDLE__)
 Ensure ADC Instance is Independent or Master, or is not Slave ADC with dual regular conversions enabled.
#define ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(__HANDLE__)
 Ensure ADC Instance is Independent or Master, or is not Slave ADC with dual injected conversions enabled.
#define ADC_CLEAR_COMMON_CONTROL_REGISTER(__HANDLE__)
#define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__)
 Set handle instance of the ADC slave associated to the ADC master.
#define ADC_TEMPERATURE_SENSOR_INSTANCE(__HANDLE__)
 Verify the ADC instance connected to the temperature sensor.
#define ADC_BATTERY_VOLTAGE_INSTANCE(__HANDLE__)
 Verify the ADC instance connected to the battery voltage VBAT.
#define ADC_VREFINT_INSTANCE(__HANDLE__)
 Verify the ADC instance connected to the internal voltage reference VREFINT.
#define IS_ADC_INJECTED_NB_CONV(__LENGTH__)
 Verify the length of scheduled injected conversions group.
#define IS_ADC_CALFACT(__CALIBRATION_FACTOR__)
 Calibration factor size verification (11 bits maximum).
#define IS_ADC_CHANNEL(__CHANNEL__)
 Verify the ADC channel setting.
#define IS_ADC1_DIFF_CHANNEL(__CHANNEL__)
 Verify the ADC channel setting in differential mode for ADC1.
#define IS_ADC2_DIFF_CHANNEL(__CHANNEL__)
 Verify the ADC channel setting in differential mode for ADC2.
#define IS_ADC3_DIFF_CHANNEL(__CHANNEL__)
 Verify the ADC channel setting in differential mode for ADC3.
#define ADC_CHANNEL_DIFF_NEG_INPUT_ADC1(__CHANNEL__)
 Helper macro to determine the selected channel corresponding negative input for ADC1.
#define ADC_CHANNEL_DIFF_NEG_INPUT_ADC2(__CHANNEL__)
 Helper macro to determine the selected channel corresponding negative input for ADC2.
#define ADC_CHANNEL_DIFF_NEG_INPUT(__HANDLE__, __CHANNEL__)
 Helper macro to determine the selected channel corresponding negative input on the ADC instance selected.
#define IS_ADC_SINGLE_DIFFERENTIAL(__SING_DIFF__)
 Verify the ADC single-ended input or differential mode setting.
#define IS_ADC_OFFSET_NUMBER(__OFFSET_NUMBER__)
 Verify the ADC offset management setting.
#define IS_ADC_INJECTED_RANK(__CHANNEL__)
 Verify the ADC injected channel setting.
#define IS_ADC_EXTTRIGINJEC(__INJTRIG__)
 Verify the ADC injected conversions external trigger.
#define IS_ADC_EXTTRIGINJEC_EDGE(__EDGE__)
 Verify the ADC edge trigger setting for injected group.
#define IS_ADC_MULTIMODE(__MODE__)
 Verify the ADC multimode setting.
#define IS_ADC_DUAL_DATA_MODE(MODE)
 Verify the ADC dual data mode setting.
#define IS_ADC_SAMPLING_DELAY(__DELAY__)
 Verify the ADC multimode delay setting.
#define IS_ADC_ANALOG_WATCHDOG_NUMBER(__WATCHDOG__)
 Verify the ADC analog watchdog setting.
#define IS_ADC_ANALOG_WATCHDOG_MODE(__WATCHDOG_MODE__)
 Verify the ADC analog watchdog mode setting.
#define IS_ADC_CONVERSION_GROUP(__CONVERSION__)
 Verify the ADC conversion (regular or injected or both).
#define IS_ADC_EVENT_TYPE(__EVENT__)
 Verify the ADC event type.
#define IS_ADC_OVERSAMPLING_RATIO(RATIO)
 Verify the ADC oversampling ratio.
#define IS_ADC_RIGHT_BIT_SHIFT(__SHIFT__)
 Verify the ADC oversampling shift.
#define IS_ADC_TRIGGERED_OVERSAMPLING_MODE(__MODE__)
 Verify the ADC oversampling triggered mode.
#define IS_ADC_REGOVERSAMPLING_MODE(__MODE__)
 Verify the ADC oversampling regular conversion resumed or continued mode.
#define IS_ADC_DFSDMCFG_MODE(__HANDLE__)
 Verify the DFSDM mode configuration.
#define ADC_CFGR_DFSDM(__HANDLE__)
 Return the DFSDM configuration mode.

Detailed Description

Macro Definition Documentation

◆ ADC12_COMMON_REGISTER

#define ADC12_COMMON_REGISTER ( __HANDLE__)
Value:
(ADC12_COMMON)
ADC12_COMMON
#define ADC12_COMMON
Definition stm32h723xx.h:2530

Clear Common Control Register.

Parameters
__HANDLE__ADC handle.
Return values
None

Report common register to ADC1 and ADC2

Parameters
__HANDLE__ADC handle
Return values
Commoncontrol register

Definition at line 742 of file stm32h7xx_hal_adc_ex.h.

◆ ADC12_NONMULTIMODE_OR_MULTIMODEMASTER

#define ADC12_NONMULTIMODE_OR_MULTIMODEMASTER ( __HANDLE__)
Value:
( ( ((__HANDLE__)->Instance == ADC1) || ((__HANDLE__)->Instance == ADC2) \
)? \
SET \
: \
((ADC12_COMMON->CCR & ADC_CCR_DUAL) == RESET) \
)
RESET
@ RESET
Definition stm32h7xx.h:182
SET
@ SET
Definition stm32h7xx.h:183
ADC_CCR_DUAL
#define ADC_CCR_DUAL
Dual ADC mode selection.
Definition stm32h723xx.h:4062
ADC1
#define ADC1
Definition stm32h723xx.h:2526
ADC2
#define ADC2
Definition stm32h723xx.h:2527

Verification of condition for ADC start conversion: ADC must be in non-MultiMode or MultiMode with handle of ADC master.

Parameters
__HANDLE__ADC handle
Return values
SET(non-MultiMode or Master handle) or RESET (handle of Slave ADC in MultiMode)

Definition at line 789 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_AWD1THRESHOLD_SHIFT_RESOLUTION

#define ADC_AWD1THRESHOLD_SHIFT_RESOLUTION ( __HANDLE__,
__THRESHOLD__ )
Value:
(((DBGMCU->IDCODE & 0xF0000000UL) == 0x10000000UL) \
? ((__THRESHOLD__)<<(((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES)>> 2UL)*2UL)) \
: \
((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES_2) == 0UL) \
? ((__THRESHOLD__)<<(((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES)>> 2UL)*2UL)) \
: \
((__THRESHOLD__)<<(((((__HANDLE__)->Instance->CFGR) & (ADC_CFGR_RES & 0xFFFFFFF3UL))>> 2UL )*2UL)) \
)
ADC_CFGR_RES
#define ADC_CFGR_RES
ADC Data resolution.
Definition stm32h723xx.h:2866
ADC_CFGR_RES_2
#define ADC_CFGR_RES_2
0x00000010
Definition stm32h723xx.h:2869
DBGMCU
#define DBGMCU
Definition stm32h723xx.h:2655

Shift the AWD1 threshold in function of the selected ADC resolution.

Note
Thresholds have to be left-aligned on bit 15, the LSB (right bits) are set to 0. If resolution 16 bits, no shift. If resolution 14 bits, shift of 2 ranks on the left. If resolution 12 bits, shift of 4 ranks on the left. If resolution 10 bits, shift of 6 ranks on the left. If resolution 8 bits, shift of 8 ranks on the left. therefore, shift = (16 - resolution) = 16 - (16- (((RES[2:0]) >> 2)*2))
Parameters
__HANDLE__ADC handle
__THRESHOLD__Value to be shifted
Return values
None

Definition at line 689 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_AWD23THRESHOLD_SHIFT_RESOLUTION

#define ADC_AWD23THRESHOLD_SHIFT_RESOLUTION ( __HANDLE__,
__THRESHOLD__ )
Value:
(((DBGMCU->IDCODE & 0xF0000000UL) == 0x10000000UL) \
? ((__THRESHOLD__)<<(((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES)>> 2UL)*2UL)) \
: \
((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES_2) == 0UL) \
? ((__THRESHOLD__)<<(((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES)>> 2UL)*2UL)) \
: \
((__THRESHOLD__)<<(((((__HANDLE__)->Instance->CFGR) & (ADC_CFGR_RES & 0xFFFFFFF3UL))>> 2UL )*2UL)) \
)

Shift the AWD2 and AWD3 threshold in function of the selected ADC resolution.

Note
Thresholds have to be left-aligned on bit 15, the LSB (right bits) are set to 0. If resolution 16 bits, no shift. If resolution 14 bits, shift of 2 ranks on the left. If resolution 12 bits, shift of 4 ranks on the left. If resolution 10 bits, shift of 6 ranks on the left. If resolution 8 bits, shift of 8 ranks on the left. therefore, shift = (16 - resolution) = 16 - (16- (((RES[2:0]) >> 2)*2))
Parameters
__HANDLE__ADC handle
__THRESHOLD__Value to be shifted
Return values
None

Definition at line 722 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_BATTERY_VOLTAGE_INSTANCE

#define ADC_BATTERY_VOLTAGE_INSTANCE ( __HANDLE__)
Value:
(((__HANDLE__)->Instance) == ADC2)

Verify the ADC instance connected to the battery voltage VBAT.

Parameters
__HANDLE__ADC handle.
Return values
SET(ADC instance is valid) or RESET (ADC instance is invalid)

Definition at line 899 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CALFACT_DIFF_GET

#define ADC_CALFACT_DIFF_GET ( __CALIBRATION_FACTOR__)
Value:
((__CALIBRATION_FACTOR__) >> ADC_CALFACT_CALFACT_D_Pos)
ADC_CALFACT_CALFACT_D_Pos
#define ADC_CALFACT_CALFACT_D_Pos
Definition stm32h723xx.h:3940

Calibration factor in differential mode to be retrieved from calibration register.

Parameters
__CALIBRATION_FACTOR__Calibration factor value.
Return values
None

Definition at line 599 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CALFACT_DIFF_SET

#define ADC_CALFACT_DIFF_SET ( __CALIBRATION_FACTOR__)
Value:
(((__CALIBRATION_FACTOR__) & (ADC_CALFACT_CALFACT_D_Pos >> ADC_CALFACT_CALFACT_D_Pos) ) << ADC_CALFACT_CALFACT_D_Pos)

Configure calibration factor in differential mode to be set into calibration register.

Parameters
__CALIBRATION_FACTOR__Calibration factor value.
Return values
None

Definition at line 592 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CCR_MULTI_DMACONTREQ

#define ADC_CCR_MULTI_DMACONTREQ ( __DMACONTREQ_MODE__)
Value:
((__DMACONTREQ_MODE__) << ADC_CCR_DMACFG_Pos)

Configure the ADC DMA continuous request for ADC multimode.

Parameters
__DMACONTREQ_MODE__DMA continuous request mode.
Return values
None

Definition at line 613 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CFGR_AUTOWAIT

#define ADC_CFGR_AUTOWAIT ( __AUTOWAIT__)
Value:
((__AUTOWAIT__) << ADC_CFGR_AUTDLY_Pos)
ADC_CFGR_AUTDLY_Pos
#define ADC_CFGR_AUTDLY_Pos
Definition stm32h723xx.h:2892

Configure the ADC auto delay mode.

Parameters
__AUTOWAIT__Auto delay bit enable or disable.
Return values
None

Definition at line 549 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CFGR_CONTINUOUS

#define ADC_CFGR_CONTINUOUS ( __CONTINUOUS_MODE__)
Value:
((__CONTINUOUS_MODE__) << ADC_CFGR_CONT_Pos)
ADC_CFGR_CONT_Pos
#define ADC_CFGR_CONT_Pos
Definition stm32h723xx.h:2889

Configure ADC continuous conversion mode.

Parameters
__CONTINUOUS_MODE__Continuous mode.
Return values
None

Definition at line 556 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CFGR_DFSDM

#define ADC_CFGR_DFSDM ( __HANDLE__)
Value:
(0x0UL)

Return the DFSDM configuration mode.

Parameters
__HANDLE__ADC handle.
Note
When DMSDFM configuration is not supported, the macro systematically reports 0x0 (i.e disabled). For this reason, the input parameter is the ADC handle and not the configuration parameter directly.
Return values
DFSDMconfiguration mode

Definition at line 1368 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CFGR_DISCONTINUOUS_NUM

#define ADC_CFGR_DISCONTINUOUS_NUM ( __NBR_DISCONTINUOUS_CONV__)
Value:
(((__NBR_DISCONTINUOUS_CONV__) - 1UL) << ADC_CFGR_DISCNUM_Pos)
ADC_CFGR_DISCNUM_Pos
#define ADC_CFGR_DISCNUM_Pos
Definition stm32h723xx.h:2900

Configure the number of discontinuous conversions for regular group.

Parameters
__NBR_DISCONTINUOUS_CONV__Number of discontinuous conversions.
Return values
None

Definition at line 542 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CFGR_DMACONTREQ

#define ADC_CFGR_DMACONTREQ ( __DMACONTREQ_MODE__)
Value:
((__DMACONTREQ_MODE__))

Enable the ADC DMA continuous request.

Parameters
__DMACONTREQ_MODE__DMA continuous request mode.
Return values
None

Definition at line 563 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CFGR_INJECT_CONTEXT_QUEUE

#define ADC_CFGR_INJECT_CONTEXT_QUEUE ( __INJECT_CONTEXT_QUEUE_MODE__)
Value:
((__INJECT_CONTEXT_QUEUE_MODE__) << ADC_CFGR_JQM_Pos)
ADC_CFGR_JQM_Pos
#define ADC_CFGR_JQM_Pos
Definition stm32h723xx.h:2910

Configure ADC injected context queue.

Parameters
__INJECT_CONTEXT_QUEUE_MODE__Injected context queue mode.
Return values
None

Definition at line 521 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CFGR_INJECT_DISCCONTINUOUS

#define ADC_CFGR_INJECT_DISCCONTINUOUS ( __INJECT_DISCONTINUOUS_MODE__)
Value:
((__INJECT_DISCONTINUOUS_MODE__) << ADC_CFGR_JDISCEN_Pos)
ADC_CFGR_JDISCEN_Pos
#define ADC_CFGR_JDISCEN_Pos
Definition stm32h723xx.h:2907

Configure ADC discontinuous conversion mode for injected group.

Parameters
__INJECT_DISCONTINUOUS_MODE__Injected discontinuous mode.
Return values
None

Definition at line 528 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CFGR_REG_DISCONTINUOUS

#define ADC_CFGR_REG_DISCONTINUOUS ( __REG_DISCONTINUOUS_MODE__)
Value:
((__REG_DISCONTINUOUS_MODE__) << ADC_CFGR_DISCEN_Pos)
ADC_CFGR_DISCEN_Pos
#define ADC_CFGR_DISCEN_Pos
Definition stm32h723xx.h:2896

Configure ADC discontinuous conversion mode for regular group.

Parameters
__REG_DISCONTINUOUS_MODE__Regular discontinuous mode.
Return values
None

Definition at line 535 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CHANNEL_DIFF_NEG_INPUT

#define ADC_CHANNEL_DIFF_NEG_INPUT ( __HANDLE__,
__CHANNEL__ )
Value:
((((__HANDLE__)->Instance) == ADC1) ? ADC_CHANNEL_DIFF_NEG_INPUT_ADC1(__CHANNEL__) : \
(((__HANDLE__)->Instance) == ADC2) ? ADC_CHANNEL_DIFF_NEG_INPUT_ADC2(__CHANNEL__) : 0UL)
ADC_CHANNEL_DIFF_NEG_INPUT_ADC2
#define ADC_CHANNEL_DIFF_NEG_INPUT_ADC2(__CHANNEL__)
Helper macro to determine the selected channel corresponding negative input for ADC2.
Definition stm32h7xx_hal_adc_ex.h:1037
ADC_CHANNEL_DIFF_NEG_INPUT_ADC1
#define ADC_CHANNEL_DIFF_NEG_INPUT_ADC1(__CHANNEL__)
Helper macro to determine the selected channel corresponding negative input for ADC1.
Definition stm32h7xx_hal_adc_ex.h:1020

Helper macro to determine the selected channel corresponding negative input on the ADC instance selected.

Parameters
__HANDLE__ADC handle.
__CHANNEL__This parameter can be one of the following values:
Return values
returnthe negative input channels corresponding to the selected channel.

Definition at line 1084 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CHANNEL_DIFF_NEG_INPUT_ADC1

#define ADC_CHANNEL_DIFF_NEG_INPUT_ADC1 ( __CHANNEL__)
Value:
(((__CHANNEL__) == ADC_CHANNEL_1) ? ADC_CHANNEL_0 : \
((__CHANNEL__) == ADC_CHANNEL_2) ? ADC_CHANNEL_6 : \
((__CHANNEL__) == ADC_CHANNEL_3) ? ADC_CHANNEL_7 : \
((__CHANNEL__) == ADC_CHANNEL_4) ? ADC_CHANNEL_8 : \
((__CHANNEL__) == ADC_CHANNEL_5) ? ADC_CHANNEL_9 : \
((__CHANNEL__) == ADC_CHANNEL_10) ? ADC_CHANNEL_11 : \
((__CHANNEL__) == ADC_CHANNEL_11) ? ADC_CHANNEL_12 : \
((__CHANNEL__) == ADC_CHANNEL_12) ? ADC_CHANNEL_13 : \
((__CHANNEL__) == ADC_CHANNEL_16) ? ADC_CHANNEL_17 : \
((__CHANNEL__) == ADC_CHANNEL_18) ? ADC_CHANNEL_19 : 0UL)
ADC_CHANNEL_7
#define ADC_CHANNEL_7
ADC external channel (channel connected to GPIO pin) ADCx_IN7.
Definition stm32h7xx_hal_adc.h:709
ADC_CHANNEL_18
#define ADC_CHANNEL_18
ADC external channel (channel connected to GPIO pin) ADCx_IN18.
Definition stm32h7xx_hal_adc.h:720
ADC_CHANNEL_19
#define ADC_CHANNEL_19
ADC external channel (channel connected to GPIO pin) ADCx_IN19.
Definition stm32h7xx_hal_adc.h:721
ADC_CHANNEL_0
#define ADC_CHANNEL_0
ADC external channel (channel connected to GPIO pin) ADCx_IN0.
Definition stm32h7xx_hal_adc.h:702
ADC_CHANNEL_6
#define ADC_CHANNEL_6
ADC external channel (channel connected to GPIO pin) ADCx_IN6.
Definition stm32h7xx_hal_adc.h:708
ADC_CHANNEL_3
#define ADC_CHANNEL_3
ADC external channel (channel connected to GPIO pin) ADCx_IN3.
Definition stm32h7xx_hal_adc.h:705
ADC_CHANNEL_4
#define ADC_CHANNEL_4
ADC external channel (channel connected to GPIO pin) ADCx_IN4.
Definition stm32h7xx_hal_adc.h:706
ADC_CHANNEL_5
#define ADC_CHANNEL_5
ADC external channel (channel connected to GPIO pin) ADCx_IN5.
Definition stm32h7xx_hal_adc.h:707
ADC_CHANNEL_16
#define ADC_CHANNEL_16
ADC external channel (channel connected to GPIO pin) ADCx_IN16.
Definition stm32h7xx_hal_adc.h:718
ADC_CHANNEL_9
#define ADC_CHANNEL_9
ADC external channel (channel connected to GPIO pin) ADCx_IN9.
Definition stm32h7xx_hal_adc.h:711
ADC_CHANNEL_10
#define ADC_CHANNEL_10
ADC external channel (channel connected to GPIO pin) ADCx_IN10.
Definition stm32h7xx_hal_adc.h:712
ADC_CHANNEL_8
#define ADC_CHANNEL_8
ADC external channel (channel connected to GPIO pin) ADCx_IN8.
Definition stm32h7xx_hal_adc.h:710
ADC_CHANNEL_2
#define ADC_CHANNEL_2
ADC external channel (channel connected to GPIO pin) ADCx_IN2.
Definition stm32h7xx_hal_adc.h:704
ADC_CHANNEL_12
#define ADC_CHANNEL_12
ADC external channel (channel connected to GPIO pin) ADCx_IN12.
Definition stm32h7xx_hal_adc.h:714
ADC_CHANNEL_13
#define ADC_CHANNEL_13
ADC external channel (channel connected to GPIO pin) ADCx_IN13.
Definition stm32h7xx_hal_adc.h:715
ADC_CHANNEL_1
#define ADC_CHANNEL_1
ADC external channel (channel connected to GPIO pin) ADCx_IN1.
Definition stm32h7xx_hal_adc.h:703
ADC_CHANNEL_11
#define ADC_CHANNEL_11
ADC external channel (channel connected to GPIO pin) ADCx_IN11.
Definition stm32h7xx_hal_adc.h:713
ADC_CHANNEL_17
#define ADC_CHANNEL_17
ADC external channel (channel connected to GPIO pin) ADCx_IN17.
Definition stm32h7xx_hal_adc.h:719

Helper macro to determine the selected channel corresponding negative input for ADC1.

Parameters
__CHANNEL__programmed ADC channel.
Return values
returnthe negative input channels corresponding to the selected channel.

Definition at line 1020 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CHANNEL_DIFF_NEG_INPUT_ADC2

#define ADC_CHANNEL_DIFF_NEG_INPUT_ADC2 ( __CHANNEL__)
Value:
(((__CHANNEL__) == ADC_CHANNEL_1) ? ADC_CHANNEL_0 : \
((__CHANNEL__) == ADC_CHANNEL_2) ? ADC_CHANNEL_6 : \
((__CHANNEL__) == ADC_CHANNEL_3) ? ADC_CHANNEL_7 : \
((__CHANNEL__) == ADC_CHANNEL_4) ? ADC_CHANNEL_8 : \
((__CHANNEL__) == ADC_CHANNEL_5) ? ADC_CHANNEL_9 : \
((__CHANNEL__) == ADC_CHANNEL_10) ? ADC_CHANNEL_11 : \
((__CHANNEL__) == ADC_CHANNEL_11) ? ADC_CHANNEL_12 : \
((__CHANNEL__) == ADC_CHANNEL_12) ? ADC_CHANNEL_13 : \
((__CHANNEL__) == ADC_CHANNEL_18) ? ADC_CHANNEL_19 : 0UL)

Helper macro to determine the selected channel corresponding negative input for ADC2.

Parameters
__CHANNEL__programmed ADC channel.
Return values
returnthe negative input channels corresponding to the selected channel.

Definition at line 1037 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_CLEAR_COMMON_CONTROL_REGISTER

#define ADC_CLEAR_COMMON_CONTROL_REGISTER ( __HANDLE__)
Value:
CLEAR_BIT(__LL_ADC_COMMON_INSTANCE((__HANDLE__)->Instance)->CCR, ADC_CCR_CKMODE | \
ADC_CCR_PRESC | \
ADC_CCR_VBATEN | \
ADC_CCR_TSEN | \
ADC_CCR_VREFEN | \
ADC_CCR_DAMDF | \
ADC_CCR_DELAY | \
ADC_CCR_DUAL )
CLEAR_BIT
#define CLEAR_BIT(REG, BIT)
Definition stm32h7xx.h:209
ADC_CCR_CKMODE
#define ADC_CCR_CKMODE
ADC clock mode.
Definition stm32h723xx.h:4086
ADC_CCR_PRESC
#define ADC_CCR_PRESC
ADC prescaler.
Definition stm32h723xx.h:4092
ADC_CCR_DELAY
#define ADC_CCR_DELAY
Delay between 2 sampling phases.
Definition stm32h723xx.h:4071
ADC_CCR_DAMDF
#define ADC_CCR_DAMDF
Dual ADC mode Data format.
Definition stm32h723xx.h:4080
ADC_CCR_VBATEN
#define ADC_CCR_VBATEN
VBAT enable.
Definition stm32h723xx.h:4106
ADC_CCR_TSEN
#define ADC_CCR_TSEN
Temperature sensor enable.
Definition stm32h723xx.h:4103
ADC_CCR_VREFEN
#define ADC_CCR_VREFEN
VREFINT enable.
Definition stm32h723xx.h:4100

Definition at line 860 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_DIFSEL_CHANNEL

#define ADC_DIFSEL_CHANNEL ( __CHANNEL__)
Value:
(1UL << (__CHANNEL__))

Configure the channel number into differential mode selection register.

Parameters
__CHANNEL__ADC Channel.
Return values
None

Definition at line 585 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE

#define ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE ( __HANDLE__)
Value:
( ( ((__HANDLE__)->Instance == ADC1) \
)? \
SET \
: \
( ((ADC12_COMMON->CCR & ADC_CCR_DUAL) == ADC_MODE_INDEPENDENT) || \
((ADC12_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_REGSIMULT) || \
((ADC12_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_INTERL) ))
ADC_DUALMODE_INTERL
#define ADC_DUALMODE_INTERL
ADC dual mode enabled: Combined group regular interleaved.
Definition stm32h7xx_hal_adc_ex.h:322
ADC_DUALMODE_REGSIMULT
#define ADC_DUALMODE_REGSIMULT
ADC dual mode enabled: group regular simultaneous.
Definition stm32h7xx_hal_adc_ex.h:321
ADC_MODE_INDEPENDENT
#define ADC_MODE_INDEPENDENT
ADC dual mode disabled (ADC independent mode).
Definition stm32h7xx_hal_adc_ex.h:320

Ensure ADC Instance is Independent or Master, or is not Slave ADC with dual injected conversions enabled.

Parameters
__HANDLE__ADC handle
Return values
SET(non-MultiMode or Master, or Slave without dual injected conversions enabled) or RESET (Slave ADC with dual injected conversions enabled)

Definition at line 850 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE

#define ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE ( __HANDLE__)
Value:
( ( ((__HANDLE__)->Instance == ADC1) \
)? \
SET \
: \
( ((ADC12_COMMON->CCR & ADC_CCR_DUAL) == ADC_MODE_INDEPENDENT) || \
((ADC12_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_INJECSIMULT) || \
((ADC12_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_ALTERTRIG) ))
ADC_DUALMODE_ALTERTRIG
#define ADC_DUALMODE_ALTERTRIG
ADC dual mode enabled: group injected alternate trigger.
Definition stm32h7xx_hal_adc_ex.h:324
ADC_DUALMODE_INJECSIMULT
#define ADC_DUALMODE_INJECSIMULT
ADC dual mode enabled: group injected simultaneous.
Definition stm32h7xx_hal_adc_ex.h:323

Ensure ADC Instance is Independent or Master, or is not Slave ADC with dual regular conversions enabled.

Parameters
__HANDLE__ADC handle
Return values
SET(Independent or Master, or Slave without dual regular conversions enabled) or RESET (Slave ADC with dual regular conversions enabled)

Definition at line 825 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_IS_CONVERSION_ONGOING_INJECTED

#define ADC_IS_CONVERSION_ONGOING_INJECTED ( __HANDLE__)
Value:
(LL_ADC_INJ_IsConversionOngoing((__HANDLE__)->Instance))

Check if conversion is on going on injected group.

Parameters
__HANDLE__ADC handle.
Return values
Value"0" (no conversion is on going) or value "1" (conversion is on going)

Definition at line 487 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED

#define ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ( __HANDLE__)
Value:
(( (((__HANDLE__)->Instance->CR) & (ADC_CR_ADSTART | ADC_CR_JADSTART)) == 0UL \
) ? RESET : SET)
ADC_CR_ADSTART
#define ADC_CR_ADSTART
ADC Start of Regular conversion.
Definition stm32h723xx.h:2808
ADC_CR_JADSTART
#define ADC_CR_JADSTART
ADC Start of injected conversion.
Definition stm32h723xx.h:2811

Check if conversion is on going on regular or injected groups.

Parameters
__HANDLE__ADC handle.
Return values
SET(conversion is on going) or RESET (no conversion is on going).

Definition at line 478 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_IS_DUAL_REGULAR_CONVERSION_ENABLE

#define ADC_IS_DUAL_REGULAR_CONVERSION_ENABLE ( __HANDLE__)
Value:
( ( ((((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)) \
)? \
( ((ADC12_COMMON->CCR & ADC_CCR_DUAL) != ADC_MODE_INDEPENDENT) && \
((ADC12_COMMON->CCR & ADC_CCR_DUAL) != ADC_DUALMODE_INJECSIMULT) && \
((ADC12_COMMON->CCR & ADC_CCR_DUAL) != ADC_DUALMODE_ALTERTRIG) ) \
: \
RESET \
)

Check whether or not dual regular conversions are enabled.

Parameters
__HANDLE__ADC handle
Return values
SET(dual regular conversions are enabled) or RESET (ADC is independent or no dual regular conversions are enabled)

Definition at line 774 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_IS_SOFTWARE_START_INJECTED

#define ADC_IS_SOFTWARE_START_INJECTED ( __HANDLE__)
Value:
(((__HANDLE__)->Instance->JSQR & ADC_JSQR_JEXTEN) == 0UL)
ADC_JSQR_JEXTEN
#define ADC_JSQR_JEXTEN
ADC external trigger enable and polarity selection for injected channels.
Definition stm32h723xx.h:3418

Test if conversion trigger of injected group is software start or external trigger.

Parameters
__HANDLE__ADC handle.
Return values
SET(software start) or RESET (external trigger).

Definition at line 470 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_JSQR_RK

#define ADC_JSQR_RK ( __CHANNELNB__,
__RANKNB__ )
Value:
((((__CHANNELNB__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << ((__RANKNB__) & ADC_INJ_RANK_ID_JSQR_MASK))

Set the selected injected Channel rank.

Parameters
__CHANNELNB__Channel number.
__RANKNB__Rank number.
Return values
None

Definition at line 514 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_MASTER_REGISTER

#define ADC_MASTER_REGISTER ( __HANDLE__)
Value:
( (ADC1))

Report Master Instance.

Parameters
__HANDLE__ADC handle
Note
return same instance if ADC of input handle is independent ADC
Return values
MasterInstance

Definition at line 766 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_MULTI_SLAVE

#define ADC_MULTI_SLAVE ( __HANDLE_MASTER__,
__HANDLE_SLAVE__ )
Value:
( (((__HANDLE_MASTER__)->Instance == ADC1)) ? ((__HANDLE_SLAVE__)->Instance = ADC2) : ((__HANDLE_SLAVE__)->Instance = NULL) )
NULL
#define NULL
Definition usbd_def.h:44

Set handle instance of the ADC slave associated to the ADC master.

Parameters
__HANDLE_MASTER__ADC master handle.
__HANDLE_SLAVE__ADC slave handle.
Note
if HANDLE_MASTER is the handle of a slave ADC (ADC2) or an independent ADC, HANDLE_SLAVE instance is set to NULL.
Return values
None

Definition at line 876 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_OFFSET_SHIFT_RESOLUTION

#define ADC_OFFSET_SHIFT_RESOLUTION ( __HANDLE__,
__OFFSET__ )
Value:
(((DBGMCU->IDCODE & 0xF0000000UL) == 0x10000000UL) \
? ((__OFFSET__)<<(((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES)>> 2UL)*2UL)) \
: \
((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES_2) == 0UL) \
? ((__OFFSET__)<<(((((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES)>> 2UL)*2UL)) \
: \
((__OFFSET__)<<(((((__HANDLE__)->Instance->CFGR) & (ADC_CFGR_RES & 0xFFFFFFF3UL))>> 2UL )*2UL)) \
)

Shift the offset in function of the selected ADC resolution.

Note
Offset has to be left-aligned on bit 15, the LSB (right bits) are set to 0 If resolution 16 bits, no shift. If resolution 14 bits, shift of 2 ranks on the left. If resolution 12 bits, shift of 4 ranks on the left. If resolution 10 bits, shift of 6 ranks on the left. If resolution 8 bits, shift of 8 ranks on the left. therefore, shift = (16 - resolution) = 16 - (16 - (((RES[2:0]) >> 2)*2))
Parameters
__HANDLE__ADC handle
__OFFSET__Value to be shifted
Return values
None

Definition at line 637 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_OFR_CHANNEL

#define ADC_OFR_CHANNEL ( __CHANNEL__)
Value:
((__CHANNEL__) << ADC_OFR1_OFFSET1_CH_Pos)
ADC_OFR1_OFFSET1_CH_Pos
#define ADC_OFR1_OFFSET1_CH_Pos
Definition stm32h723xx.h:3489

Configure the channel number into offset OFRx register.

Parameters
__CHANNEL__ADC Channel.
Return values
None

Definition at line 578 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_TEMPERATURE_SENSOR_INSTANCE

#define ADC_TEMPERATURE_SENSOR_INSTANCE ( __HANDLE__)
Value:
(((__HANDLE__)->Instance) == ADC2)

Verify the ADC instance connected to the temperature sensor.

Parameters
__HANDLE__ADC handle.
Return values
SET(ADC instance is valid) or RESET (ADC instance is invalid)

Definition at line 888 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_TRX_HIGHTHRESHOLD

#define ADC_TRX_HIGHTHRESHOLD ( __THRESHOLD__)
Value:
((__THRESHOLD__) << 16UL)

Configure the analog watchdog high threshold into registers TR1, TR2 or TR3.

Parameters
__THRESHOLD__Threshold value.
Return values
None

Definition at line 606 of file stm32h7xx_hal_adc_ex.h.

◆ ADC_VREFINT_INSTANCE

#define ADC_VREFINT_INSTANCE ( __HANDLE__)
Value:
(((__HANDLE__)->Instance) == ADC2)

Verify the ADC instance connected to the internal voltage reference VREFINT.

Parameters
__HANDLE__ADC handle.
Return values
SET(ADC instance is valid) or RESET (ADC instance is invalid)

Definition at line 910 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC1_DIFF_CHANNEL

#define IS_ADC1_DIFF_CHANNEL ( __CHANNEL__)
Value:
(((__CHANNEL__) == ADC_CHANNEL_1) || \
((__CHANNEL__) == ADC_CHANNEL_2) ||\
((__CHANNEL__) == ADC_CHANNEL_3) ||\
((__CHANNEL__) == ADC_CHANNEL_4) ||\
((__CHANNEL__) == ADC_CHANNEL_5) ||\
((__CHANNEL__) == ADC_CHANNEL_10) ||\
((__CHANNEL__) == ADC_CHANNEL_11) ||\
((__CHANNEL__) == ADC_CHANNEL_12) ||\
((__CHANNEL__) == ADC_CHANNEL_16) ||\
((__CHANNEL__) == ADC_CHANNEL_18) )

Verify the ADC channel setting in differential mode for ADC1.

Parameters
__CHANNEL__programmed ADC channel.
Return values
SET(CHANNEL is valid) or RESET (CHANNEL is invalid)

Definition at line 972 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC2_DIFF_CHANNEL

#define IS_ADC2_DIFF_CHANNEL ( __CHANNEL__)
Value:
(((__CHANNEL__) == ADC_CHANNEL_1) || \
((__CHANNEL__) == ADC_CHANNEL_2) || \
((__CHANNEL__) == ADC_CHANNEL_3) || \
((__CHANNEL__) == ADC_CHANNEL_4) || \
((__CHANNEL__) == ADC_CHANNEL_5) || \
((__CHANNEL__) == ADC_CHANNEL_10) || \
((__CHANNEL__) == ADC_CHANNEL_11) || \
((__CHANNEL__) == ADC_CHANNEL_12) || \
((__CHANNEL__) == ADC_CHANNEL_18) )

Verify the ADC channel setting in differential mode for ADC2.

Parameters
__CHANNEL__programmed ADC channel.
Return values
SET(CHANNEL is valid) or RESET (CHANNEL is invalid)

Definition at line 988 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC3_DIFF_CHANNEL

#define IS_ADC3_DIFF_CHANNEL ( __CHANNEL__)
Value:
(((__CHANNEL__) == ADC_CHANNEL_1) || \
((__CHANNEL__) == ADC_CHANNEL_2) || \
((__CHANNEL__) == ADC_CHANNEL_3) || \
((__CHANNEL__) == ADC_CHANNEL_4) || \
((__CHANNEL__) == ADC_CHANNEL_5) || \
((__CHANNEL__) == ADC_CHANNEL_10) || \
((__CHANNEL__) == ADC_CHANNEL_11) || \
((__CHANNEL__) == ADC_CHANNEL_13) || \
((__CHANNEL__) == ADC_CHANNEL_14) || \
((__CHANNEL__) == ADC_CHANNEL_15) )
ADC_CHANNEL_15
#define ADC_CHANNEL_15
ADC external channel (channel connected to GPIO pin) ADCx_IN15.
Definition stm32h7xx_hal_adc.h:717
ADC_CHANNEL_14
#define ADC_CHANNEL_14
ADC external channel (channel connected to GPIO pin) ADCx_IN14.
Definition stm32h7xx_hal_adc.h:716

Verify the ADC channel setting in differential mode for ADC3.

Parameters
__CHANNEL__programmed ADC channel.
Return values
SET(CHANNEL is valid) or RESET (CHANNEL is invalid)

Definition at line 1003 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_ANALOG_WATCHDOG_MODE

#define IS_ADC_ANALOG_WATCHDOG_MODE ( __WATCHDOG_MODE__)
Value:
(((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_NONE) || \
((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \
((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_SINGLE_INJEC) || \
((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC) || \
((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_ALL_REG) || \
((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_ALL_INJEC) || \
((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_ALL_REGINJEC) )
ADC_ANALOGWATCHDOG_SINGLE_INJEC
#define ADC_ANALOGWATCHDOG_SINGLE_INJEC
Analog watchdog applied to an injected group single channel.
Definition stm32h7xx_hal_adc.h:776
ADC_ANALOGWATCHDOG_ALL_REGINJEC
#define ADC_ANALOGWATCHDOG_ALL_REGINJEC
Analog watchdog applied to regular and injected groups all channels.
Definition stm32h7xx_hal_adc.h:780
ADC_ANALOGWATCHDOG_SINGLE_REGINJEC
#define ADC_ANALOGWATCHDOG_SINGLE_REGINJEC
Analog watchdog applied to a regular and injected groups single channel.
Definition stm32h7xx_hal_adc.h:777
ADC_ANALOGWATCHDOG_ALL_INJEC
#define ADC_ANALOGWATCHDOG_ALL_INJEC
Analog watchdog applied to injected group all channels.
Definition stm32h7xx_hal_adc.h:779
ADC_ANALOGWATCHDOG_NONE
#define ADC_ANALOGWATCHDOG_NONE
No analog watchdog selected.
Definition stm32h7xx_hal_adc.h:774
ADC_ANALOGWATCHDOG_SINGLE_REG
#define ADC_ANALOGWATCHDOG_SINGLE_REG
Analog watchdog applied to a regular group single channel.
Definition stm32h7xx_hal_adc.h:775
ADC_ANALOGWATCHDOG_ALL_REG
#define ADC_ANALOGWATCHDOG_ALL_REG
Analog watchdog applied to regular group all channels.
Definition stm32h7xx_hal_adc.h:778

Verify the ADC analog watchdog mode setting.

Parameters
__WATCHDOG_MODE__programmed ADC analog watchdog mode setting.
Return values
SET(WATCHDOG_MODE is valid) or RESET (WATCHDOG_MODE is invalid)

Definition at line 1239 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_ANALOG_WATCHDOG_NUMBER

#define IS_ADC_ANALOG_WATCHDOG_NUMBER ( __WATCHDOG__)
Value:
(((__WATCHDOG__) == ADC_ANALOGWATCHDOG_1) || \
((__WATCHDOG__) == ADC_ANALOGWATCHDOG_2) || \
((__WATCHDOG__) == ADC_ANALOGWATCHDOG_3) )
ADC_ANALOGWATCHDOG_2
#define ADC_ANALOGWATCHDOG_2
ADC analog watchdog number 2.
Definition stm32h7xx_hal_adc.h:748
ADC_ANALOGWATCHDOG_1
#define ADC_ANALOGWATCHDOG_1
ADC analog watchdog number 1.
Definition stm32h7xx_hal_adc.h:747
ADC_ANALOGWATCHDOG_3
#define ADC_ANALOGWATCHDOG_3
ADC analog watchdog number 3.
Definition stm32h7xx_hal_adc.h:749

Verify the ADC analog watchdog setting.

Parameters
__WATCHDOG__programmed ADC analog watchdog setting.
Return values
SET(WATCHDOG is valid) or RESET (WATCHDOG is invalid)

Definition at line 1230 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_CALFACT

#define IS_ADC_CALFACT ( __CALIBRATION_FACTOR__)
Value:
((__CALIBRATION_FACTOR__) <= (0x7FFU))

Calibration factor size verification (11 bits maximum).

Parameters
__CALIBRATION_FACTOR__Calibration factor value.
Return values
SET(CALIBRATION_FACTOR is within the authorized size) or RESET (CALIBRATION_FACTOR is too large)

Definition at line 925 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_CHANNEL

#define IS_ADC_CHANNEL ( __CHANNEL__)
Value:
(((__CHANNEL__) == ADC_CHANNEL_0) || \
((__CHANNEL__) == ADC_CHANNEL_1) || \
((__CHANNEL__) == ADC_CHANNEL_2) || \
((__CHANNEL__) == ADC_CHANNEL_3) || \
((__CHANNEL__) == ADC_CHANNEL_4) || \
((__CHANNEL__) == ADC_CHANNEL_5) || \
((__CHANNEL__) == ADC_CHANNEL_6) || \
((__CHANNEL__) == ADC_CHANNEL_7) || \
((__CHANNEL__) == ADC_CHANNEL_8) || \
((__CHANNEL__) == ADC_CHANNEL_9) || \
((__CHANNEL__) == ADC_CHANNEL_10) || \
((__CHANNEL__) == ADC_CHANNEL_11) || \
((__CHANNEL__) == ADC_CHANNEL_12) || \
((__CHANNEL__) == ADC_CHANNEL_13) || \
((__CHANNEL__) == ADC_CHANNEL_14) || \
((__CHANNEL__) == ADC_CHANNEL_15) || \
((__CHANNEL__) == ADC_CHANNEL_16) || \
((__CHANNEL__) == ADC_CHANNEL_17) || \
((__CHANNEL__) == ADC_CHANNEL_18) || \
((__CHANNEL__) == ADC_CHANNEL_19) || \
((__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR) || \
((__CHANNEL__) == ADC_CHANNEL_VBAT) || \
((__CHANNEL__) == ADC_CHANNEL_DAC1CH1_ADC2)|| \
((__CHANNEL__) == ADC_CHANNEL_DAC1CH2_ADC2)|| \
((__CHANNEL__) == ADC_CHANNEL_VREFINT) )
ADC_CHANNEL_DAC1CH1_ADC2
#define ADC_CHANNEL_DAC1CH1_ADC2
ADC internal channel connected to DAC1 channel 1, channel specific to ADC2.
Definition stm32h7xx_hal_adc.h:725
ADC_CHANNEL_VREFINT
#define ADC_CHANNEL_VREFINT
ADC internal channel connected to VrefInt: Internal voltage reference, channel specific to ADC3.
Definition stm32h7xx_hal_adc.h:722
ADC_CHANNEL_VBAT
#define ADC_CHANNEL_VBAT
ADC internal channel connected to Vbat/4: Vbat voltage through a divider ladder of factor 1/4 to have...
Definition stm32h7xx_hal_adc.h:724
ADC_CHANNEL_TEMPSENSOR
#define ADC_CHANNEL_TEMPSENSOR
ADC internal channel connected to Temperature sensor, channel specific to ADC3.
Definition stm32h7xx_hal_adc.h:723
ADC_CHANNEL_DAC1CH2_ADC2
#define ADC_CHANNEL_DAC1CH2_ADC2
ADC internal channel connected to DAC1 channel 2, channel specific to ADC2.
Definition stm32h7xx_hal_adc.h:726

Verify the ADC channel setting.

Parameters
__CHANNEL__programmed ADC channel.
Return values
SET(CHANNEL is valid) or RESET (CHANNEL is invalid)

Definition at line 941 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_CONVERSION_GROUP

#define IS_ADC_CONVERSION_GROUP ( __CONVERSION__)
Value:
(((__CONVERSION__) == ADC_REGULAR_GROUP) || \
((__CONVERSION__) == ADC_INJECTED_GROUP) || \
((__CONVERSION__) == ADC_REGULAR_INJECTED_GROUP) )
ADC_REGULAR_INJECTED_GROUP
#define ADC_REGULAR_INJECTED_GROUP
ADC both groups regular and injected.
Definition stm32h7xx_hal_adc_ex.h:364
ADC_REGULAR_GROUP
#define ADC_REGULAR_GROUP
ADC group regular (available on all STM32 devices).
Definition stm32h7xx_hal_adc_ex.h:362
ADC_INJECTED_GROUP
#define ADC_INJECTED_GROUP
ADC group injected (not available on all STM32 devices).
Definition stm32h7xx_hal_adc_ex.h:363

Verify the ADC conversion (regular or injected or both).

Parameters
__CONVERSION__ADC conversion group.
Return values
SET(CONVERSION is valid) or RESET (CONVERSION is invalid)

Definition at line 1269 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_DFSDMCFG_MODE

#define IS_ADC_DFSDMCFG_MODE ( __HANDLE__)
Value:
(SET)

Verify the DFSDM mode configuration.

Parameters
__HANDLE__ADC handle.
Note
When DMSDFM configuration is not supported, the macro systematically reports SET. For this reason, the input parameter is the ADC handle and not the configuration parameter directly.
Return values
SET(DFSDM mode configuration is valid) or RESET (DFSDM mode configuration is invalid)

Definition at line 1354 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_DUAL_DATA_MODE

#define IS_ADC_DUAL_DATA_MODE ( MODE)
Value:
(((MODE) == ADC_DUALMODEDATAFORMAT_DISABLED) || \
((MODE) == ADC_DUALMODEDATAFORMAT_32_10_BITS) || \
((MODE) == ADC_DUALMODEDATAFORMAT_8_BITS) )
ADC_DUALMODEDATAFORMAT_8_BITS
#define ADC_DUALMODEDATAFORMAT_8_BITS
Data formatting mode for 8-bit resolution.
Definition stm32h7xx_hal_adc_ex.h:334
ADC_DUALMODEDATAFORMAT_DISABLED
#define ADC_DUALMODEDATAFORMAT_DISABLED
Dual ADC mode without data packing: ADCx_CDR and ADCx_CDR2 registers not used.
Definition stm32h7xx_hal_adc_ex.h:332
ADC_DUALMODEDATAFORMAT_32_10_BITS
#define ADC_DUALMODEDATAFORMAT_32_10_BITS
Data formatting mode for 32 down to 10-bit resolution.
Definition stm32h7xx_hal_adc_ex.h:333

Verify the ADC dual data mode setting.

Parameters
MODEprogrammed ADC dual mode setting.
Return values
SET(MODE is valid) or RESET (MODE is invalid)

Definition at line 1206 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_EVENT_TYPE

#define IS_ADC_EVENT_TYPE ( __EVENT__)
Value:
(((__EVENT__) == ADC_EOSMP_EVENT) || \
((__EVENT__) == ADC_AWD_EVENT) || \
((__EVENT__) == ADC_AWD2_EVENT) || \
((__EVENT__) == ADC_AWD3_EVENT) || \
((__EVENT__) == ADC_OVR_EVENT) || \
((__EVENT__) == ADC_JQOVF_EVENT) )
ADC_AWD3_EVENT
#define ADC_AWD3_EVENT
ADC Analog watchdog 3 event (additional analog watchdog, not present on all STM32 series).
Definition stm32h7xx_hal_adc.h:870
ADC_EOSMP_EVENT
#define ADC_EOSMP_EVENT
ADC End of Sampling event.
Definition stm32h7xx_hal_adc.h:867
ADC_JQOVF_EVENT
#define ADC_JQOVF_EVENT
ADC Injected Context Queue Overflow event.
Definition stm32h7xx_hal_adc.h:872
ADC_OVR_EVENT
#define ADC_OVR_EVENT
ADC overrun event.
Definition stm32h7xx_hal_adc.h:871
ADC_AWD2_EVENT
#define ADC_AWD2_EVENT
ADC Analog watchdog 2 event (additional analog watchdog, not present on all STM32 series).
Definition stm32h7xx_hal_adc.h:869
ADC_AWD_EVENT
#define ADC_AWD_EVENT
ADC Analog watchdog 1 event: Naming for compatibility with other STM32 devices having only one analog...
Definition stm32h7xx_hal_adc.h:876

Verify the ADC event type.

Parameters
__EVENT__ADC event.
Return values
SET(EVENT is valid) or RESET (EVENT is invalid)

Definition at line 1278 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_EXTTRIGINJEC

#define IS_ADC_EXTTRIGINJEC ( __INJTRIG__)
Value:
(((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T1_TRGO) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T1_CC4) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T2_TRGO) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T2_CC1) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_CC4) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T4_TRGO) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_EXT_IT15) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T8_CC4) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T1_TRGO2) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T8_TRGO) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T8_TRGO2) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_CC3) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_TRGO) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_CC1) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T6_TRGO) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T15_TRGO) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_LPTIM1_OUT) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_LPTIM2_OUT) || \
((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_LPTIM3_OUT) || \
\
((__INJTRIG__) == ADC_SOFTWARE_START) )
ADC_EXTERNALTRIGINJEC_T3_CC4
#define ADC_EXTERNALTRIGINJEC_T3_CC4
ADC group injected conversion trigger from external peripheral: TIM3 channel 4 event (capture compare...
Definition stm32h7xx_hal_adc_ex.h:240
ADC_EXTERNALTRIGINJEC_T3_CC3
#define ADC_EXTERNALTRIGINJEC_T3_CC3
ADC group injected conversion trigger from external peripheral: TIM3 channel 3 event (capture compare...
Definition stm32h7xx_hal_adc_ex.h:247
ADC_EXTERNALTRIGINJEC_EXT_IT15
#define ADC_EXTERNALTRIGINJEC_EXT_IT15
ADC group injected conversion trigger from external peripheral: external interrupt line 15.
Definition stm32h7xx_hal_adc_ex.h:242
ADC_EXTERNALTRIGINJEC_T8_CC4
#define ADC_EXTERNALTRIGINJEC_T8_CC4
ADC group injected conversion trigger from external peripheral: TIM8 channel 4 event (capture compare...
Definition stm32h7xx_hal_adc_ex.h:243
ADC_EXTERNALTRIGINJEC_LPTIM1_OUT
#define ADC_EXTERNALTRIGINJEC_LPTIM1_OUT
ADC group injected conversion trigger from external peripheral: LPTIM1 OUT event.
Definition stm32h7xx_hal_adc_ex.h:256
ADC_EXTERNALTRIGINJEC_T8_TRGO
#define ADC_EXTERNALTRIGINJEC_T8_TRGO
ADC group injected conversion trigger from external peripheral: TIM8 TRGO event.
Definition stm32h7xx_hal_adc_ex.h:245
ADC_EXTERNALTRIGINJEC_T1_CC4
#define ADC_EXTERNALTRIGINJEC_T1_CC4
ADC group injected conversion trigger from external peripheral: TIM1 channel 4 event (capture compare...
Definition stm32h7xx_hal_adc_ex.h:237
ADC_EXTERNALTRIGINJEC_T3_TRGO
#define ADC_EXTERNALTRIGINJEC_T3_TRGO
ADC group injected conversion trigger from external peripheral: TIM3 TRGO event.
Definition stm32h7xx_hal_adc_ex.h:248
ADC_EXTERNALTRIGINJEC_T8_TRGO2
#define ADC_EXTERNALTRIGINJEC_T8_TRGO2
ADC group injected conversion trigger from external peripheral: TIM8 TRGO2 event.
Definition stm32h7xx_hal_adc_ex.h:246
ADC_EXTERNALTRIGINJEC_T15_TRGO
#define ADC_EXTERNALTRIGINJEC_T15_TRGO
ADC group injected conversion trigger from external peripheral: TIM15 TRGO event.
Definition stm32h7xx_hal_adc_ex.h:251
ADC_EXTERNALTRIGINJEC_T2_CC1
#define ADC_EXTERNALTRIGINJEC_T2_CC1
ADC group injected conversion trigger from external peripheral: TIM2 channel 1 event (capture compare...
Definition stm32h7xx_hal_adc_ex.h:239
ADC_EXTERNALTRIGINJEC_LPTIM2_OUT
#define ADC_EXTERNALTRIGINJEC_LPTIM2_OUT
ADC group injected conversion trigger from external peripheral: LPTIM2 OUT event.
Definition stm32h7xx_hal_adc_ex.h:257
ADC_EXTERNALTRIGINJEC_T4_TRGO
#define ADC_EXTERNALTRIGINJEC_T4_TRGO
ADC group injected conversion trigger from external peripheral: TIM4 TRGO event.
Definition stm32h7xx_hal_adc_ex.h:241
ADC_EXTERNALTRIGINJEC_T1_TRGO
#define ADC_EXTERNALTRIGINJEC_T1_TRGO
ADC group injected conversion trigger from external peripheral: TIM1 TRGO event.
Definition stm32h7xx_hal_adc_ex.h:236
ADC_EXTERNALTRIGINJEC_T6_TRGO
#define ADC_EXTERNALTRIGINJEC_T6_TRGO
ADC group injected conversion trigger from external peripheral: TIM6 TRGO event.
Definition stm32h7xx_hal_adc_ex.h:250
ADC_EXTERNALTRIGINJEC_T3_CC1
#define ADC_EXTERNALTRIGINJEC_T3_CC1
ADC group injected conversion trigger from external peripheral: TIM3 channel 1 event (capture compare...
Definition stm32h7xx_hal_adc_ex.h:249
ADC_EXTERNALTRIGINJEC_T1_TRGO2
#define ADC_EXTERNALTRIGINJEC_T1_TRGO2
ADC group injected conversion trigger from external peripheral: TIM1 TRGO2 event.
Definition stm32h7xx_hal_adc_ex.h:244
ADC_EXTERNALTRIGINJEC_LPTIM3_OUT
#define ADC_EXTERNALTRIGINJEC_LPTIM3_OUT
ADC group injected conversion trigger from external peripheral: LPTIM3 OUT event.
Definition stm32h7xx_hal_adc_ex.h:258
ADC_EXTERNALTRIGINJEC_T2_TRGO
#define ADC_EXTERNALTRIGINJEC_T2_TRGO
ADC group injected conversion trigger from external peripheral: TIM2 TRGO event.
Definition stm32h7xx_hal_adc_ex.h:238
ADC_SOFTWARE_START
#define ADC_SOFTWARE_START
ADC group regular conversion trigger internal: SW start.
Definition stm32h7xx_hal_adc.h:554

Verify the ADC injected conversions external trigger.

Parameters
__INJTRIG__programmed ADC injected conversions external trigger.
Return values
SET(INJTRIG is a valid value) or RESET (INJTRIG is invalid)

Definition at line 1155 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_EXTTRIGINJEC_EDGE

#define IS_ADC_EXTTRIGINJEC_EDGE ( __EDGE__)
Value:
(((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE) || \
((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING) || \
((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_FALLING) || \
((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISINGFALLING) )
ADC_EXTERNALTRIGINJECCONV_EDGE_FALLING
#define ADC_EXTERNALTRIGINJECCONV_EDGE_FALLING
Injected conversions hardware trigger detection on the falling edge.
Definition stm32h7xx_hal_adc_ex.h:268
ADC_EXTERNALTRIGINJECCONV_EDGE_NONE
#define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE
Injected conversions hardware trigger detection disabled.
Definition stm32h7xx_hal_adc_ex.h:266
ADC_EXTERNALTRIGINJECCONV_EDGE_RISING
#define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING
Injected conversions hardware trigger detection on the rising edge.
Definition stm32h7xx_hal_adc_ex.h:267
ADC_EXTERNALTRIGINJECCONV_EDGE_RISINGFALLING
#define ADC_EXTERNALTRIGINJECCONV_EDGE_RISINGFALLING
Injected conversions hardware trigger detection on both the rising and falling edges.
Definition stm32h7xx_hal_adc_ex.h:269

Verify the ADC edge trigger setting for injected group.

Parameters
__EDGE__programmed ADC edge trigger setting.
Return values
SET(EDGE is a valid value) or RESET (EDGE is invalid)

Definition at line 1182 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_INJECTED_NB_CONV

#define IS_ADC_INJECTED_NB_CONV ( __LENGTH__)
Value:
(((__LENGTH__) >= (1U)) && ((__LENGTH__) <= (4U)))

Verify the length of scheduled injected conversions group.

Parameters
__LENGTH__number of programmed conversions.
Return values
SET(LENGTH is within the maximum number of possible programmable injected conversions) or RESET (LENGTH is null or too large)

Definition at line 918 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_INJECTED_RANK

#define IS_ADC_INJECTED_RANK ( __CHANNEL__)
Value:
(((__CHANNEL__) == ADC_INJECTED_RANK_1) || \
((__CHANNEL__) == ADC_INJECTED_RANK_2) || \
((__CHANNEL__) == ADC_INJECTED_RANK_3) || \
((__CHANNEL__) == ADC_INJECTED_RANK_4) )
ADC_INJECTED_RANK_3
#define ADC_INJECTED_RANK_3
ADC group injected sequencer rank 3.
Definition stm32h7xx_hal_adc_ex.h:311
ADC_INJECTED_RANK_1
#define ADC_INJECTED_RANK_1
ADC group injected sequencer rank 1.
Definition stm32h7xx_hal_adc_ex.h:309
ADC_INJECTED_RANK_2
#define ADC_INJECTED_RANK_2
ADC group injected sequencer rank 2.
Definition stm32h7xx_hal_adc_ex.h:310
ADC_INJECTED_RANK_4
#define ADC_INJECTED_RANK_4
ADC group injected sequencer rank 4.
Definition stm32h7xx_hal_adc_ex.h:312

Verify the ADC injected channel setting.

Parameters
__CHANNEL__programmed ADC injected channel.
Return values
SET(CHANNEL is valid) or RESET (CHANNEL is invalid)

Definition at line 1120 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_MULTIMODE

#define IS_ADC_MULTIMODE ( __MODE__)
Value:
(((__MODE__) == ADC_MODE_INDEPENDENT) || \
((__MODE__) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
((__MODE__) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
((__MODE__) == ADC_DUALMODE_REGINTERL_INJECSIMULT) || \
((__MODE__) == ADC_DUALMODE_INJECSIMULT) || \
((__MODE__) == ADC_DUALMODE_REGSIMULT) || \
((__MODE__) == ADC_DUALMODE_INTERL) || \
((__MODE__) == ADC_DUALMODE_ALTERTRIG) )
ADC_DUALMODE_REGSIMULT_ALTERTRIG
#define ADC_DUALMODE_REGSIMULT_ALTERTRIG
ADC dual mode enabled: Combined group regular simultaneous + group injected alternate trigger.
Definition stm32h7xx_hal_adc_ex.h:326
ADC_DUALMODE_REGINTERL_INJECSIMULT
#define ADC_DUALMODE_REGINTERL_INJECSIMULT
ADC dual mode enabled: Combined group regular interleaved + group injected simultaneous.
Definition stm32h7xx_hal_adc_ex.h:327
ADC_DUALMODE_REGSIMULT_INJECSIMULT
#define ADC_DUALMODE_REGSIMULT_INJECSIMULT
ADC dual mode enabled: Combined group regular simultaneous + group injected simultaneous.
Definition stm32h7xx_hal_adc_ex.h:325

Verify the ADC multimode setting.

Parameters
__MODE__programmed ADC multimode setting.
Return values
SET(MODE is valid) or RESET (MODE is invalid)

Definition at line 1192 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_OFFSET_NUMBER

#define IS_ADC_OFFSET_NUMBER ( __OFFSET_NUMBER__)
Value:
(((__OFFSET_NUMBER__) == ADC_OFFSET_NONE) || \
((__OFFSET_NUMBER__) == ADC_OFFSET_1) || \
((__OFFSET_NUMBER__) == ADC_OFFSET_2) || \
((__OFFSET_NUMBER__) == ADC_OFFSET_3) || \
((__OFFSET_NUMBER__) == ADC_OFFSET_4) )
ADC_OFFSET_3
#define ADC_OFFSET_3
ADC offset number 3: ADC channel and offset level to which the offset programmed will be applied (ind...
Definition stm32h7xx_hal_adc_ex.h:289
ADC_OFFSET_4
#define ADC_OFFSET_4
ADC offset number 4: ADC channel and offset level to which the offset programmed will be applied (ind...
Definition stm32h7xx_hal_adc_ex.h:290
ADC_OFFSET_2
#define ADC_OFFSET_2
ADC offset number 2: ADC channel and offset level to which the offset programmed will be applied (ind...
Definition stm32h7xx_hal_adc_ex.h:288
ADC_OFFSET_NONE
#define ADC_OFFSET_NONE
ADC offset disabled: no offset correction for the selected ADC channel.
Definition stm32h7xx_hal_adc_ex.h:286
ADC_OFFSET_1
#define ADC_OFFSET_1
ADC offset number 1: ADC channel and offset level to which the offset programmed will be applied (ind...
Definition stm32h7xx_hal_adc_ex.h:287

Verify the ADC offset management setting.

Parameters
__OFFSET_NUMBER__ADC offset management.
Return values
SET(OFFSET_NUMBER is valid) or RESET (OFFSET_NUMBER is invalid)

Definition at line 1101 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_OVERSAMPLING_RATIO

#define IS_ADC_OVERSAMPLING_RATIO ( RATIO)
Value:
(((RATIO) >= 1UL) && ((RATIO) <= 1024UL))

Verify the ADC oversampling ratio.

Parameters
RATIOprogrammed ADC oversampling ratio.
Return values
SET(RATIO is a valid value) or RESET (RATIO is invalid)

Definition at line 1290 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_REGOVERSAMPLING_MODE

#define IS_ADC_REGOVERSAMPLING_MODE ( __MODE__)
Value:
(((__MODE__) == ADC_REGOVERSAMPLING_CONTINUED_MODE) || \
((__MODE__) == ADC_REGOVERSAMPLING_RESUMED_MODE) )
ADC_REGOVERSAMPLING_CONTINUED_MODE
#define ADC_REGOVERSAMPLING_CONTINUED_MODE
Oversampling buffer maintained during injection sequence.
Definition stm32h7xx_hal_adc.h:857
ADC_REGOVERSAMPLING_RESUMED_MODE
#define ADC_REGOVERSAMPLING_RESUMED_MODE
Oversampling buffer zeroed during injection sequence.
Definition stm32h7xx_hal_adc.h:858

Verify the ADC oversampling regular conversion resumed or continued mode.

Parameters
__MODE__programmed ADC oversampling regular conversion resumed or continued mode.
Return values
SET(MODE is valid) or RESET (MODE is invalid)

Definition at line 1339 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_RIGHT_BIT_SHIFT

#define IS_ADC_RIGHT_BIT_SHIFT ( __SHIFT__)
Value:
(((__SHIFT__) == ADC_RIGHTBITSHIFT_NONE) || \
((__SHIFT__) == ADC_RIGHTBITSHIFT_1 ) || \
((__SHIFT__) == ADC_RIGHTBITSHIFT_2 ) || \
((__SHIFT__) == ADC_RIGHTBITSHIFT_3 ) || \
((__SHIFT__) == ADC_RIGHTBITSHIFT_4 ) || \
((__SHIFT__) == ADC_RIGHTBITSHIFT_5 ) || \
((__SHIFT__) == ADC_RIGHTBITSHIFT_6 ) || \
((__SHIFT__) == ADC_RIGHTBITSHIFT_7 ) || \
((__SHIFT__) == ADC_RIGHTBITSHIFT_8 ) || \
((__SHIFT__) == ADC_RIGHTBITSHIFT_9 ) || \
((__SHIFT__) == ADC_RIGHTBITSHIFT_10 ) || \
((__SHIFT__) == ADC_RIGHTBITSHIFT_11 ))
ADC_RIGHTBITSHIFT_5
#define ADC_RIGHTBITSHIFT_5
ADC oversampling shift of 5 (sum of the ADC conversions data is divided by 32 to result as the ADC ov...
Definition stm32h7xx_hal_adc.h:811
ADC_RIGHTBITSHIFT_6
#define ADC_RIGHTBITSHIFT_6
ADC oversampling shift of 6 (sum of the ADC conversions data is divided by 64 to result as the ADC ov...
Definition stm32h7xx_hal_adc.h:812
ADC_RIGHTBITSHIFT_2
#define ADC_RIGHTBITSHIFT_2
ADC oversampling shift of 2 (sum of the ADC conversions data is divided by 4 to result as the ADC ove...
Definition stm32h7xx_hal_adc.h:808
ADC_RIGHTBITSHIFT_10
#define ADC_RIGHTBITSHIFT_10
ADC oversampling shift of 10 (sum of the ADC conversions data is divided by 1024 to result as the ADC...
Definition stm32h7xx_hal_adc.h:816
ADC_RIGHTBITSHIFT_4
#define ADC_RIGHTBITSHIFT_4
ADC oversampling shift of 4 (sum of the ADC conversions data is divided by 16 to result as the ADC ov...
Definition stm32h7xx_hal_adc.h:810
ADC_RIGHTBITSHIFT_NONE
#define ADC_RIGHTBITSHIFT_NONE
ADC oversampling no shift (sum of the ADC conversions data is not divided to result as the ADC oversa...
Definition stm32h7xx_hal_adc.h:806
ADC_RIGHTBITSHIFT_9
#define ADC_RIGHTBITSHIFT_9
ADC oversampling shift of 9 (sum of the ADC conversions data is divided by 512 to result as the ADC o...
Definition stm32h7xx_hal_adc.h:815
ADC_RIGHTBITSHIFT_11
#define ADC_RIGHTBITSHIFT_11
ADC oversampling shift of 11 (sum of the ADC conversions data is divided by 2048 to result as the ADC...
Definition stm32h7xx_hal_adc.h:817
ADC_RIGHTBITSHIFT_1
#define ADC_RIGHTBITSHIFT_1
ADC oversampling shift of 1 (sum of the ADC conversions data is divided by 2 to result as the ADC ove...
Definition stm32h7xx_hal_adc.h:807
ADC_RIGHTBITSHIFT_7
#define ADC_RIGHTBITSHIFT_7
ADC oversampling shift of 7 (sum of the ADC conversions data is divided by 128 to result as the ADC o...
Definition stm32h7xx_hal_adc.h:813
ADC_RIGHTBITSHIFT_3
#define ADC_RIGHTBITSHIFT_3
ADC oversampling shift of 3 (sum of the ADC conversions data is divided by 8 to result as the ADC ove...
Definition stm32h7xx_hal_adc.h:809
ADC_RIGHTBITSHIFT_8
#define ADC_RIGHTBITSHIFT_8
ADC oversampling shift of 8 (sum of the ADC conversions data is divided by 256 to result as the ADC o...
Definition stm32h7xx_hal_adc.h:814

Verify the ADC oversampling shift.

Parameters
__SHIFT__programmed ADC oversampling shift.
Return values
SET(SHIFT is a valid value) or RESET (SHIFT is invalid)

Definition at line 1313 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_SAMPLING_DELAY

#define IS_ADC_SAMPLING_DELAY ( __DELAY__)
Value:
(((__DELAY__) == ADC_TWOSAMPLINGDELAY_1CYCLE) || \
((__DELAY__) == ADC_TWOSAMPLINGDELAY_2CYCLES) || \
((__DELAY__) == ADC_TWOSAMPLINGDELAY_3CYCLES) || \
((__DELAY__) == ADC_TWOSAMPLINGDELAY_4CYCLES) || \
((__DELAY__) == ADC_TWOSAMPLINGDELAY_5CYCLES) || \
((__DELAY__) == ADC_TWOSAMPLINGDELAY_6CYCLES) || \
((__DELAY__) == ADC_TWOSAMPLINGDELAY_7CYCLES) || \
((__DELAY__) == ADC_TWOSAMPLINGDELAY_8CYCLES) || \
((__DELAY__) == ADC_TWOSAMPLINGDELAY_9CYCLES) )
ADC_TWOSAMPLINGDELAY_6CYCLES
#define ADC_TWOSAMPLINGDELAY_6CYCLES
ADC multimode delay between two sampling phases: 6 ADC clock cycles.
Definition stm32h7xx_hal_adc_ex.h:347
ADC_TWOSAMPLINGDELAY_3CYCLES
#define ADC_TWOSAMPLINGDELAY_3CYCLES
ADC multimode delay between two sampling phases: 3 ADC clock cycles.
Definition stm32h7xx_hal_adc_ex.h:344
ADC_TWOSAMPLINGDELAY_8CYCLES
#define ADC_TWOSAMPLINGDELAY_8CYCLES
ADC multimode delay between two sampling phases: 8 ADC clock cycles.
Definition stm32h7xx_hal_adc_ex.h:349
ADC_TWOSAMPLINGDELAY_9CYCLES
#define ADC_TWOSAMPLINGDELAY_9CYCLES
ADC multimode delay between two sampling phases: 9 ADC clock cycles.
Definition stm32h7xx_hal_adc_ex.h:350
ADC_TWOSAMPLINGDELAY_7CYCLES
#define ADC_TWOSAMPLINGDELAY_7CYCLES
ADC multimode delay between two sampling phases: 7 ADC clock cycles.
Definition stm32h7xx_hal_adc_ex.h:348
ADC_TWOSAMPLINGDELAY_1CYCLE
#define ADC_TWOSAMPLINGDELAY_1CYCLE
ADC multimode delay between two sampling phases: 1 ADC clock cycle.
Definition stm32h7xx_hal_adc_ex.h:342
ADC_TWOSAMPLINGDELAY_4CYCLES
#define ADC_TWOSAMPLINGDELAY_4CYCLES
ADC multimode delay between two sampling phases: 4 ADC clock cycles.
Definition stm32h7xx_hal_adc_ex.h:345
ADC_TWOSAMPLINGDELAY_2CYCLES
#define ADC_TWOSAMPLINGDELAY_2CYCLES
ADC multimode delay between two sampling phases: 2 ADC clock cycles.
Definition stm32h7xx_hal_adc_ex.h:343
ADC_TWOSAMPLINGDELAY_5CYCLES
#define ADC_TWOSAMPLINGDELAY_5CYCLES
ADC multimode delay between two sampling phases: 5 ADC clock cycles.
Definition stm32h7xx_hal_adc_ex.h:346

Verify the ADC multimode delay setting.

Parameters
__DELAY__programmed ADC multimode delay setting.
Return values
SET(DELAY is a valid value) or RESET (DELAY is invalid)

Definition at line 1215 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_SINGLE_DIFFERENTIAL

#define IS_ADC_SINGLE_DIFFERENTIAL ( __SING_DIFF__)
Value:
(((__SING_DIFF__) == ADC_SINGLE_ENDED) || \
((__SING_DIFF__) == ADC_DIFFERENTIAL_ENDED) )
ADC_SINGLE_ENDED
#define ADC_SINGLE_ENDED
ADC channel ending set to single ended (literal also used to set calibration mode).
Definition stm32h7xx_hal_adc_ex.h:277
ADC_DIFFERENTIAL_ENDED
#define ADC_DIFFERENTIAL_ENDED
ADC channel ending set to differential (literal also used to set calibration mode).
Definition stm32h7xx_hal_adc_ex.h:278

Verify the ADC single-ended input or differential mode setting.

Parameters
__SING_DIFF__programmed channel setting.
Return values
SET(SING_DIFF is valid) or RESET (SING_DIFF is invalid)

Definition at line 1093 of file stm32h7xx_hal_adc_ex.h.

◆ IS_ADC_TRIGGERED_OVERSAMPLING_MODE

#define IS_ADC_TRIGGERED_OVERSAMPLING_MODE ( __MODE__)
Value:
(((__MODE__) == ADC_TRIGGEREDMODE_SINGLE_TRIGGER) || \
((__MODE__) == ADC_TRIGGEREDMODE_MULTI_TRIGGER) )
ADC_TRIGGEREDMODE_MULTI_TRIGGER
#define ADC_TRIGGEREDMODE_MULTI_TRIGGER
ADC oversampling discontinuous mode: discontinuous mode (each conversion of oversampling ratio needs ...
Definition stm32h7xx_hal_adc.h:849
ADC_TRIGGEREDMODE_SINGLE_TRIGGER
#define ADC_TRIGGEREDMODE_SINGLE_TRIGGER
ADC oversampling discontinuous mode: continuous mode (all conversions of oversampling ratio are done ...
Definition stm32h7xx_hal_adc.h:848

Verify the ADC oversampling triggered mode.

Parameters
__MODE__programmed ADC oversampling triggered mode.
Return values
SET(MODE is valid) or RESET (MODE is invalid)

Definition at line 1331 of file stm32h7xx_hal_adc_ex.h.