Configuration_section_for_CMSIS

Collaboration diagram for Configuration_section_for_CMSIS:

Macros
#define	__CM7_REV   0x0110U
	Configuration of the Cortex-M7 Processor and Core Peripherals.
#define	__MPU_PRESENT   1U
	CM7 provides an MPU.
#define	__NVIC_PRIO_BITS   4U
	CM7 uses 4 Bits for the Priority Levels.
#define	__Vendor_SysTickConfig   0U
	Set to 1 if different SysTick Config is used.
#define	__FPU_PRESENT   1U
	FPU present.
#define	__ICACHE_PRESENT   1U
	CM7 instruction cache present.
#define	__DCACHE_PRESENT   1U
	CM7 data cache present.

Detailed Description

Macro Definition Documentation

__CM7_REV

#define __CM7_REV   0x0110U

Configuration of the Cortex-M7 Processor and Core Peripherals.

Cortex-M7 revision r1p2

Definition at line 214 of file stm32h723xx.h.

__DCACHE_PRESENT

#define __DCACHE_PRESENT   1U

CM7 data cache present.

Cortex-M7 processor and core peripherals

Definition at line 220 of file stm32h723xx.h.

__FPU_PRESENT

#define __FPU_PRESENT   1U

FPU present.

Definition at line 218 of file stm32h723xx.h.

__ICACHE_PRESENT

#define __ICACHE_PRESENT   1U

CM7 instruction cache present.

Definition at line 219 of file stm32h723xx.h.

__MPU_PRESENT

#define __MPU_PRESENT   1U

CM7 provides an MPU.

Definition at line 215 of file stm32h723xx.h.

__NVIC_PRIO_BITS

#define __NVIC_PRIO_BITS   4U

CM7 uses 4 Bits for the Priority Levels.

Definition at line 216 of file stm32h723xx.h.

Referenced by __NVIC_GetPriority(), __NVIC_SetPriority(), HAL_InitTick(), NVIC_DecodePriority(), NVIC_EncodePriority(), and SysTick_Config().

__Vendor_SysTickConfig

#define __Vendor_SysTickConfig   0U

Set to 1 if different SysTick Config is used.

Definition at line 217 of file stm32h723xx.h.