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ISM330DHCX_interrupt_pins
Infos

This section groups all the functions that manage interrupt pins. More...

Collaboration diagram for ISM330DHCX_interrupt_pins:

Functions

int32_t ism330dhcx_pin_int1_route_set (stmdev_ctx_t *ctx, ism330dhcx_pin_int1_route_t *val)
 Select the signal that need to route on int1 pad[set].
int32_t ism330dhcx_pin_int1_route_get (stmdev_ctx_t *ctx, ism330dhcx_pin_int1_route_t *val)
 Select the signal that need to route on int1 pad.
int32_t ism330dhcx_pin_int2_route_set (stmdev_ctx_t *ctx, ism330dhcx_pin_int2_route_t *val)
 Select the signal that need to route on int2 pad[set].
int32_t ism330dhcx_pin_int2_route_get (stmdev_ctx_t *ctx, ism330dhcx_pin_int2_route_t *val)
 Select the signal that need to route on int2 pad.
int32_t ism330dhcx_pin_mode_set (stmdev_ctx_t *ctx, ism330dhcx_pp_od_t val)
 Push-pull/open drain selection on interrupt pads.
int32_t ism330dhcx_pin_mode_get (stmdev_ctx_t *ctx, ism330dhcx_pp_od_t *val)
 Push-pull/open drain selection on interrupt pads.
int32_t ism330dhcx_pin_polarity_set (stmdev_ctx_t *ctx, ism330dhcx_h_lactive_t val)
 Interrupt active-high/low.
int32_t ism330dhcx_pin_polarity_get (stmdev_ctx_t *ctx, ism330dhcx_h_lactive_t *val)
 Interrupt active-high/low.
int32_t ism330dhcx_all_on_int1_set (stmdev_ctx_t *ctx, uint8_t val)
 All interrupt signals become available on INT1 pin.
int32_t ism330dhcx_all_on_int1_get (stmdev_ctx_t *ctx, uint8_t *val)
 All interrupt signals become available on INT1 pin.
int32_t ism330dhcx_int_notification_set (stmdev_ctx_t *ctx, ism330dhcx_lir_t val)
 All interrupt signals notification mode.
int32_t ism330dhcx_int_notification_get (stmdev_ctx_t *ctx, ism330dhcx_lir_t *val)
 All interrupt signals notification mode.

Detailed Description

This section groups all the functions that manage interrupt pins.

Function Documentation

◆ ism330dhcx_all_on_int1_get()

int32_t ism330dhcx_all_on_int1_get ( stmdev_ctx_t * ctx,
uint8_t * val )

All interrupt signals become available on INT1 pin.

[get]

Parameters
ctxRead / write interface definitions.(ptr)
valChange the values of int2_on_int1 in reg CTRL4_C
Return values
Interfacestatus (MANDATORY: return 0 -> no Error).

Definition at line 5094 of file ism330dhcx_reg.c.

References ism330dhcx_ctrl4_c_t::int2_on_int1, ISM330DHCX_CTRL4_C, and ism330dhcx_read_reg().

◆ ism330dhcx_all_on_int1_set()

int32_t ism330dhcx_all_on_int1_set ( stmdev_ctx_t * ctx,
uint8_t val )

All interrupt signals become available on INT1 pin.

[set]

Parameters
ctxRead / write interface definitions.(ptr)
valChange the values of int2_on_int1 in reg CTRL4_C
Return values
Interfacestatus (MANDATORY: return 0 -> no Error).

Definition at line 5069 of file ism330dhcx_reg.c.

References ism330dhcx_ctrl4_c_t::int2_on_int1, ISM330DHCX_CTRL4_C, ism330dhcx_read_reg(), and ism330dhcx_write_reg().

◆ ism330dhcx_int_notification_get()

int32_t ism330dhcx_int_notification_get ( stmdev_ctx_t * ctx,
ism330dhcx_lir_t * val )

All interrupt signals notification mode.

[get]

Parameters
ctxRead / write interface definitions.(ptr)
valGet the values of lir in reg TAP_CFG0
Return values
Interfacestatus (MANDATORY: return 0 -> no Error).

Definition at line 5164 of file ism330dhcx_reg.c.

References ism330dhcx_page_rw_t::emb_func_lir, ISM330DHCX_ALL_INT_LATCHED, ISM330DHCX_ALL_INT_PULSED, ISM330DHCX_BASE_LATCHED_EMB_PULSED, ISM330DHCX_BASE_PULSED_EMB_LATCHED, ISM330DHCX_EMBEDDED_FUNC_BANK, ism330dhcx_mem_bank_set(), ISM330DHCX_PAGE_RW, ism330dhcx_read_reg(), ISM330DHCX_TAP_CFG0, ISM330DHCX_USER_BANK, and ism330dhcx_tap_cfg0_t::lir.

◆ ism330dhcx_int_notification_set()

int32_t ism330dhcx_int_notification_set ( stmdev_ctx_t * ctx,
ism330dhcx_lir_t val )

All interrupt signals notification mode.

[set]

Parameters
ctxRead / write interface definitions.(ptr)
valChange the values of lir in reg TAP_CFG0
Return values
Interfacestatus (MANDATORY: return 0 -> no Error).

Definition at line 5113 of file ism330dhcx_reg.c.

References ism330dhcx_page_rw_t::emb_func_lir, ism330dhcx_tap_cfg0_t::int_clr_on_read, ISM330DHCX_EMBEDDED_FUNC_BANK, ism330dhcx_mem_bank_set(), ISM330DHCX_PAGE_RW, ism330dhcx_read_reg(), ISM330DHCX_TAP_CFG0, ISM330DHCX_USER_BANK, ism330dhcx_write_reg(), and ism330dhcx_tap_cfg0_t::lir.

Referenced by QwDevISM330DHCX::setIntNotification().

◆ ism330dhcx_pin_int1_route_get()

int32_t ism330dhcx_pin_int1_route_get ( stmdev_ctx_t * ctx,
ism330dhcx_pin_int1_route_t * val )

Select the signal that need to route on int1 pad.

[get]

Parameters
ctxRead / write interface definitions.(ptr)
valStructure of registers: INT1_CTRL, MD1_CFG, EMB_FUNC_INT1, FSM_INT1_A, FSM_INT1_B.(ptr)
Return values
Interfacestatus (MANDATORY: return 0 -> no Error).

Definition at line 4701 of file ism330dhcx_reg.c.

References ism330dhcx_pin_int1_route_t::emb_func_int1, ism330dhcx_pin_int1_route_t::fsm_int1_a, ism330dhcx_pin_int1_route_t::fsm_int1_b, ism330dhcx_pin_int1_route_t::int1_ctrl, ISM330DHCX_EMB_FUNC_INT1, ISM330DHCX_EMBEDDED_FUNC_BANK, ISM330DHCX_FSM_INT1_A, ISM330DHCX_FSM_INT1_B, ISM330DHCX_INT1_CTRL, ISM330DHCX_MD1_CFG, ism330dhcx_mem_bank_set(), ISM330DHCX_MLC_INT1, ism330dhcx_read_reg(), ISM330DHCX_USER_BANK, ism330dhcx_pin_int1_route_t::md1_cfg, and ism330dhcx_pin_int1_route_t::mlc_int1.

Referenced by QwDevISM330DHCX::configureWakeUpOnInt1(), QwDevISM330DHCX::setAccelStatustoInt1(), and QwDevISM330DHCX::setGyroStatustoInt1().

◆ ism330dhcx_pin_int1_route_set()

int32_t ism330dhcx_pin_int1_route_set ( stmdev_ctx_t * ctx,
ism330dhcx_pin_int1_route_t * val )

Select the signal that need to route on int1 pad[set].

Parameters
ctxRead / write interface definitions.(ptr)
valStructure of registers: INT1_CTRL,MD1_CFG, EMB_FUNC_INT1, FSM_INT1_A, FSM_INT1_B
Return values
Interfacestatus (MANDATORY: return 0 -> no Error).

Definition at line 4568 of file ism330dhcx_reg.c.

References ism330dhcx_int1_ctrl_t::den_drdy_flag, ism330dhcx_pin_int1_route_t::emb_func_int1, ism330dhcx_pin_int1_route_t::fsm_int1_a, ism330dhcx_pin_int1_route_t::fsm_int1_b, ism330dhcx_md1_cfg_t::int1_6d, ism330dhcx_int1_ctrl_t::int1_boot, ism330dhcx_int1_ctrl_t::int1_cnt_bdr, ism330dhcx_pin_int1_route_t::int1_ctrl, ism330dhcx_md1_cfg_t::int1_double_tap, ism330dhcx_int1_ctrl_t::int1_drdy_g, ism330dhcx_int1_ctrl_t::int1_drdy_xl, ism330dhcx_md1_cfg_t::int1_emb_func, ism330dhcx_md1_cfg_t::int1_ff, ism330dhcx_int1_ctrl_t::int1_fifo_full, ism330dhcx_int1_ctrl_t::int1_fifo_ovr, ism330dhcx_int1_ctrl_t::int1_fifo_th, ism330dhcx_fsm_int1_a_t::int1_fsm1, ism330dhcx_fsm_int1_b_t::int1_fsm10, ism330dhcx_fsm_int1_b_t::int1_fsm11, ism330dhcx_fsm_int1_b_t::int1_fsm12, ism330dhcx_fsm_int1_b_t::int1_fsm13, ism330dhcx_fsm_int1_b_t::int1_fsm14, ism330dhcx_fsm_int1_b_t::int1_fsm15, ism330dhcx_fsm_int1_b_t::int1_fsm16, ism330dhcx_fsm_int1_a_t::int1_fsm2, ism330dhcx_fsm_int1_a_t::int1_fsm3, ism330dhcx_fsm_int1_a_t::int1_fsm4, ism330dhcx_fsm_int1_a_t::int1_fsm5, ism330dhcx_fsm_int1_a_t::int1_fsm6, ism330dhcx_fsm_int1_a_t::int1_fsm7, ism330dhcx_fsm_int1_a_t::int1_fsm8, ism330dhcx_fsm_int1_b_t::int1_fsm9, ism330dhcx_emb_func_int1_t::int1_fsm_lc, ism330dhcx_mlc_int1_t::int1_mlc1, ism330dhcx_mlc_int1_t::int1_mlc2, ism330dhcx_mlc_int1_t::int1_mlc3, ism330dhcx_mlc_int1_t::int1_mlc4, ism330dhcx_mlc_int1_t::int1_mlc5, ism330dhcx_mlc_int1_t::int1_mlc6, ism330dhcx_mlc_int1_t::int1_mlc7, ism330dhcx_mlc_int1_t::int1_mlc8, ism330dhcx_md1_cfg_t::int1_shub, ism330dhcx_emb_func_int1_t::int1_sig_mot, ism330dhcx_md1_cfg_t::int1_single_tap, ism330dhcx_md1_cfg_t::int1_sleep_change, ism330dhcx_emb_func_int1_t::int1_step_detector, ism330dhcx_emb_func_int1_t::int1_tilt, ism330dhcx_md1_cfg_t::int1_wu, ISM330DHCX_EMB_FUNC_INT1, ISM330DHCX_EMBEDDED_FUNC_BANK, ISM330DHCX_FSM_INT1_A, ISM330DHCX_FSM_INT1_B, ISM330DHCX_INT1_CTRL, ISM330DHCX_MD1_CFG, ism330dhcx_mem_bank_set(), ISM330DHCX_MLC_INT1, ism330dhcx_read_reg(), ISM330DHCX_TAP_CFG2, ISM330DHCX_USER_BANK, ism330dhcx_write_reg(), ism330dhcx_pin_int1_route_t::md1_cfg, ism330dhcx_pin_int1_route_t::mlc_int1, PROPERTY_DISABLE, and PROPERTY_ENABLE.

Referenced by QwDevISM330DHCX::configureWakeUpOnInt1(), QwDevISM330DHCX::setAccelStatustoInt1(), and QwDevISM330DHCX::setGyroStatustoInt1().

◆ ism330dhcx_pin_int2_route_get()

int32_t ism330dhcx_pin_int2_route_get ( stmdev_ctx_t * ctx,
ism330dhcx_pin_int2_route_t * val )

Select the signal that need to route on int2 pad.

[get]

Parameters
ctxRead / write interface definitions.(ptr)
valStructure of registers INT2_CTRL, MD2_CFG, EMB_FUNC_INT2, FSM_INT2_A, FSM_INT2_B.[get]
Return values
Interfacestatus (MANDATORY: return 0 -> no Error).

Definition at line 4891 of file ism330dhcx_reg.c.

References ism330dhcx_pin_int2_route_t::emb_func_int2, ism330dhcx_pin_int2_route_t::fsm_int2_a, ism330dhcx_pin_int2_route_t::fsm_int2_b, ism330dhcx_pin_int2_route_t::int2_ctrl, ISM330DHCX_EMB_FUNC_INT2, ISM330DHCX_EMBEDDED_FUNC_BANK, ISM330DHCX_FSM_INT2_A, ISM330DHCX_FSM_INT2_B, ISM330DHCX_INT2_CTRL, ISM330DHCX_MD2_CFG, ism330dhcx_mem_bank_set(), ISM330DHCX_MLC_INT2, ism330dhcx_read_reg(), ISM330DHCX_USER_BANK, ism330dhcx_pin_int2_route_t::md2_cfg, and ism330dhcx_pin_int2_route_t::mlc_int2.

Referenced by QwDevISM330DHCX::setAccelStatustoInt2(), and QwDevISM330DHCX::setGyroStatustoInt2().

◆ ism330dhcx_pin_int2_route_set()

int32_t ism330dhcx_pin_int2_route_set ( stmdev_ctx_t * ctx,
ism330dhcx_pin_int2_route_t * val )

Select the signal that need to route on int2 pad[set].

Parameters
ctxRead / write interface definitions.(ptr)
valStructure of registers INT2_CTRL, MD2_CFG, EMB_FUNC_INT2, FSM_INT2_A, FSM_INT2_B
Return values
Interfacestatus (MANDATORY: return 0 -> no Error).

Definition at line 4760 of file ism330dhcx_reg.c.

References ism330dhcx_pin_int2_route_t::emb_func_int2, ism330dhcx_pin_int2_route_t::fsm_int2_a, ism330dhcx_pin_int2_route_t::fsm_int2_b, ism330dhcx_md2_cfg_t::int2_6d, ism330dhcx_int2_ctrl_t::int2_cnt_bdr, ism330dhcx_pin_int2_route_t::int2_ctrl, ism330dhcx_md2_cfg_t::int2_double_tap, ism330dhcx_int2_ctrl_t::int2_drdy_g, ism330dhcx_int2_ctrl_t::int2_drdy_temp, ism330dhcx_int2_ctrl_t::int2_drdy_xl, ism330dhcx_md2_cfg_t::int2_emb_func, ism330dhcx_md2_cfg_t::int2_ff, ism330dhcx_int2_ctrl_t::int2_fifo_full, ism330dhcx_int2_ctrl_t::int2_fifo_ovr, ism330dhcx_int2_ctrl_t::int2_fifo_th, ism330dhcx_fsm_int2_a_t::int2_fsm1, ism330dhcx_fsm_int2_b_t::int2_fsm10, ism330dhcx_fsm_int2_b_t::int2_fsm11, ism330dhcx_fsm_int2_b_t::int2_fsm12, ism330dhcx_fsm_int2_b_t::int2_fsm13, ism330dhcx_fsm_int2_b_t::int2_fsm14, ism330dhcx_fsm_int2_b_t::int2_fsm15, ism330dhcx_fsm_int2_b_t::int2_fsm16, ism330dhcx_fsm_int2_a_t::int2_fsm2, ism330dhcx_fsm_int2_a_t::int2_fsm3, ism330dhcx_fsm_int2_a_t::int2_fsm4, ism330dhcx_fsm_int2_a_t::int2_fsm5, ism330dhcx_fsm_int2_a_t::int2_fsm6, ism330dhcx_fsm_int2_a_t::int2_fsm7, ism330dhcx_fsm_int2_a_t::int2_fsm8, ism330dhcx_fsm_int2_b_t::int2_fsm9, ism330dhcx_emb_func_int2_t::int2_fsm_lc, ism330dhcx_mlc_int2_t::int2_mlc1, ism330dhcx_mlc_int2_t::int2_mlc2, ism330dhcx_mlc_int2_t::int2_mlc3, ism330dhcx_mlc_int2_t::int2_mlc4, ism330dhcx_mlc_int2_t::int2_mlc5, ism330dhcx_mlc_int2_t::int2_mlc6, ism330dhcx_mlc_int2_t::int2_mlc7, ism330dhcx_mlc_int2_t::int2_mlc8, ism330dhcx_emb_func_int2_t::int2_sig_mot, ism330dhcx_md2_cfg_t::int2_single_tap, ism330dhcx_md2_cfg_t::int2_sleep_change, ism330dhcx_emb_func_int2_t::int2_step_detector, ism330dhcx_emb_func_int2_t::int2_tilt, ism330dhcx_md2_cfg_t::int2_wu, ism330dhcx_tap_cfg2_t::interrupts_enable, ISM330DHCX_EMB_FUNC_INT2, ISM330DHCX_EMBEDDED_FUNC_BANK, ISM330DHCX_FSM_INT2_A, ISM330DHCX_FSM_INT2_B, ISM330DHCX_INT2_CTRL, ISM330DHCX_MD2_CFG, ism330dhcx_mem_bank_set(), ISM330DHCX_MLC_INT2, ism330dhcx_read_reg(), ISM330DHCX_TAP_CFG2, ISM330DHCX_USER_BANK, ism330dhcx_write_reg(), ism330dhcx_pin_int2_route_t::md2_cfg, ism330dhcx_pin_int2_route_t::mlc_int2, PROPERTY_DISABLE, and PROPERTY_ENABLE.

Referenced by QwDevISM330DHCX::setAccelStatustoInt2(), and QwDevISM330DHCX::setGyroStatustoInt2().

◆ ism330dhcx_pin_mode_get()

int32_t ism330dhcx_pin_mode_get ( stmdev_ctx_t * ctx,
ism330dhcx_pp_od_t * val )

Push-pull/open drain selection on interrupt pads.

[get]

Parameters
ctxRead / write interface definitions.(ptr)
valGet the values of pp_od in reg CTRL3_C
Return values
Interfacestatus (MANDATORY: return 0 -> no Error).

Definition at line 4975 of file ism330dhcx_reg.c.

References ISM330DHCX_CTRL3_C, ISM330DHCX_OPEN_DRAIN, ISM330DHCX_PUSH_PULL, ism330dhcx_read_reg(), and ism330dhcx_ctrl3_c_t::pp_od.

◆ ism330dhcx_pin_mode_set()

int32_t ism330dhcx_pin_mode_set ( stmdev_ctx_t * ctx,
ism330dhcx_pp_od_t val )

Push-pull/open drain selection on interrupt pads.

[set]

Parameters
ctxRead / write interface definitions.(ptr)
valChange the values of pp_od in reg CTRL3_C
Return values
Interfacestatus (MANDATORY: return 0 -> no Error).

Definition at line 4949 of file ism330dhcx_reg.c.

References ISM330DHCX_CTRL3_C, ism330dhcx_read_reg(), ism330dhcx_write_reg(), and ism330dhcx_ctrl3_c_t::pp_od.

Referenced by QwDevISM330DHCX::setPinMode().

◆ ism330dhcx_pin_polarity_get()

int32_t ism330dhcx_pin_polarity_get ( stmdev_ctx_t * ctx,
ism330dhcx_h_lactive_t * val )

Interrupt active-high/low.

[get]

Parameters
ctxRead / write interface definitions.(ptr)
valGet the values of h_lactive in reg CTRL3_C
Return values
Interfacestatus (MANDATORY: return 0 -> no Error).

Definition at line 5035 of file ism330dhcx_reg.c.

References ism330dhcx_ctrl3_c_t::h_lactive, ISM330DHCX_ACTIVE_HIGH, ISM330DHCX_ACTIVE_LOW, ISM330DHCX_CTRL3_C, and ism330dhcx_read_reg().

◆ ism330dhcx_pin_polarity_set()

int32_t ism330dhcx_pin_polarity_set ( stmdev_ctx_t * ctx,
ism330dhcx_h_lactive_t val )

Interrupt active-high/low.

[set]

Parameters
ctxRead / write interface definitions.(ptr)
valChange the values of h_lactive in reg CTRL3_C
Return values
Interfacestatus (MANDATORY: return 0 -> no Error).

Definition at line 5009 of file ism330dhcx_reg.c.

References ism330dhcx_ctrl3_c_t::h_lactive, ISM330DHCX_CTRL3_C, ism330dhcx_read_reg(), and ism330dhcx_write_reg().

Referenced by QwDevISM330DHCX::setPinMode().