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Collaboration diagram for TIM Extended Remapping:

Macros

#define TIM_TIM1_ETR_GPIO   0x00000000U
 TIM1_ETR is connected to GPIO.
#define TIM_TIM1_ETR_COMP1   TIM1_AF1_ETRSEL_0
 TIM1_ETR is connected to COMP1 OUT.
#define TIM_TIM1_ETR_COMP2   TIM1_AF1_ETRSEL_1
 TIM1_ETR is connected to COMP2 OUT.
#define TIM_TIM1_ETR_ADC1_AWD1   (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0)
 TIM1_ETR is connected to ADC1 AWD1.
#define TIM_TIM1_ETR_ADC1_AWD2   (TIM1_AF1_ETRSEL_2)
 TIM1_ETR is connected to ADC1 AWD2.
#define TIM_TIM1_ETR_ADC1_AWD3   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0)
 TIM1_ETR is connected to ADC1 AWD3.
#define TIM_TIM1_ETR_ADC3_AWD1   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1)
 TIM1_ETR is connected to ADC3 AWD1.
#define TIM_TIM1_ETR_ADC3_AWD2   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0)
 TIM1_ETR is connected to ADC3 AWD2.
#define TIM_TIM1_ETR_ADC3_AWD3   TIM1_AF1_ETRSEL_3
 TIM1_ETR is connected to ADC3 AWD3.
#define TIM_TIM8_ETR_GPIO   0x00000000U
 TIM8_ETR is connected to GPIO.
#define TIM_TIM8_ETR_COMP1   TIM8_AF1_ETRSEL_0
 TIM8_ETR is connected to COMP1 OUT.
#define TIM_TIM8_ETR_COMP2   TIM8_AF1_ETRSEL_1
 TIM8_ETR is connected to COMP2 OUT.
#define TIM_TIM8_ETR_ADC2_AWD1   (TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0)
 TIM8_ETR is connected to ADC2 AWD1.
#define TIM_TIM8_ETR_ADC2_AWD2   (TIM8_AF1_ETRSEL_2)
 TIM8_ETR is connected to ADC2 AWD2.
#define TIM_TIM8_ETR_ADC2_AWD3   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0)
 TIM8_ETR is connected to ADC2 AWD3.
#define TIM_TIM8_ETR_ADC3_AWD1   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1)
 TIM8_ETR is connected to ADC3 AWD1.
#define TIM_TIM8_ETR_ADC3_AWD2   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0)
 TIM8_ETR is connected to ADC3 AWD2.
#define TIM_TIM8_ETR_ADC3_AWD3   TIM8_AF1_ETRSEL_3
 TIM8_ETR is connected to ADC3 AWD3.
#define TIM_TIM2_ETR_GPIO   0x00000000U
 TIM2_ETR is connected to GPIO.
#define TIM_TIM2_ETR_COMP1   (TIM2_AF1_ETRSEL_0)
 TIM2_ETR is connected to COMP1 OUT.
#define TIM_TIM2_ETR_COMP2   (TIM2_AF1_ETRSEL_1)
 TIM2_ETR is connected to COMP2 OUT.
#define TIM_TIM2_ETR_RCC_LSE   (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0)
 TIM2_ETR is connected to RCC LSE.
#define TIM_TIM2_ETR_SAI1_FSA   TIM2_AF1_ETRSEL_2
 TIM2_ETR is connected to SAI1 FS_A.
#define TIM_TIM2_ETR_SAI1_FSB   (TIM2_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0)
 TIM2_ETR is connected to SAI1 FS_B.
#define TIM_TIM3_ETR_GPIO   0x00000000U
 TIM3_ETR is connected to GPIO.
#define TIM_TIM3_ETR_COMP1   TIM3_AF1_ETRSEL_0
 TIM3_ETR is connected to COMP1 OUT.
#define TIM_TIM5_ETR_GPIO   0x00000000U
 TIM5_ETR is connected to GPIO.
#define TIM_TIM5_ETR_SAI2_FSA   TIM5_AF1_ETRSEL_0
 TIM5_ETR is connected to SAI2 FS_A.
#define TIM_TIM5_ETR_SAI2_FSB   TIM5_AF1_ETRSEL_1
 TIM5_ETR is connected to SAI2 FS_B.
#define TIM_TIM5_ETR_SAI4_FSA   TIM5_AF1_ETRSEL_0
 TIM5_ETR is connected to SAI4 FS_A.
#define TIM_TIM5_ETR_SAI4_FSB   TIM5_AF1_ETRSEL_1
 TIM5_ETR is connected to SAI4 FS_B.
#define TIM_TIM23_ETR_GPIO   0x00000000U
 TIM23_ETR is connected to GPIO.
#define TIM_TIM23_ETR_COMP1   (TIM2_AF1_ETRSEL_0)
 TIM23_ETR is connected to COMP1 OUT.
#define TIM_TIM23_ETR_COMP2   (TIM2_AF1_ETRSEL_1)
 TIM23_ETR is connected to COMP2 OUT.
#define TIM_TIM24_ETR_GPIO   0x00000000U
 TIM24_ETR is connected to GPIO.
#define TIM_TIM24_ETR_SAI4_FSA   TIM5_AF1_ETRSEL_0
 TIM24_ETR is connected to SAI4 FS_A.
#define TIM_TIM24_ETR_SAI4_FSB   TIM5_AF1_ETRSEL_1
 TIM24_ETR is connected to SAI4 FS_B.
#define TIM_TIM24_ETR_SAI1_FSA   (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0)
 TIM24_ETR is connected to SAI1 FS_A.
#define TIM_TIM24_ETR_SAI1_FSB   TIM2_AF1_ETRSEL_2
 TIM24_ETR is connected to SAI1 FS_B.

Detailed Description

Macro Definition Documentation

◆ TIM_TIM1_ETR_ADC1_AWD1

#define TIM_TIM1_ETR_ADC1_AWD1   (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0)

TIM1_ETR is connected to ADC1 AWD1.

Definition at line 94 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM1_ETR_ADC1_AWD2

#define TIM_TIM1_ETR_ADC1_AWD2   (TIM1_AF1_ETRSEL_2)

TIM1_ETR is connected to ADC1 AWD2.

Definition at line 95 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM1_ETR_ADC1_AWD3

#define TIM_TIM1_ETR_ADC1_AWD3   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0)

TIM1_ETR is connected to ADC1 AWD3.

Definition at line 96 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM1_ETR_ADC3_AWD1

#define TIM_TIM1_ETR_ADC3_AWD1   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1)

TIM1_ETR is connected to ADC3 AWD1.

Definition at line 97 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM1_ETR_ADC3_AWD2

#define TIM_TIM1_ETR_ADC3_AWD2   (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0)

TIM1_ETR is connected to ADC3 AWD2.

Definition at line 98 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM1_ETR_ADC3_AWD3

#define TIM_TIM1_ETR_ADC3_AWD3   TIM1_AF1_ETRSEL_3

TIM1_ETR is connected to ADC3 AWD3.

Definition at line 99 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM1_ETR_COMP1

#define TIM_TIM1_ETR_COMP1   TIM1_AF1_ETRSEL_0

TIM1_ETR is connected to COMP1 OUT.

Definition at line 92 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM1_ETR_COMP2

#define TIM_TIM1_ETR_COMP2   TIM1_AF1_ETRSEL_1

TIM1_ETR is connected to COMP2 OUT.

Definition at line 93 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM1_ETR_GPIO

#define TIM_TIM1_ETR_GPIO   0x00000000U

TIM1_ETR is connected to GPIO.

Definition at line 91 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM23_ETR_COMP1

#define TIM_TIM23_ETR_COMP1   (TIM2_AF1_ETRSEL_0)

TIM23_ETR is connected to COMP1 OUT.

Definition at line 128 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM23_ETR_COMP2

#define TIM_TIM23_ETR_COMP2   (TIM2_AF1_ETRSEL_1)

TIM23_ETR is connected to COMP2 OUT.

Definition at line 129 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM23_ETR_GPIO

#define TIM_TIM23_ETR_GPIO   0x00000000U

TIM23_ETR is connected to GPIO.

Definition at line 127 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM24_ETR_GPIO

#define TIM_TIM24_ETR_GPIO   0x00000000U

TIM24_ETR is connected to GPIO.

Definition at line 131 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM24_ETR_SAI1_FSA

#define TIM_TIM24_ETR_SAI1_FSA   (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0)

TIM24_ETR is connected to SAI1 FS_A.

Definition at line 134 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM24_ETR_SAI1_FSB

#define TIM_TIM24_ETR_SAI1_FSB   TIM2_AF1_ETRSEL_2

TIM24_ETR is connected to SAI1 FS_B.

Definition at line 135 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM24_ETR_SAI4_FSA

#define TIM_TIM24_ETR_SAI4_FSA   TIM5_AF1_ETRSEL_0

TIM24_ETR is connected to SAI4 FS_A.

Definition at line 132 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM24_ETR_SAI4_FSB

#define TIM_TIM24_ETR_SAI4_FSB   TIM5_AF1_ETRSEL_1

TIM24_ETR is connected to SAI4 FS_B.

Definition at line 133 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM2_ETR_COMP1

#define TIM_TIM2_ETR_COMP1   (TIM2_AF1_ETRSEL_0)

TIM2_ETR is connected to COMP1 OUT.

Definition at line 112 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM2_ETR_COMP2

#define TIM_TIM2_ETR_COMP2   (TIM2_AF1_ETRSEL_1)

TIM2_ETR is connected to COMP2 OUT.

Definition at line 113 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM2_ETR_GPIO

#define TIM_TIM2_ETR_GPIO   0x00000000U

TIM2_ETR is connected to GPIO.

Definition at line 111 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM2_ETR_RCC_LSE

#define TIM_TIM2_ETR_RCC_LSE   (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0)

TIM2_ETR is connected to RCC LSE.

Definition at line 114 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM2_ETR_SAI1_FSA

#define TIM_TIM2_ETR_SAI1_FSA   TIM2_AF1_ETRSEL_2

TIM2_ETR is connected to SAI1 FS_A.

Definition at line 115 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM2_ETR_SAI1_FSB

#define TIM_TIM2_ETR_SAI1_FSB   (TIM2_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0)

TIM2_ETR is connected to SAI1 FS_B.

Definition at line 116 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM3_ETR_COMP1

#define TIM_TIM3_ETR_COMP1   TIM3_AF1_ETRSEL_0

TIM3_ETR is connected to COMP1 OUT.

Definition at line 119 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM3_ETR_GPIO

#define TIM_TIM3_ETR_GPIO   0x00000000U

TIM3_ETR is connected to GPIO.

Definition at line 118 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM5_ETR_GPIO

#define TIM_TIM5_ETR_GPIO   0x00000000U

TIM5_ETR is connected to GPIO.

Definition at line 121 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM5_ETR_SAI2_FSA

#define TIM_TIM5_ETR_SAI2_FSA   TIM5_AF1_ETRSEL_0

TIM5_ETR is connected to SAI2 FS_A.

Definition at line 122 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM5_ETR_SAI2_FSB

#define TIM_TIM5_ETR_SAI2_FSB   TIM5_AF1_ETRSEL_1

TIM5_ETR is connected to SAI2 FS_B.

Definition at line 123 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM5_ETR_SAI4_FSA

#define TIM_TIM5_ETR_SAI4_FSA   TIM5_AF1_ETRSEL_0

TIM5_ETR is connected to SAI4 FS_A.

Definition at line 124 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM5_ETR_SAI4_FSB

#define TIM_TIM5_ETR_SAI4_FSB   TIM5_AF1_ETRSEL_1

TIM5_ETR is connected to SAI4 FS_B.

Definition at line 125 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM8_ETR_ADC2_AWD1

#define TIM_TIM8_ETR_ADC2_AWD1   (TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0)

TIM8_ETR is connected to ADC2 AWD1.

Definition at line 104 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM8_ETR_ADC2_AWD2

#define TIM_TIM8_ETR_ADC2_AWD2   (TIM8_AF1_ETRSEL_2)

TIM8_ETR is connected to ADC2 AWD2.

Definition at line 105 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM8_ETR_ADC2_AWD3

#define TIM_TIM8_ETR_ADC2_AWD3   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0)

TIM8_ETR is connected to ADC2 AWD3.

Definition at line 106 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM8_ETR_ADC3_AWD1

#define TIM_TIM8_ETR_ADC3_AWD1   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1)

TIM8_ETR is connected to ADC3 AWD1.

Definition at line 107 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM8_ETR_ADC3_AWD2

#define TIM_TIM8_ETR_ADC3_AWD2   (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0)

TIM8_ETR is connected to ADC3 AWD2.

Definition at line 108 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM8_ETR_ADC3_AWD3

#define TIM_TIM8_ETR_ADC3_AWD3   TIM8_AF1_ETRSEL_3

TIM8_ETR is connected to ADC3 AWD3.

Definition at line 109 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM8_ETR_COMP1

#define TIM_TIM8_ETR_COMP1   TIM8_AF1_ETRSEL_0

TIM8_ETR is connected to COMP1 OUT.

Definition at line 102 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM8_ETR_COMP2

#define TIM_TIM8_ETR_COMP2   TIM8_AF1_ETRSEL_1

TIM8_ETR is connected to COMP2 OUT.

Definition at line 103 of file stm32h7xx_hal_tim_ex.h.

◆ TIM_TIM8_ETR_GPIO

#define TIM_TIM8_ETR_GPIO   0x00000000U

TIM8_ETR is connected to GPIO.

Definition at line 101 of file stm32h7xx_hal_tim_ex.h.