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stm32h7xx_hal_tim_ex.h
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1/**
2 ******************************************************************************
3 * @file stm32h7xx_hal_tim_ex.h
4 * @author MCD Application Team
5 * @brief Header file of TIM HAL Extended module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_TIM_EX_H
21#define STM32H7xx_HAL_TIM_EX_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
30/** @addtogroup STM32H7xx_HAL_Driver
31 * @{
32 */
33
34/** @addtogroup TIMEx
35 * @{
36 */
37
38/* Exported types ------------------------------------------------------------*/
39/** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
40 * @{
41 */
42
43/**
44 * @brief TIM Hall sensor Configuration Structure definition
45 */
46
47typedef struct
48{
49 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
50 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
51
52 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
53 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
54
55 uint32_t IC1Filter; /*!< Specifies the input capture filter.
56 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
57
58 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
59 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
60} TIM_HallSensor_InitTypeDef;
61#if defined(TIM_BREAK_INPUT_SUPPORT)
62
63/**
64 * @brief TIM Break/Break2 input configuration
65 */
66typedef struct
67{
68 uint32_t Source; /*!< Specifies the source of the timer break input.
69 This parameter can be a value of @ref TIMEx_Break_Input_Source */
70 uint32_t Enable; /*!< Specifies whether or not the break input source is enabled.
71 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */
72 uint32_t Polarity; /*!< Specifies the break input source polarity.
73 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity
74 Not relevant when analog watchdog output of the DFSDM1 used as break input source */
75} TIMEx_BreakInputConfigTypeDef;
76
77#endif /* TIM_BREAK_INPUT_SUPPORT */
78/**
79 * @}
80 */
81/* End of exported types -----------------------------------------------------*/
82
83/* Exported constants --------------------------------------------------------*/
84/** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
85 * @{
86 */
87
88/** @defgroup TIMEx_Remap TIM Extended Remapping
89 * @{
90 */
91#define TIM_TIM1_ETR_GPIO 0x00000000U /*!< TIM1_ETR is connected to GPIO */
92#define TIM_TIM1_ETR_COMP1 TIM1_AF1_ETRSEL_0 /*!< TIM1_ETR is connected to COMP1 OUT */
93#define TIM_TIM1_ETR_COMP2 TIM1_AF1_ETRSEL_1 /*!< TIM1_ETR is connected to COMP2 OUT */
94#define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM1_ETR is connected to ADC1 AWD1 */
95#define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_AF1_ETRSEL_2) /*!< TIM1_ETR is connected to ADC1 AWD2 */
96#define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_0) /*!< TIM1_ETR is connected to ADC1 AWD3 */
97#define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1) /*!< TIM1_ETR is connected to ADC3 AWD1 */
98#define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_AF1_ETRSEL_2 | TIM1_AF1_ETRSEL_1 | TIM1_AF1_ETRSEL_0) /*!< TIM1_ETR is connected to ADC3 AWD2 */
99#define TIM_TIM1_ETR_ADC3_AWD3 TIM1_AF1_ETRSEL_3 /*!< TIM1_ETR is connected to ADC3 AWD3 */
100
101#define TIM_TIM8_ETR_GPIO 0x00000000U /*!< TIM8_ETR is connected to GPIO */
102#define TIM_TIM8_ETR_COMP1 TIM8_AF1_ETRSEL_0 /*!< TIM8_ETR is connected to COMP1 OUT */
103#define TIM_TIM8_ETR_COMP2 TIM8_AF1_ETRSEL_1 /*!< TIM8_ETR is connected to COMP2 OUT */
104#define TIM_TIM8_ETR_ADC2_AWD1 (TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /*!< TIM8_ETR is connected to ADC2 AWD1 */
105#define TIM_TIM8_ETR_ADC2_AWD2 (TIM8_AF1_ETRSEL_2) /*!< TIM8_ETR is connected to ADC2 AWD2 */
106#define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0) /*!< TIM8_ETR is connected to ADC2 AWD3 */
107#define TIM_TIM8_ETR_ADC3_AWD1 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1) /*!< TIM8_ETR is connected to ADC3 AWD1 */
108#define TIM_TIM8_ETR_ADC3_AWD2 (TIM8_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /*!< TIM8_ETR is connected to ADC3 AWD2 */
109#define TIM_TIM8_ETR_ADC3_AWD3 TIM8_AF1_ETRSEL_3 /*!< TIM8_ETR is connected to ADC3 AWD3 */
110
111#define TIM_TIM2_ETR_GPIO 0x00000000U /*!< TIM2_ETR is connected to GPIO */
112#define TIM_TIM2_ETR_COMP1 (TIM2_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to COMP1 OUT */
113#define TIM_TIM2_ETR_COMP2 (TIM2_AF1_ETRSEL_1) /*!< TIM2_ETR is connected to COMP2 OUT */
114#define TIM_TIM2_ETR_RCC_LSE (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to RCC LSE */
115#define TIM_TIM2_ETR_SAI1_FSA TIM2_AF1_ETRSEL_2 /*!< TIM2_ETR is connected to SAI1 FS_A */
116#define TIM_TIM2_ETR_SAI1_FSB (TIM2_AF1_ETRSEL_2 | TIM8_AF1_ETRSEL_0) /*!< TIM2_ETR is connected to SAI1 FS_B */
117
118#define TIM_TIM3_ETR_GPIO 0x00000000U /*!< TIM3_ETR is connected to GPIO */
119#define TIM_TIM3_ETR_COMP1 TIM3_AF1_ETRSEL_0 /*!< TIM3_ETR is connected to COMP1 OUT */
120
121#define TIM_TIM5_ETR_GPIO 0x00000000U /*!< TIM5_ETR is connected to GPIO */
122#define TIM_TIM5_ETR_SAI2_FSA TIM5_AF1_ETRSEL_0 /*!< TIM5_ETR is connected to SAI2 FS_A */
123#define TIM_TIM5_ETR_SAI2_FSB TIM5_AF1_ETRSEL_1 /*!< TIM5_ETR is connected to SAI2 FS_B */
124#define TIM_TIM5_ETR_SAI4_FSA TIM5_AF1_ETRSEL_0 /*!< TIM5_ETR is connected to SAI4 FS_A */
125#define TIM_TIM5_ETR_SAI4_FSB TIM5_AF1_ETRSEL_1 /*!< TIM5_ETR is connected to SAI4 FS_B */
126
127#define TIM_TIM23_ETR_GPIO 0x00000000U /*!< TIM23_ETR is connected to GPIO */
128#define TIM_TIM23_ETR_COMP1 (TIM2_AF1_ETRSEL_0) /*!< TIM23_ETR is connected to COMP1 OUT */
129#define TIM_TIM23_ETR_COMP2 (TIM2_AF1_ETRSEL_1) /*!< TIM23_ETR is connected to COMP2 OUT */
130
131#define TIM_TIM24_ETR_GPIO 0x00000000U /*!< TIM24_ETR is connected to GPIO */
132#define TIM_TIM24_ETR_SAI4_FSA TIM5_AF1_ETRSEL_0 /*!< TIM24_ETR is connected to SAI4 FS_A */
133#define TIM_TIM24_ETR_SAI4_FSB TIM5_AF1_ETRSEL_1 /*!< TIM24_ETR is connected to SAI4 FS_B */
134#define TIM_TIM24_ETR_SAI1_FSA (TIM2_AF1_ETRSEL_1 | TIM8_AF1_ETRSEL_0) /*!< TIM24_ETR is connected to SAI1 FS_A */
135#define TIM_TIM24_ETR_SAI1_FSB TIM2_AF1_ETRSEL_2 /*!< TIM24_ETR is connected to SAI1 FS_B */
136/**
137 * @}
138 */
139#if defined(TIM_BREAK_INPUT_SUPPORT)
140
141/** @defgroup TIMEx_Break_Input TIM Extended Break input
142 * @{
143 */
144#define TIM_BREAKINPUT_BRK 0x00000001U /*!< Timer break input */
145#define TIM_BREAKINPUT_BRK2 0x00000002U /*!< Timer break2 input */
146/**
147 * @}
148 */
149
150/** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source
151 * @{
152 */
153#define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /*!< An external source (GPIO) is connected to the BKIN pin */
154#define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /*!< The COMP1 output is connected to the break input */
155#define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /*!< The COMP2 output is connected to the break input */
156#define TIM_BREAKINPUTSOURCE_DFSDM1 0x00000008U /*!< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */
157/**
158 * @}
159 */
160
161/** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling
162 * @{
163 */
164#define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /*!< Break input source is disabled */
165#define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /*!< Break input source is enabled */
166/**
167 * @}
168 */
169
170/** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity
171 * @{
172 */
173#define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /*!< Break input source is active low */
174#define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /*!< Break input source is active_high */
175/**
176 * @}
177 */
178#endif /* TIM_BREAK_INPUT_SUPPORT */
179
180/** @defgroup TIMEx_Timer_Input_Selection TIM Extended Timer input selection
181 * @{
182 */
183#define TIM_TIM1_TI1_GPIO 0x00000000U /*!< TIM1_TI1 is connected to GPIO */
184#define TIM_TIM1_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM1_TI1 is connected to COMP1 OUT */
185
186#define TIM_TIM8_TI1_GPIO 0x00000000U /*!< TIM8_TI1 is connected to GPIO */
187#define TIM_TIM8_TI1_COMP2 TIM_TISEL_TI1SEL_0 /*!< TIM8_TI1 is connected to COMP2 OUT */
188
189#define TIM_TIM2_TI4_GPIO 0x00000000U /*!< TIM2_TI4 is connected to GPIO */
190#define TIM_TIM2_TI4_COMP1 TIM_TISEL_TI4SEL_0 /*!< TIM2_TI4 is connected to COMP1 OUT */
191#define TIM_TIM2_TI4_COMP2 TIM_TISEL_TI4SEL_1 /*!< TIM2_TI4 is connected to COMP2 OUT */
192#define TIM_TIM2_TI4_COMP1_COMP2 (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /*!< TIM2_TI4 is connected to COMP2 OUT OR COMP2 OUT */
193
194#define TIM_TIM3_TI1_GPIO 0x00000000U /*!< TIM3_TI1 is connected to GPIO */
195#define TIM_TIM3_TI1_COMP1 TIM_TISEL_TI1SEL_0 /*!< TIM3_TI1 is connected to COMP1 OUT */
196#define TIM_TIM3_TI1_COMP2 TIM_TISEL_TI1SEL_1 /*!< TIM3_TI1 is connected to COMP2 OUT */
197#define TIM_TIM3_TI1_COMP1_COMP2 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /*!< TIM3_TI1 is connected to COMP1 OUT or COMP2 OUT */
198
199#define TIM_TIM5_TI1_GPIO 0x00000000U /*!< TIM5_TI1 is connected to GPIO */
200#define TIM_TIM5_TI1_CAN_TMP TIM_TISEL_TI1SEL_0 /*!< TIM5_TI1 is connected to CAN TMP */
201#define TIM_TIM5_TI1_CAN_RTP TIM_TISEL_TI1SEL_1 /*!< TIM5_TI1 is connected to CAN RTP */
202
203#define TIM_TIM12_TI1_GPIO 0x00000000U /*!< TIM12 TI1 is connected to GPIO */
204#define TIM_TIM12_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0 /*!< TIM12 TI1 is connected to SPDIF FS */
205
206#define TIM_TIM15_TI1_GPIO 0x00000000U /*!< TIM15_TI1 is connected to GPIO */
207#define TIM_TIM15_TI1_TIM2_CH1 TIM_TISEL_TI1SEL_0 /*!< TIM15_TI1 is connected to TIM2 CH1 */
208#define TIM_TIM15_TI1_TIM3_CH1 TIM_TISEL_TI1SEL_1 /*!< TIM15_TI1 is connected to TIM3 CH1 */
209#define TIM_TIM15_TI1_TIM4_CH1 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /*!< TIM15_TI1 is connected to TIM4 CH1 */
210#define TIM_TIM15_TI1_RCC_LSE (TIM_TISEL_TI1SEL_2) /*!< TIM15_TI1 is connected to RCC LSE */
211#define TIM_TIM15_TI1_RCC_CSI (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_0) /*!< TIM15_TI1 is connected to RCC CSI */
212#define TIM_TIM15_TI1_RCC_MCO2 (TIM_TISEL_TI1SEL_2 | TIM_TISEL_TI1SEL_1) /*!< TIM15_TI1 is connected to RCC MCO2 */
213
214#define TIM_TIM15_TI2_GPIO 0x00000000U /*!< TIM15_TI2 is connected to GPIO */
215#define TIM_TIM15_TI2_TIM2_CH2 (TIM_TISEL_TI2SEL_0) /*!< TIM15_TI2 is connected to TIM2 CH2 */
216#define TIM_TIM15_TI2_TIM3_CH2 (TIM_TISEL_TI2SEL_1) /*!< TIM15_TI2 is connected to TIM3 CH2 */
217#define TIM_TIM15_TI2_TIM4_CH2 (TIM_TISEL_TI2SEL_0 | TIM_TISEL_TI2SEL_1) /*!< TIM15_TI2 is connected to TIM4 CH2 */
218
219#define TIM_TIM16_TI1_GPIO 0x00000000U /*!< TIM16 TI1 is connected to GPIO */
220#define TIM_TIM16_TI1_RCC_LSI TIM_TISEL_TI1SEL_0 /*!< TIM16 TI1 is connected to RCC LSI */
221#define TIM_TIM16_TI1_RCC_LSE TIM_TISEL_TI1SEL_1 /*!< TIM16 TI1 is connected to RCC LSE */
222#define TIM_TIM16_TI1_WKUP_IT (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /*!< TIM16 TI1 is connected to WKUP_IT */
223
224#define TIM_TIM17_TI1_GPIO 0x00000000U /*!< TIM17 TI1 is connected to GPIO */
225#define TIM_TIM17_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0 /*!< TIM17 TI1 is connected to SPDIF FS */
226#define TIM_TIM17_TI1_RCC_HSE1MHZ TIM_TISEL_TI1SEL_1 /*!< TIM17 TI1 is connected to RCC HSE 1Mhz */
227#define TIM_TIM17_TI1_RCC_MCO1 (TIM_TISEL_TI1SEL_0 | TIM_TISEL_TI1SEL_1) /*!< TIM17 TI1 is connected to RCC MCO1 */
228
229#define TIM_TIM23_TI4_GPIO 0x00000000U /*!< TIM23_TI4 is connected to GPIO */
230#define TIM_TIM23_TI4_COMP1 TIM_TISEL_TI4SEL_0 /*!< TIM23_TI4 is connected to COMP1 OUT */
231#define TIM_TIM23_TI4_COMP2 TIM_TISEL_TI4SEL_1 /*!< TIM23_TI4 is connected to COMP2 OUT */
232#define TIM_TIM23_TI4_COMP1_COMP2 (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /*!< TIM23_TI4 is connected to COMP1 OUT or COMP2 OUT */
233
234#define TIM_TIM24_TI1_GPIO 0x00000000U /*!< TIM24_TI1 is connected to GPIO */
235#define TIM_TIM24_TI1_CAN_TMP TIM_TISEL_TI1SEL_0 /*!< TIM24_TI1 is connected to CAN TMP */
236#define TIM_TIM24_TI1_CAN_RTP TIM_TISEL_TI1SEL_1 /*!< TIM24_TI1 is connected to CAN RTP */
237#define TIM_TIM24_TI1_CAN_SOC (TIM_TISEL_TI4SEL_0 | TIM_TISEL_TI4SEL_1) /*!< TIM24_TI1 is connected to CAN SOC */
238/**
239 * @}
240 */
241
242/**
243 * @}
244 */
245/* End of exported constants -------------------------------------------------*/
246
247/* Exported macro ------------------------------------------------------------*/
248/** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
249 * @{
250 */
251
252/**
253 * @}
254 */
255/* End of exported macro -----------------------------------------------------*/
256
257/* Private macro -------------------------------------------------------------*/
258/** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
259 * @{
260 */
261#define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \
262 ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))
263
264#define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \
265 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \
266 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \
267 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1))
268
269#define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \
270 ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))
271
272#define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \
273 ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH))
274
275#define IS_TIM_TISEL(__TISEL__) (((__TISEL__) == TIM_TIM1_TI1_GPIO) ||\
276 ((__TISEL__) == TIM_TIM1_TI1_COMP1) ||\
277 ((__TISEL__) == TIM_TIM8_TI1_GPIO) ||\
278 ((__TISEL__) == TIM_TIM8_TI1_COMP2) ||\
279 ((__TISEL__) == TIM_TIM2_TI4_GPIO) ||\
280 ((__TISEL__) == TIM_TIM2_TI4_COMP1) ||\
281 ((__TISEL__) == TIM_TIM2_TI4_COMP2) ||\
282 ((__TISEL__) == TIM_TIM2_TI4_COMP1_COMP2) ||\
283 ((__TISEL__) == TIM_TIM3_TI1_GPIO) ||\
284 ((__TISEL__) == TIM_TIM3_TI1_COMP1) ||\
285 ((__TISEL__) == TIM_TIM3_TI1_COMP2) ||\
286 ((__TISEL__) == TIM_TIM3_TI1_COMP1_COMP2) ||\
287 ((__TISEL__) == TIM_TIM5_TI1_GPIO) ||\
288 ((__TISEL__) == TIM_TIM5_TI1_CAN_TMP) ||\
289 ((__TISEL__) == TIM_TIM5_TI1_CAN_RTP) ||\
290 ((__TISEL__) == TIM_TIM12_TI1_SPDIF_FS) ||\
291 ((__TISEL__) == TIM_TIM12_TI1_GPIO) ||\
292 ((__TISEL__) == TIM_TIM15_TI1_GPIO) ||\
293 ((__TISEL__) == TIM_TIM15_TI1_TIM2_CH1) ||\
294 ((__TISEL__) == TIM_TIM15_TI1_TIM3_CH1) ||\
295 ((__TISEL__) == TIM_TIM15_TI1_TIM4_CH1) ||\
296 ((__TISEL__) == TIM_TIM15_TI1_RCC_LSE) ||\
297 ((__TISEL__) == TIM_TIM15_TI1_RCC_CSI) ||\
298 ((__TISEL__) == TIM_TIM15_TI1_RCC_MCO2) ||\
299 ((__TISEL__) == TIM_TIM15_TI2_GPIO) ||\
300 ((__TISEL__) == TIM_TIM15_TI2_TIM2_CH2) ||\
301 ((__TISEL__) == TIM_TIM15_TI2_TIM3_CH2) ||\
302 ((__TISEL__) == TIM_TIM15_TI2_TIM4_CH2) ||\
303 ((__TISEL__) == TIM_TIM16_TI1_GPIO) ||\
304 ((__TISEL__) == TIM_TIM16_TI1_RCC_LSI) ||\
305 ((__TISEL__) == TIM_TIM16_TI1_RCC_LSE) ||\
306 ((__TISEL__) == TIM_TIM16_TI1_WKUP_IT) ||\
307 ((__TISEL__) == TIM_TIM17_TI1_GPIO) ||\
308 ((__TISEL__) == TIM_TIM17_TI1_SPDIF_FS) ||\
309 ((__TISEL__) == TIM_TIM17_TI1_RCC_HSE1MHZ) ||\
310 ((__TISEL__) == TIM_TIM17_TI1_RCC_MCO1) ||\
311 ((__TISEL__) == TIM_TIM23_TI4_GPIO) ||\
312 ((__TISEL__) == TIM_TIM23_TI4_COMP1) ||\
313 ((__TISEL__) == TIM_TIM23_TI4_COMP2) ||\
314 ((__TISEL__) == TIM_TIM23_TI4_COMP1_COMP2) ||\
315 ((__TISEL__) == TIM_TIM24_TI1_GPIO) ||\
316 ((__TISEL__) == TIM_TIM24_TI1_CAN_TMP) ||\
317 ((__TISEL__) == TIM_TIM24_TI1_CAN_RTP) ||\
318 ((__TISEL__) == TIM_TIM24_TI1_CAN_SOC))
319
320#define IS_TIM_REMAP(__RREMAP__) (((__RREMAP__) == TIM_TIM1_ETR_GPIO) ||\
321 ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD1) ||\
322 ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD2) ||\
323 ((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD3) ||\
324 ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD1) ||\
325 ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD2) ||\
326 ((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD3) ||\
327 ((__RREMAP__) == TIM_TIM1_ETR_COMP1) ||\
328 ((__RREMAP__) == TIM_TIM1_ETR_COMP2) ||\
329 ((__RREMAP__) == TIM_TIM8_ETR_GPIO) ||\
330 ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD1) ||\
331 ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD2) ||\
332 ((__RREMAP__) == TIM_TIM8_ETR_ADC2_AWD3) ||\
333 ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD1) ||\
334 ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD2) ||\
335 ((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD3) ||\
336 ((__RREMAP__) == TIM_TIM8_ETR_COMP1) ||\
337 ((__RREMAP__) == TIM_TIM8_ETR_COMP2) ||\
338 ((__RREMAP__) == TIM_TIM2_ETR_GPIO) ||\
339 ((__RREMAP__) == TIM_TIM2_ETR_COMP1) ||\
340 ((__RREMAP__) == TIM_TIM2_ETR_COMP2) ||\
341 ((__RREMAP__) == TIM_TIM2_ETR_RCC_LSE) ||\
342 ((__RREMAP__) == TIM_TIM2_ETR_SAI1_FSA) ||\
343 ((__RREMAP__) == TIM_TIM2_ETR_SAI1_FSB) ||\
344 ((__RREMAP__) == TIM_TIM3_ETR_GPIO) ||\
345 ((__RREMAP__) == TIM_TIM3_ETR_COMP1) ||\
346 ((__RREMAP__) == TIM_TIM5_ETR_GPIO) ||\
347 ((__RREMAP__) == TIM_TIM5_ETR_SAI2_FSA) ||\
348 ((__RREMAP__) == TIM_TIM5_ETR_SAI2_FSB) ||\
349 ((__RREMAP__) == TIM_TIM23_ETR_GPIO) ||\
350 ((__RREMAP__) == TIM_TIM23_ETR_COMP1) ||\
351 ((__RREMAP__) == TIM_TIM23_ETR_COMP2) ||\
352 ((__RREMAP__) == TIM_TIM24_ETR_GPIO) ||\
353 ((__RREMAP__) == TIM_TIM24_ETR_SAI4_FSA) ||\
354 ((__RREMAP__) == TIM_TIM24_ETR_SAI4_FSB) ||\
355 ((__RREMAP__) == TIM_TIM24_ETR_SAI1_FSA) ||\
356 ((__RREMAP__) == TIM_TIM24_ETR_SAI1_FSB))
357
358/**
359 * @}
360 */
361/* End of private macro ------------------------------------------------------*/
362
363/* Exported functions --------------------------------------------------------*/
364/** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
365 * @{
366 */
367
368/** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
369 * @brief Timer Hall Sensor functions
370 * @{
371 */
372/* Timer Hall Sensor functions **********************************************/
373HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig);
374HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
375
376void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
377void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
378
379/* Blocking mode: Polling */
380HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
381HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
382/* Non-Blocking mode: Interrupt */
383HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
384HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
385/* Non-Blocking mode: DMA */
386HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
387HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
388/**
389 * @}
390 */
391
392/** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
393 * @brief Timer Complementary Output Compare functions
394 * @{
395 */
396/* Timer Complementary Output Compare functions *****************************/
397/* Blocking mode: Polling */
398HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
399HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
400
401/* Non-Blocking mode: Interrupt */
402HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
403HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
404
405/* Non-Blocking mode: DMA */
406HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
407 uint16_t Length);
408HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
409/**
410 * @}
411 */
412
413/** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
414 * @brief Timer Complementary PWM functions
415 * @{
416 */
417/* Timer Complementary PWM functions ****************************************/
418/* Blocking mode: Polling */
419HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
420HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
421
422/* Non-Blocking mode: Interrupt */
423HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
424HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
425/* Non-Blocking mode: DMA */
426HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData,
427 uint16_t Length);
428HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
429/**
430 * @}
431 */
432
433/** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
434 * @brief Timer Complementary One Pulse functions
435 * @{
436 */
437/* Timer Complementary One Pulse functions **********************************/
438/* Blocking mode: Polling */
439HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
440HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
441
442/* Non-Blocking mode: Interrupt */
443HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
444HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
445/**
446 * @}
447 */
448
449/** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
450 * @brief Peripheral Control functions
451 * @{
452 */
453/* Extended Control functions ************************************************/
454HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
455 uint32_t CommutationSource);
456HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
457 uint32_t CommutationSource);
458HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
459 uint32_t CommutationSource);
460HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
461 const TIM_MasterConfigTypeDef *sMasterConfig);
462HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
463 const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
464#if defined(TIM_BREAK_INPUT_SUPPORT)
465HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput,
466 const TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
467#endif /* TIM_BREAK_INPUT_SUPPORT */
468HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
469HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
470HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel);
471#if defined(TIM_BDTR_BKBID)
472
473HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput);
474HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(const TIM_HandleTypeDef *htim, uint32_t BreakInput);
475#endif /* TIM_BDTR_BKBID */
476/**
477 * @}
478 */
479
480/** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
481 * @brief Extended Callbacks functions
482 * @{
483 */
484/* Extended Callback **********************************************************/
485void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim);
486void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim);
487void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
488void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim);
489/**
490 * @}
491 */
492
493/** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
494 * @brief Extended Peripheral State functions
495 * @{
496 */
497/* Extended Peripheral State functions ***************************************/
498HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim);
499HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN);
500/**
501 * @}
502 */
503
504/**
505 * @}
506 */
507/* End of exported functions -------------------------------------------------*/
508
509/* Private functions----------------------------------------------------------*/
510/** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions
511 * @{
512 */
513void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
514void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma);
515/**
516 * @}
517 */
518/* End of private functions --------------------------------------------------*/
519
520/**
521 * @}
522 */
523
524/**
525 * @}
526 */
527
528#ifdef __cplusplus
529}
530#endif
531
532
533#endif /* STM32H7xx_HAL_TIM_EX_H */
DMA_HandleTypeDef
struct __DMA_HandleTypeDef DMA_HandleTypeDef
DMA handle Structure definition.
HAL_TIMEx_HallSensor_Start_DMA
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
HAL_TIMEx_HallSensor_DeInit
HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
HAL_TIMEx_HallSensor_Init
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, const TIM_HallSensor_InitTypeDef *sConfig)
HAL_TIMEx_HallSensor_Stop
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
HAL_TIMEx_HallSensor_MspInit
void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
HAL_TIMEx_HallSensor_Start
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
HAL_TIMEx_HallSensor_Stop_DMA
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
HAL_TIMEx_HallSensor_MspDeInit
void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
HAL_TIMEx_HallSensor_Stop_IT
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
HAL_TIMEx_HallSensor_Start_IT
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
HAL_TIMEx_OCN_Stop_DMA
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIMEx_OCN_Start_IT
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIMEx_OCN_Start_DMA
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData, uint16_t Length)
HAL_TIMEx_OCN_Start
HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIMEx_OCN_Stop
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIMEx_OCN_Stop_IT
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIMEx_PWMN_Stop
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIMEx_PWMN_Stop_DMA
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIMEx_PWMN_Stop_IT
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIMEx_PWMN_Start_DMA
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *pData, uint16_t Length)
HAL_TIMEx_PWMN_Start
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIMEx_PWMN_Start_IT
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIMEx_OnePulseN_Start_IT
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
HAL_TIMEx_OnePulseN_Start
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
HAL_TIMEx_OnePulseN_Stop_IT
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
HAL_TIMEx_OnePulseN_Stop
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
HAL_TIMEx_TISelection
HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel)
HAL_TIMEx_ConfigBreakDeadTime
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
HAL_TIMEx_RemapConfig
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
HAL_TIMEx_ConfigCommutEvent_DMA
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
HAL_TIMEx_MasterConfigSynchronization
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig)
HAL_TIMEx_GroupChannel5
HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels)
HAL_TIMEx_ConfigCommutEvent
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
HAL_TIMEx_ConfigCommutEvent_IT
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
HAL_TIMEx_Break2Callback
void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
HAL_TIMEx_BreakCallback
void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
HAL_TIMEx_CommutHalfCpltCallback
void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
HAL_TIMEx_CommutCallback
void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
HAL_TIMEx_GetChannelNState
HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(const TIM_HandleTypeDef *htim, uint32_t ChannelN)
HAL_TIMEx_HallSensor_GetState
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(const TIM_HandleTypeDef *htim)
TIMEx_DMACommutationHalfCplt
void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
TIMEx_DMACommutationCplt
void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
HAL_TIM_ChannelStateTypeDef
HAL_TIM_ChannelStateTypeDef
TIM Channel States definition.
Definition stm32h7xx_hal_tim.h:321
HAL_TIM_StateTypeDef
HAL_TIM_StateTypeDef
HAL State structures definition.
Definition stm32h7xx_hal_tim.h:309
stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition stm32h7xx_hal_def.h:40
TIM_BreakDeadTimeConfigTypeDef
TIM Break input(s) and Dead time configuration Structure definition.
Definition stm32h7xx_hal_tim.h:272
TIM_HallSensor_InitTypeDef
TIM Hall sensor Configuration Structure definition.
Definition stm32h7xx_hal_tim_ex.h:48
TIM_HallSensor_InitTypeDef::IC1Polarity
uint32_t IC1Polarity
Specifies the active edge of the input signal.
Definition stm32h7xx_hal_tim_ex.h:49
TIM_HallSensor_InitTypeDef::IC1Filter
uint32_t IC1Filter
Specifies the input capture filter.
Definition stm32h7xx_hal_tim_ex.h:55
TIM_HallSensor_InitTypeDef::Commutation_Delay
uint32_t Commutation_Delay
Specifies the pulse value to be loaded into the Capture Compare Register.
Definition stm32h7xx_hal_tim_ex.h:58
TIM_HallSensor_InitTypeDef::IC1Prescaler
uint32_t IC1Prescaler
Specifies the Input Capture Prescaler.
Definition stm32h7xx_hal_tim_ex.h:52
TIM_HandleTypeDef
TIM Time Base Handle Structure definition.
Definition stm32h7xx_hal_tim.h:359
TIM_MasterConfigTypeDef
TIM Master configuration Structure definition.
Definition stm32h7xx_hal_tim.h:234