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TIM Auto-Reload Preload
Collaboration diagram for TIM Auto-Reload Preload:

Macros

#define TIM_AUTORELOAD_PRELOAD_DISABLE   0x00000000U
 TIMx_ARR register is not buffered.
#define TIM_AUTORELOAD_PRELOAD_ENABLE   TIM_CR1_ARPE
 TIMx_ARR register is buffered.

Detailed Description

Macro Definition Documentation

◆ TIM_AUTORELOAD_PRELOAD_DISABLE

#define TIM_AUTORELOAD_PRELOAD_DISABLE   0x00000000U

TIMx_ARR register is not buffered.

Definition at line 589 of file stm32h7xx_hal_tim.h.

Referenced by MX_TIM1_Init(), MX_TIM2_Init(), and MX_TIM3_Init().

◆ TIM_AUTORELOAD_PRELOAD_ENABLE

#define TIM_AUTORELOAD_PRELOAD_ENABLE   TIM_CR1_ARPE

TIMx_ARR register is buffered.

Definition at line 590 of file stm32h7xx_hal_tim.h.