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stm32h7xx_hal.h
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1/**
2 ******************************************************************************
3 * @file stm32h7xx_hal.h
4 * @author MCD Application Team
5 * @brief This file contains all the functions prototypes for the HAL
6 * module driver.
7 ******************************************************************************
8 * @attention
9 *
10 * Copyright (c) 2017 STMicroelectronics.
11 * All rights reserved.
12 *
13 * This software is licensed under terms that can be found in the LICENSE file
14 * in the root directory of this software component.
15 * If no LICENSE file comes with this software, it is provided AS-IS.
16 *
17 ******************************************************************************
18 */
19
20/* Define to prevent recursive inclusion -------------------------------------*/
21#ifndef STM32H7xx_HAL_H
22#define STM32H7xx_HAL_H
23
24#ifdef __cplusplus
25 extern "C" {
26#endif
27
28/* Includes ------------------------------------------------------------------*/
29#include "stm32h7xx_hal_conf.h"
30
31/** @addtogroup STM32H7xx_HAL_Driver
32 * @{
33 */
34
35/** @addtogroup HAL
36 * @{
37 */
38
39/* Exported types ------------------------------------------------------------*/
40/** @defgroup HAL_TICK_FREQ Tick Frequency
41 * @{
42 */
50/**
51 * @}
52 */
53
54/* Exported constants --------------------------------------------------------*/
55/** @defgroup HAL_Exported_Constants HAL Exported Constants
56 * @{
57 */
58/** @defgroup REV_ID device revision ID
59 * @{
60 */
61#define REV_ID_Y ((uint32_t)0x1003) /*!< STM32H7 rev.Y */
62#define REV_ID_Z ((uint32_t)0x1001) /*!< STM32H7 rev.Z */
63#define REV_ID_A ((uint32_t)0x1000) /*!< STM32H7 rev.A */
64#define REV_ID_B ((uint32_t)0x2000) /*!< STM32H7 rev.B */
65#if (STM32H7_DEV_ID == 0x450UL)
66#define REV_ID_X ((uint32_t)0x2001) /*!< STM32H7 rev.X */
67#else
68#define REV_ID_X ((uint32_t)0x1007) /*!< STM32H7 rev.X */
69#endif /* STM32H7_DEV_ID */
70#define REV_ID_V ((uint32_t)0x2003) /*!< STM32H7 rev.V */
71
72/**
73 * @}
74 */
75
76/** @defgroup SYSCFG_Exported_Constants SYSCFG Exported Constants
77 * @{
78 */
79
80/** @defgroup SYSCFG_VREFBUF_VoltageScale VREFBUF Voltage Scale
81 * @{
82 */
83#define SYSCFG_VREFBUF_VOLTAGE_SCALE0 VREFBUF_CSR_VRS_OUT1 /*!< Voltage reference scale 0 (VREF_OUT1) */
84#define SYSCFG_VREFBUF_VOLTAGE_SCALE1 VREFBUF_CSR_VRS_OUT2 /*!< Voltage reference scale 1 (VREF_OUT2) */
85#define SYSCFG_VREFBUF_VOLTAGE_SCALE2 VREFBUF_CSR_VRS_OUT3 /*!< Voltage reference scale 2 (VREF_OUT3) */
86#define SYSCFG_VREFBUF_VOLTAGE_SCALE3 VREFBUF_CSR_VRS_OUT4 /*!< Voltage reference scale 3 (VREF_OUT4) */
87
88
89#define IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(__SCALE__) (((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE0) || \
90 ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE1) || \
91 ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE2) || \
92 ((__SCALE__) == SYSCFG_VREFBUF_VOLTAGE_SCALE3))
93
94
95/**
96 * @}
97 */
98
99/** @defgroup SYSCFG_VREFBUF_HighImpedance VREFBUF High Impedance
100 * @{
101 */
102#define SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE ((uint32_t)0x00000000) /*!< VREF_plus pin is internally connected to Voltage reference buffer output */
103#define SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE VREFBUF_CSR_HIZ /*!< VREF_plus pin is high impedance */
104
105#define IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(__VALUE__) (((__VALUE__) == SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE) || \
106 ((__VALUE__) == SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE))
107
108#define IS_SYSCFG_VREFBUF_TRIMMING(__VALUE__) (((__VALUE__) > 0UL) && ((__VALUE__) <= VREFBUF_CCR_TRIM))
109
110/**
111 * @}
112 */
113
114#if !defined(SYSCFG_PMCR_BOOSTEN)
115/** @defgroup SYSCFG_FastModePlus_GPIO Fast-mode Plus on GPIO
116 * @{
117 */
118
119/** @brief Fast-mode Plus driving capability on a specific GPIO
120 */
121#define SYSCFG_FASTMODEPLUS_PB6 SYSCFG_PMCR_I2C_PB6_FMP /*!< Enable Fast-mode Plus on PB6 */
122#define SYSCFG_FASTMODEPLUS_PB7 SYSCFG_PMCR_I2C_PB7_FMP /*!< Enable Fast-mode Plus on PB7 */
123#define SYSCFG_FASTMODEPLUS_PB8 SYSCFG_PMCR_I2C_PB8_FMP /*!< Enable Fast-mode Plus on PB8 */
124#define SYSCFG_FASTMODEPLUS_PB9 SYSCFG_PMCR_I2C_PB9_FMP /*!< Enable Fast-mode Plus on PB9 */
125
126#define IS_SYSCFG_FASTMODEPLUS(__PIN__) ((((__PIN__) & SYSCFG_FASTMODEPLUS_PB6) == SYSCFG_FASTMODEPLUS_PB6) || \
127 (((__PIN__) & SYSCFG_FASTMODEPLUS_PB7) == SYSCFG_FASTMODEPLUS_PB7) || \
128 (((__PIN__) & SYSCFG_FASTMODEPLUS_PB8) == SYSCFG_FASTMODEPLUS_PB8) || \
129 (((__PIN__) & SYSCFG_FASTMODEPLUS_PB9) == SYSCFG_FASTMODEPLUS_PB9))
130
131/**
132 * @}
133 */
134#endif /* ! SYSCFG_PMCR_BOOSTEN */
135
136
137#if defined(SYSCFG_ADC2ALT_ADC2_ROUT0) || defined(SYSCFG_ADC2ALT_ADC2_ROUT1)
138/** @defgroup SYSCFG_Adc2_Alternate_Connection SYSCFG ADC2 Alternate Connection
139 * @{
140 */
141
142/** @brief Adc2 Alternate Connection on Vinp[16] and Vinp[17]
143 */
144#define SYSCFG_ADC2_ROUT0_DAC1_1 ((uint32_t)0x00000000) /*!< DAC1_out1 connected to ADC2 VINP[16] */
145#define SYSCFG_ADC2_ROUT0_VBAT4 SYSCFG_ADC2ALT_ADC2_ROUT0 /*!< VBAT/4 connected to ADC2 VINP[16] */
146#define SYSCFG_ADC2_ROUT1_DAC1_2 ((uint32_t)0x00000000) /*!< DAC1_out2 connected to ADC2 VINP[17] */
147#define SYSCFG_ADC2_ROUT1_VREFINT SYSCFG_ADC2ALT_ADC2_ROUT1 /*!< VREFINT connected to ADC2 VINP[17] */
148
149#define IS_SYSCFG_ADC2ALT_ROUT0(__VALUE__) (((__VALUE__) == SYSCFG_ADC2_ROUT0_DAC1_1) || \
150 ((__VALUE__) == SYSCFG_ADC2_ROUT0_VBAT4))
151#define IS_SYSCFG_ADC2ALT_ROUT1(__VALUE__) (((__VALUE__) == SYSCFG_ADC2_ROUT1_DAC1_2) || \
152 ((__VALUE__) == SYSCFG_ADC2_ROUT1_VREFINT))
153
154/**
155 * @}
156 */
157#endif /*SYSCFG_ADC2ALT_ADC2_ROUT0 || SYSCFG_ADC2ALT_ADC2_ROUT1*/
158
159
160/** @defgroup SYSCFG_Ethernet_Config Ethernet Config
161 * @{
162 */
163#define SYSCFG_ETH_MII ((uint32_t)0x00000000) /*!< Select the Media Independent Interface */
164#define SYSCFG_ETH_RMII SYSCFG_PMCR_EPIS_SEL_2 /*!< Select the Reduced Media Independent Interface */
165
166#define IS_SYSCFG_ETHERNET_CONFIG(CONFIG) (((CONFIG) == SYSCFG_ETH_MII) || \
167 ((CONFIG) == SYSCFG_ETH_RMII))
168
169/**
170 * @}
171 */
172
173
174/** @defgroup SYSCFG_Analog_Switch_Config Analog Switch Config
175 * @{
176 */
177#define SYSCFG_SWITCH_PA0 SYSCFG_PMCR_PA0SO /*!< Select PA0 analog switch */
178#define SYSCFG_SWITCH_PA1 SYSCFG_PMCR_PA1SO /*!< Select PA1 analog switch */
179#define SYSCFG_SWITCH_PC2 SYSCFG_PMCR_PC2SO /*!< Select PC2 analog switch */
180#define SYSCFG_SWITCH_PC3 SYSCFG_PMCR_PC3SO /*!< Select PC3 analog switch */
181
182
183
184
185#define SYSCFG_SWITCH_PA0_OPEN SYSCFG_PMCR_PA0SO /*!< PA0 analog switch opened */
186#define SYSCFG_SWITCH_PA0_CLOSE ((uint32_t)0x00000000) /*!< PA0 analog switch closed */
187#define SYSCFG_SWITCH_PA1_OPEN SYSCFG_PMCR_PA1SO /*!< PA1 analog switch opened */
188#define SYSCFG_SWITCH_PA1_CLOSE ((uint32_t)0x00000000) /*!< PA1 analog switch closed*/
189#define SYSCFG_SWITCH_PC2_OPEN SYSCFG_PMCR_PC2SO /*!< PC2 analog switch opened */
190#define SYSCFG_SWITCH_PC2_CLOSE ((uint32_t)0x00000000) /*!< PC2 analog switch closed */
191#define SYSCFG_SWITCH_PC3_OPEN SYSCFG_PMCR_PC3SO /*!< PC3 analog switch opened */
192#define SYSCFG_SWITCH_PC3_CLOSE ((uint32_t)0x00000000) /*!< PC3 analog switch closed */
193
194/**
195 * @}
196 */
197
198#define IS_SYSCFG_ANALOG_SWITCH(SWITCH) ((((SWITCH) & SYSCFG_SWITCH_PA0) == SYSCFG_SWITCH_PA0)|| \
199 (((SWITCH) & SYSCFG_SWITCH_PA1) == SYSCFG_SWITCH_PA1) || \
200 (((SWITCH) & SYSCFG_SWITCH_PC2) == SYSCFG_SWITCH_PC2) || \
201 (((SWITCH) & SYSCFG_SWITCH_PC3) == SYSCFG_SWITCH_PC3))
202
203
204#define IS_SYSCFG_SWITCH_STATE(STATE) ((((STATE) & SYSCFG_SWITCH_PA0_OPEN) == SYSCFG_SWITCH_PA0_OPEN) || \
205 (((STATE) & SYSCFG_SWITCH_PA0_CLOSE) == SYSCFG_SWITCH_PA0_CLOSE) || \
206 (((STATE) & SYSCFG_SWITCH_PA1_OPEN) == SYSCFG_SWITCH_PA1_OPEN) || \
207 (((STATE) & SYSCFG_SWITCH_PA1_CLOSE) == SYSCFG_SWITCH_PA1_CLOSE) || \
208 (((STATE) & SYSCFG_SWITCH_PC2_OPEN) == SYSCFG_SWITCH_PC2_OPEN) || \
209 (((STATE) & SYSCFG_SWITCH_PC2_CLOSE) == SYSCFG_SWITCH_PC2_CLOSE) || \
210 (((STATE) & SYSCFG_SWITCH_PC3_OPEN) == SYSCFG_SWITCH_PC3_OPEN) || \
211 (((STATE) & SYSCFG_SWITCH_PC3_CLOSE) == SYSCFG_SWITCH_PC3_CLOSE))
212
213
214/** @defgroup SYSCFG_Boot_Config Boot Config
215 * @{
216 */
217#define SYSCFG_BOOT_ADDR0 ((uint32_t)0x00000000) /*!< Select Boot address0 */
218#define SYSCFG_BOOT_ADDR1 ((uint32_t)0x00000001) /*!< Select Boot address1 */
219
220#define IS_SYSCFG_BOOT_REGISTER(REGISTER) (((REGISTER) == SYSCFG_BOOT_ADDR0)|| \
221 ((REGISTER) == SYSCFG_BOOT_ADDR1))
222
223#define IS_SYSCFG_BOOT_ADDRESS(ADDRESS) ((ADDRESS) < PERIPH_BASE)
224
225/**
226 * @}
227 */
228
229
230/** @defgroup SYSCFG_IOCompenstionCell_Config IOCompenstionCell Config
231 * @{
232 */
233#define SYSCFG_CELL_CODE ((uint32_t)0x00000000) /*!< Select Code from the cell */
234#define SYSCFG_REGISTER_CODE SYSCFG_CCCSR_CS /*!< Code from the SYSCFG compensation cell code register */
235
236#define IS_SYSCFG_CODE_SELECT(SELECT) (((SELECT) == SYSCFG_CELL_CODE)|| \
237 ((SELECT) == SYSCFG_REGISTER_CODE))
238
239#define IS_SYSCFG_CODE_CONFIG(CONFIG) ((CONFIG) < (0x10UL))
240
241/**
242 * @}
243 */
244
245/**
246 * @}
247 */
248
249
250/** @defgroup EXTI_Event_Input_Config Event Input Config
251 * @{
252 */
253
254#define EXTI_MODE_IT ((uint32_t)0x00010000)
255#define EXTI_MODE_EVT ((uint32_t)0x00020000)
256#define EXTI_RISING_EDGE ((uint32_t)0x00100000)
257#define EXTI_FALLING_EDGE ((uint32_t)0x00200000)
258
259#define IS_EXTI_EDGE_LINE(EDGE) (((EDGE) == EXTI_RISING_EDGE) || ((EDGE) == EXTI_FALLING_EDGE))
260#define IS_EXTI_MODE_LINE(MODE) (((MODE) == EXTI_MODE_IT) || ((MODE) == EXTI_MODE_EVT))
261
262#define EXTI_LINE0 ((uint32_t)0x00) /*!< External interrupt LINE 0 */
263#define EXTI_LINE1 ((uint32_t)0x01) /*!< External interrupt LINE 1 */
264#define EXTI_LINE2 ((uint32_t)0x02) /*!< External interrupt LINE 2 */
265#define EXTI_LINE3 ((uint32_t)0x03) /*!< External interrupt LINE 3 */
266#define EXTI_LINE4 ((uint32_t)0x04) /*!< External interrupt LINE 4 */
267#define EXTI_LINE5 ((uint32_t)0x05) /*!< External interrupt LINE 5 */
268#define EXTI_LINE6 ((uint32_t)0x06) /*!< External interrupt LINE 6 */
269#define EXTI_LINE7 ((uint32_t)0x07) /*!< External interrupt LINE 7 */
270#define EXTI_LINE8 ((uint32_t)0x08) /*!< External interrupt LINE 8 */
271#define EXTI_LINE9 ((uint32_t)0x09) /*!< External interrupt LINE 9 */
272#define EXTI_LINE10 ((uint32_t)0x0A) /*!< External interrupt LINE 10 */
273#define EXTI_LINE11 ((uint32_t)0x0B) /*!< External interrupt LINE 11 */
274#define EXTI_LINE12 ((uint32_t)0x0C) /*!< External interrupt LINE 12 */
275#define EXTI_LINE13 ((uint32_t)0x0D) /*!< External interrupt LINE 13 */
276#define EXTI_LINE14 ((uint32_t)0x0E) /*!< External interrupt LINE 14 */
277#define EXTI_LINE15 ((uint32_t)0x0F) /*!< External interrupt LINE 15 */
278#define EXTI_LINE16 ((uint32_t)0x10)
279#define EXTI_LINE17 ((uint32_t)0x11)
280#define EXTI_LINE18 ((uint32_t)0x12)
281#define EXTI_LINE19 ((uint32_t)0x13)
282#define EXTI_LINE20 ((uint32_t)0x14)
283#define EXTI_LINE21 ((uint32_t)0x15)
284#define EXTI_LINE22 ((uint32_t)0x16)
285#define EXTI_LINE23 ((uint32_t)0x17)
286#define EXTI_LINE24 ((uint32_t)0x18)
287#define EXTI_LINE25 ((uint32_t)0x19)
288#define EXTI_LINE26 ((uint32_t)0x1A)
289#define EXTI_LINE27 ((uint32_t)0x1B)
290#define EXTI_LINE28 ((uint32_t)0x1C)
291#define EXTI_LINE29 ((uint32_t)0x1D)
292#define EXTI_LINE30 ((uint32_t)0x1E)
293#define EXTI_LINE31 ((uint32_t)0x1F)
294#define EXTI_LINE32 ((uint32_t)0x20)
295#define EXTI_LINE33 ((uint32_t)0x21)
296#define EXTI_LINE34 ((uint32_t)0x22)
297#define EXTI_LINE35 ((uint32_t)0x23)
298#define EXTI_LINE36 ((uint32_t)0x24)
299#define EXTI_LINE37 ((uint32_t)0x25)
300#define EXTI_LINE38 ((uint32_t)0x26)
301#define EXTI_LINE39 ((uint32_t)0x27)
302
303#define EXTI_LINE40 ((uint32_t)0x28)
304#define EXTI_LINE41 ((uint32_t)0x29)
305#define EXTI_LINE42 ((uint32_t)0x2A)
306#define EXTI_LINE43 ((uint32_t)0x2B)
307#define EXTI_LINE44 ((uint32_t)0x2C) /* Not available in all family lines */
308/* EXTI_LINE45 Reserved */
309#if defined(DUAL_CORE)
310#define EXTI_LINE46 ((uint32_t)0x2E)
311#else
312/* EXTI_LINE46 Reserved */
313#endif /* DUAL_CORE */
314#define EXTI_LINE47 ((uint32_t)0x2F)
315#define EXTI_LINE48 ((uint32_t)0x30)
316#define EXTI_LINE49 ((uint32_t)0x31)
317#define EXTI_LINE50 ((uint32_t)0x32)
318#define EXTI_LINE51 ((uint32_t)0x33)
319#define EXTI_LINE52 ((uint32_t)0x34)
320#define EXTI_LINE53 ((uint32_t)0x35)
321#define EXTI_LINE54 ((uint32_t)0x36)
322#define EXTI_LINE55 ((uint32_t)0x37)
323#define EXTI_LINE56 ((uint32_t)0x38)
324#define EXTI_LINE57 ((uint32_t)0x39)
325#define EXTI_LINE58 ((uint32_t)0x3A)
326#define EXTI_LINE59 ((uint32_t)0x3B)
327#define EXTI_LINE60 ((uint32_t)0x3C)
328#define EXTI_LINE61 ((uint32_t)0x3D)
329#define EXTI_LINE62 ((uint32_t)0x3E)
330#define EXTI_LINE63 ((uint32_t)0x3F)
331#define EXTI_LINE64 ((uint32_t)0x40)
332#define EXTI_LINE65 ((uint32_t)0x41)
333#define EXTI_LINE66 ((uint32_t)0x42)
334#define EXTI_LINE67 ((uint32_t)0x43)
335#define EXTI_LINE68 ((uint32_t)0x44)
336#define EXTI_LINE69 ((uint32_t)0x45)
337#define EXTI_LINE70 ((uint32_t)0x46)
338#define EXTI_LINE71 ((uint32_t)0x47)
339#define EXTI_LINE72 ((uint32_t)0x48)
340#define EXTI_LINE73 ((uint32_t)0x49)
341#define EXTI_LINE74 ((uint32_t)0x4A)
342#define EXTI_LINE75 ((uint32_t)0x4B) /* Not available in all family lines */
343#define EXTI_LINE76 ((uint32_t)0x4C) /* Not available in all family lines */
344#if defined(DUAL_CORE)
345#define EXTI_LINE77 ((uint32_t)0x4D)
346#define EXTI_LINE78 ((uint32_t)0x4E)
347#define EXTI_LINE79 ((uint32_t)0x4F)
348#define EXTI_LINE80 ((uint32_t)0x50)
349#else
350/* EXTI_LINE77 Reserved */
351/* EXTI_LINE78 Reserved */
352/* EXTI_LINE79 Reserved */
353/* EXTI_LINE80 Reserved */
354#endif /* DUAL_CORE */
355/* EXTI_LINE81 Reserved */
356#if defined(DUAL_CORE)
357#define EXTI_LINE82 ((uint32_t)0x52)
358#else
359/* EXTI_LINE82 Reserved */
360#endif /* DUAL_CORE */
361/* EXTI_LINE83 Reserved */
362#if defined(DUAL_CORE)
363#define EXTI_LINE84 ((uint32_t)0x54)
364#else
365/* EXTI_LINE84 Reserved */
366#endif /* DUAL_CORE */
367#define EXTI_LINE85 ((uint32_t)0x55)
368#define EXTI_LINE86 ((uint32_t)0x56) /* Not available in all family lines */
369#define EXTI_LINE87 ((uint32_t)0x57)
370#define EXTI_LINE88 ((uint32_t)0x58) /* Not available in all family lines */
371#define EXTI_LINE89 ((uint32_t)0x59) /* Not available in all family lines */
372#define EXTI_LINE90 ((uint32_t)0x5A) /* Not available in all family lines */
373#define EXTI_LINE91 ((uint32_t)0x5B) /* Not available in all family lines */
374
375#if defined(DUAL_CORE)
376#define IS_HAL_EXTI_CONFIG_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
377 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
378 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
379 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
380 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
381 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
382 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
383 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
384 ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
385 ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
386 ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
387 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE51) || \
388 ((LINE) == EXTI_LINE82) || ((LINE) == EXTI_LINE84) || \
389 ((LINE) == EXTI_LINE85) || ((LINE) == EXTI_LINE86))
390#else
391#define IS_HAL_EXTI_CONFIG_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1)|| \
392 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
393 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
394 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
395 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
396 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
397 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
398 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
399 ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
400 ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
401 ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
402 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE51) || \
403 ((LINE) == EXTI_LINE85) || ((LINE) == EXTI_LINE86))
404#endif /* DUAL_CORE */
405
406#if defined(DUAL_CORE)
407#define IS_EXTI_ALL_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
408 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
409 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
410 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
411 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
412 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
413 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
414 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
415 ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
416 ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
417 ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
418 ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
419 ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
420 ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
421 ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
422 ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
423 ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
424 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
425 ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
426 ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
427 ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
428 ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
429 ((LINE) == EXTI_LINE44) || ((LINE) == EXTI_LINE46) || \
430 ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
431 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
432 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
433 ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
434 ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
435 ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
436 ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
437 ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
438 ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
439 ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
440 ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
441 ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
442 ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
443 ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
444 ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
445 ((LINE) == EXTI_LINE77) || ((LINE) == EXTI_LINE79) || \
446 ((LINE) == EXTI_LINE84) || ((LINE) == EXTI_LINE85) || \
447 ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87) || \
448 ((LINE) == EXTI_LINE78) || \
449 ((LINE) == EXTI_LINE80) || ((LINE) == EXTI_LINE82))
450#else
451#define IS_EXTI_ALL_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
452 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
453 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
454 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
455 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
456 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
457 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
458 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
459 ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
460 ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
461 ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
462 ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
463 ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
464 ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
465 ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
466 ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
467 ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
468 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
469 ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
470 ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
471 ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
472 ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
473 ((LINE) == EXTI_LINE44) || \
474 ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
475 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
476 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
477 ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
478 ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
479 ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
480 ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
481 ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
482 ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
483 ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
484 ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
485 ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
486 ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
487 ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
488 ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
489 ((LINE) == EXTI_LINE85) || \
490 ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87) || \
491 ((LINE) == EXTI_LINE88) || ((LINE) == EXTI_LINE89) || \
492 ((LINE) == EXTI_LINE90) || ((LINE) == EXTI_LINE91))
493#endif /*DUAL_CORE*/
494
495#if defined(DUAL_CORE)
496#define IS_EXTI_D1_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
497 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
498 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
499 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
500 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
501 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
502 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
503 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
504 ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
505 ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
506 ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
507 ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
508 ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
509 ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
510 ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
511 ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
512 ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
513 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
514 ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
515 ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
516 ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
517 ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
518 ((LINE) == EXTI_LINE44) || ((LINE) == EXTI_LINE46) || \
519 ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
520 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
521 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
522 ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
523 ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
524 ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
525 ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
526 ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
527 ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
528 ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
529 ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
530 ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
531 ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
532 ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
533 ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
534 ((LINE) == EXTI_LINE77) || ((LINE) == EXTI_LINE79) || \
535 ((LINE) == EXTI_LINE84) || ((LINE) == EXTI_LINE85) || \
536 ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87))
537#else
538#define IS_EXTI_D1_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
539 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
540 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
541 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
542 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
543 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
544 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
545 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
546 ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
547 ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
548 ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
549 ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
550 ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
551 ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
552 ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
553 ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
554 ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
555 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
556 ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
557 ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
558 ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
559 ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
560 ((LINE) == EXTI_LINE44) || \
561 ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
562 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
563 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
564 ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
565 ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
566 ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
567 ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
568 ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
569 ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
570 ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
571 ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
572 ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
573 ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
574 ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
575 ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
576 ((LINE) == EXTI_LINE85) || \
577 ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87) || \
578 ((LINE) == EXTI_LINE88) || ((LINE) == EXTI_LINE89) || \
579 ((LINE) == EXTI_LINE90) || ((LINE) == EXTI_LINE91))
580#endif /*DUAL_CORE*/
581
582#if defined(DUAL_CORE)
583#define IS_EXTI_D2_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
584 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
585 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
586 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
587 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
588 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
589 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
590 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
591 ((LINE) == EXTI_LINE16) || ((LINE) == EXTI_LINE17) || \
592 ((LINE) == EXTI_LINE18) || ((LINE) == EXTI_LINE19) || \
593 ((LINE) == EXTI_LINE20) || ((LINE) == EXTI_LINE21) || \
594 ((LINE) == EXTI_LINE22) || ((LINE) == EXTI_LINE23) || \
595 ((LINE) == EXTI_LINE24) || ((LINE) == EXTI_LINE25) || \
596 ((LINE) == EXTI_LINE26) || ((LINE) == EXTI_LINE27) || \
597 ((LINE) == EXTI_LINE28) || ((LINE) == EXTI_LINE29) || \
598 ((LINE) == EXTI_LINE30) || ((LINE) == EXTI_LINE31) || \
599 ((LINE) == EXTI_LINE32) || ((LINE) == EXTI_LINE33) || \
600 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
601 ((LINE) == EXTI_LINE36) || ((LINE) == EXTI_LINE37) || \
602 ((LINE) == EXTI_LINE38) || ((LINE) == EXTI_LINE39) || \
603 ((LINE) == EXTI_LINE40) || ((LINE) == EXTI_LINE41) || \
604 ((LINE) == EXTI_LINE42) || ((LINE) == EXTI_LINE43) || \
605 ((LINE) == EXTI_LINE44) || ((LINE) == EXTI_LINE46) || \
606 ((LINE) == EXTI_LINE47) || ((LINE) == EXTI_LINE48) || \
607 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
608 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
609 ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE54) || \
610 ((LINE) == EXTI_LINE55) || ((LINE) == EXTI_LINE56) || \
611 ((LINE) == EXTI_LINE57) || ((LINE) == EXTI_LINE58) || \
612 ((LINE) == EXTI_LINE59) || ((LINE) == EXTI_LINE60) || \
613 ((LINE) == EXTI_LINE61) || ((LINE) == EXTI_LINE62) || \
614 ((LINE) == EXTI_LINE63) || ((LINE) == EXTI_LINE64) || \
615 ((LINE) == EXTI_LINE65) || ((LINE) == EXTI_LINE66) || \
616 ((LINE) == EXTI_LINE67) || ((LINE) == EXTI_LINE68) || \
617 ((LINE) == EXTI_LINE69) || ((LINE) == EXTI_LINE70) || \
618 ((LINE) == EXTI_LINE71) || ((LINE) == EXTI_LINE72) || \
619 ((LINE) == EXTI_LINE73) || ((LINE) == EXTI_LINE74) || \
620 ((LINE) == EXTI_LINE75) || ((LINE) == EXTI_LINE76) || \
621 ((LINE) == EXTI_LINE78) || ((LINE) == EXTI_LINE80) || \
622 ((LINE) == EXTI_LINE82) || ((LINE) == EXTI_LINE85) || \
623 ((LINE) == EXTI_LINE86) || ((LINE) == EXTI_LINE87))
624#endif /*DUAL_CORE*/
625
626#if defined(DUAL_CORE)
627#define IS_EXTI_D3_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
628 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
629 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
630 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
631 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
632 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
633 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
634 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
635 ((LINE) == EXTI_LINE19) || ((LINE) == EXTI_LINE20) || \
636 ((LINE) == EXTI_LINE21) || ((LINE) == EXTI_LINE25) || \
637 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
638 ((LINE) == EXTI_LINE41) || ((LINE) == EXTI_LINE48) || \
639 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
640 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
641 ((LINE) == EXTI_LINE53))
642#elif (POWER_DOMAINS_NUMBER == 3U)
643#define IS_EXTI_D3_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
644 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
645 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
646 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
647 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
648 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
649 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
650 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
651 ((LINE) == EXTI_LINE19) || ((LINE) == EXTI_LINE20) || \
652 ((LINE) == EXTI_LINE21) || ((LINE) == EXTI_LINE25) || \
653 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
654 ((LINE) == EXTI_LINE41) || ((LINE) == EXTI_LINE48) || \
655 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
656 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE52) || \
657 ((LINE) == EXTI_LINE53) || ((LINE) == EXTI_LINE88))
658#else
659#define IS_EXTI_D3_LINE(LINE) (((LINE) == EXTI_LINE0) || ((LINE) == EXTI_LINE1) || \
660 ((LINE) == EXTI_LINE2) || ((LINE) == EXTI_LINE3) || \
661 ((LINE) == EXTI_LINE4) || ((LINE) == EXTI_LINE5) || \
662 ((LINE) == EXTI_LINE6) || ((LINE) == EXTI_LINE7) || \
663 ((LINE) == EXTI_LINE8) || ((LINE) == EXTI_LINE9) || \
664 ((LINE) == EXTI_LINE10) || ((LINE) == EXTI_LINE11) || \
665 ((LINE) == EXTI_LINE12) || ((LINE) == EXTI_LINE13) || \
666 ((LINE) == EXTI_LINE14) || ((LINE) == EXTI_LINE15) || \
667 ((LINE) == EXTI_LINE19) || ((LINE) == EXTI_LINE20) || \
668 ((LINE) == EXTI_LINE21) || ((LINE) == EXTI_LINE25) || \
669 ((LINE) == EXTI_LINE34) || ((LINE) == EXTI_LINE35) || \
670 ((LINE) == EXTI_LINE41) || ((LINE) == EXTI_LINE48) || \
671 ((LINE) == EXTI_LINE49) || ((LINE) == EXTI_LINE50) || \
672 ((LINE) == EXTI_LINE51) || ((LINE) == EXTI_LINE88))
673#endif /*DUAL_CORE*/
674
675
676#define BDMA_CH6_CLEAR ((uint32_t)0x00000000) /*!< BDMA ch6 event selected as D3 domain pendclear source*/
677#define BDMA_CH7_CLEAR ((uint32_t)0x00000001) /*!< BDMA ch7 event selected as D3 domain pendclear source*/
678#if defined (LPTIM4)
679#define LPTIM4_OUT_CLEAR ((uint32_t)0x00000002) /*!< LPTIM4 out selected as D3 domain pendclear source*/
680#else
681#define LPTIM2_OUT_CLEAR ((uint32_t)0x00000002) /*!< LPTIM2 out selected as D3 domain pendclear source*/
682#endif /* LPTIM4 */
683#if defined (LPTIM5)
684#define LPTIM5_OUT_CLEAR ((uint32_t)0x00000003) /*!< LPTIM5 out selected as D3 domain pendclear source*/
685#else
686#define LPTIM3_OUT_CLEAR ((uint32_t)0x00000003) /*!< LPTIM3 out selected as D3 domain pendclear source*/
687#endif /* LPTIM5 */
688#if defined (LPTIM4) && defined (LPTIM5)
689#define IS_EXTI_D3_CLEAR(SOURCE) (((SOURCE) == BDMA_CH6_CLEAR) || ((SOURCE) == BDMA_CH7_CLEAR) || \
690 ((SOURCE) == LPTIM4_OUT_CLEAR) || ((SOURCE) == LPTIM5_OUT_CLEAR))
691#else
692#define IS_EXTI_D3_CLEAR(SOURCE) (((SOURCE) == BDMA_CH6_CLEAR) || ((SOURCE) == BDMA_CH7_CLEAR) || \
693 ((SOURCE) == LPTIM2_OUT_CLEAR) || ((SOURCE) == LPTIM3_OUT_CLEAR))
694#endif /* LPTIM4 LPTIM5 */
695/**
696 * @}
697 */
698
699
700/** @defgroup FMC_SwapBankMapping_Config SwapBankMapping Config
701 * @{
702 */
703#define FMC_SWAPBMAP_DISABLE (0x00000000U)
704#define FMC_SWAPBMAP_SDRAM_SRAM FMC_BCR1_BMAP_0
705#define FMC_SWAPBMAP_SDRAMB2 FMC_BCR1_BMAP_1
706
707#define IS_FMC_SWAPBMAP_MODE(__MODE__) (((__MODE__) == FMC_SWAPBMAP_DISABLE) || \
708 ((__MODE__) == FMC_SWAPBMAP_SDRAM_SRAM) || \
709 ((__MODE__) == FMC_SWAPBMAP_SDRAMB2))
710/**
711 * @}
712 */
713/**
714 * @}
715 */
716
717/* Exported macro ------------------------------------------------------------*/
718/** @defgroup HAL_Exported_Macros HAL Exported Macros
719 * @{
720 */
721#if defined(DUAL_CORE)
722/** @defgroup ART_Exported_Macros ART Exported Macros
723 * @{
724 */
725
726/** @brief ART Enable Macro.
727 * Enable the Cortex-M4 ART cache.
728 */
729#define __HAL_ART_ENABLE() SET_BIT(ART->CTR, ART_CTR_EN)
730
731/** @brief ART Disable Macro.
732 * Disable the Cortex-M4 ART cache.
733 */
734#define __HAL_ART_DISABLE() CLEAR_BIT(ART->CTR, ART_CTR_EN)
735
736/** @brief ART Cache BaseAddress Config.
737 * Configure the Cortex-M4 ART cache Base Address.
738 */
739#define __HAL_ART_CONFIG_BASE_ADDRESS(__BASE_ADDRESS__) MODIFY_REG(ART->CTR, ART_CTR_PCACHEADDR, (((__BASE_ADDRESS__) >> 12U) & 0x000FFF00UL))
740
741/**
742 * @}
743 */
744#endif /* DUAL_CORE */
745
746/** @defgroup SYSCFG_Exported_Macros SYSCFG Exported Macros
747 * @{
748 */
749
750/** @brief SYSCFG Break AXIRAM double ECC lock.
751 * Enable and lock the connection of AXIRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
752 * @note The selected configuration is locked and can be unlocked only by system reset.
753 This feature is available on STM32H7 rev.B and above.
754 */
755#define __HAL_SYSCFG_BREAK_AXISRAM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_AXISRAML)
756
757/** @brief SYSCFG Break ITCM double ECC lock.
758 * Enable and lock the connection of ITCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
759 * @note The selected configuration is locked and can be unlocked only by system reset.
760 This feature is available on STM32H7 rev.B and above.
761 */
762#define __HAL_SYSCFG_BREAK_ITCM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_ITCML)
763
764/** @brief SYSCFG Break DTCM double ECC lock.
765 * Enable and lock the connection of DTCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
766 * @note The selected configuration is locked and can be unlocked only by system reset.
767 This feature is available on STM32H7 rev.B and above.
768 */
769#define __HAL_SYSCFG_BREAK_DTCM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_DTCML)
770
771/** @brief SYSCFG Break SRAM1 double ECC lock.
772 * Enable and lock the connection of SRAM1 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
773 * @note The selected configuration is locked and can be unlocked only by system reset.
774 This feature is available on STM32H7 rev.B and above.
775 */
776#define __HAL_SYSCFG_BREAK_SRAM1_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM1L)
777
778/** @brief SYSCFG Break SRAM2 double ECC lock.
779 * Enable and lock the connection of SRAM2 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
780 * @note The selected configuration is locked and can be unlocked only by system reset.
781 This feature is available on STM32H7 rev.B and above.
782 */
783#define __HAL_SYSCFG_BREAK_SRAM2_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM2L)
784
785/** @brief SYSCFG Break SRAM3 double ECC lock.
786 * Enable and lock the connection of SRAM3 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
787 * @note The selected configuration is locked and can be unlocked only by system reset.
788 This feature is available on STM32H7 rev.B and above.
789 */
790#define __HAL_SYSCFG_BREAK_SRAM3_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM3L)
791
792/** @brief SYSCFG Break SRAM4 double ECC lock.
793 * Enable and lock the connection of SRAM4 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
794 * @note The selected configuration is locked and can be unlocked only by system reset.
795 This feature is available on STM32H7 rev.B and above.
796 */
797#define __HAL_SYSCFG_BREAK_SRAM4_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_SRAM4L)
798
799/** @brief SYSCFG Break Backup SRAM double ECC lock.
800 * Enable and lock the connection of Backup SRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.
801 * @note The selected configuration is locked and can be unlocked only by system reset.
802 This feature is available on STM32H7 rev.B and above.
803 */
804#define __HAL_SYSCFG_BREAK_BKRAM_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_BKRAML)
805
806/** @brief SYSCFG Break Cortex-M7 Lockup lock.
807 * Enable and lock the connection of Cortex-M7 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input.
808 * @note The selected configuration is locked and can be unlocked only by system reset.
809 This feature is available on STM32H7 rev.B and above.
810 */
811#define __HAL_SYSCFG_BREAK_CM7_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_CM7L)
812
813/** @brief SYSCFG Break FLASH double ECC lock.
814 * Enable and lock the connection of Flash double ECC error connection to TIM1/8/15/16/17 and HRTIMER Break input.
815 * @note The selected configuration is locked and can be unlocked only by system reset.
816 This feature is available on STM32H7 rev.B and above.
817 */
818#define __HAL_SYSCFG_BREAK_FLASH_DBL_ECC_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_FLASHL)
819
820/** @brief SYSCFG Break PVD lock.
821 * Enable and lock the PVD connection to Timer1/8/15/16/17 and HRTIMER Break input, as well as the PVDE and PLS[2:0] in the PWR_CR1 register.
822 * @note The selected configuration is locked and can be unlocked only by system reset.
823 This feature is available on STM32H7 rev.B and above.
824 */
825#define __HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_PVDL)
826
827#if defined(DUAL_CORE)
828/** @brief SYSCFG Break Cortex-M4 Lockup lock.
829 * Enable and lock the connection of Cortex-M4 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input.
830 * @note The selected configuration is locked and can be unlocked only by system reset.
831 This feature is available on STM32H7 rev.B and above.
832 */
833#define __HAL_SYSCFG_BREAK_CM4_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR, SYSCFG_CFGR_CM4L)
834#endif /* DUAL_CORE */
835
836#if !defined(SYSCFG_PMCR_BOOSTEN)
837/** @brief Fast-mode Plus driving capability enable/disable macros
838 * @param __FASTMODEPLUS__ This parameter can be a value of :
839 * @arg @ref SYSCFG_FASTMODEPLUS_PB6 Fast-mode Plus driving capability activation on PB6
840 * @arg @ref SYSCFG_FASTMODEPLUS_PB7 Fast-mode Plus driving capability activation on PB7
841 * @arg @ref SYSCFG_FASTMODEPLUS_PB8 Fast-mode Plus driving capability activation on PB8
842 * @arg @ref SYSCFG_FASTMODEPLUS_PB9 Fast-mode Plus driving capability activation on PB9
843 */
844#define __HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
845 SET_BIT(SYSCFG->PMCR, (__FASTMODEPLUS__));\
846 }while(0)
847
848#define __HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__) do {assert_param(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\
849 CLEAR_BIT(SYSCFG->PMCR, (__FASTMODEPLUS__));\
850 }while(0)
851
852#endif /* !SYSCFG_PMCR_BOOSTEN */
853/**
854 * @}
855 */
856
857/** @defgroup DBG_Exported_Macros DBG Exported Macros
858 * @{
859 */
860
861/** @brief Freeze/Unfreeze Peripherals in Debug mode
862 */
863#define __HAL_DBGMCU_FREEZE_WWDG1() (DBGMCU->APB3FZ1 |= (DBGMCU_APB3FZ1_DBG_WWDG1))
864
865#define __HAL_DBGMCU_FREEZE_TIM2() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM2))
866#define __HAL_DBGMCU_FREEZE_TIM3() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM3))
867#define __HAL_DBGMCU_FREEZE_TIM4() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM4))
868#define __HAL_DBGMCU_FREEZE_TIM5() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM5))
869#define __HAL_DBGMCU_FREEZE_TIM6() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM6))
870#define __HAL_DBGMCU_FREEZE_TIM7() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM7))
871#define __HAL_DBGMCU_FREEZE_TIM12() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM12))
872#define __HAL_DBGMCU_FREEZE_TIM13() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM13))
873#define __HAL_DBGMCU_FREEZE_TIM14() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_TIM14))
874#define __HAL_DBGMCU_FREEZE_LPTIM1() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_LPTIM1))
875#define __HAL_DBGMCU_FREEZE_I2C1() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C1))
876#define __HAL_DBGMCU_FREEZE_I2C2() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C2))
877#define __HAL_DBGMCU_FREEZE_I2C3() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C3))
878#if defined(I2C5)
879#define __HAL_DBGMCU_FREEZE_I2C5() (DBGMCU->APB1LFZ1 |= (DBGMCU_APB1LFZ1_DBG_I2C5))
880#endif /*I2C5*/
881#if defined(DBGMCU_APB1HFZ1_DBG_FDCAN)
882#define __HAL_DBGMCU_FREEZE_FDCAN() (DBGMCU->APB1HFZ1 |= (DBGMCU_APB1HFZ1_DBG_FDCAN))
883#endif /*DBGMCU_APB1HFZ1_DBG_FDCAN*/
884
885#if defined(TIM23)
886#define __HAL_DBGMCU_FREEZE_TIM23() (DBGMCU->APB1HFZ1 |= (DBGMCU_APB1HFZ1_DBG_TIM23))
887#endif /*TIM23*/
888#if defined(TIM24)
889#define __HAL_DBGMCU_FREEZE_TIM24() (DBGMCU->APB1HFZ1 |= (DBGMCU_APB1HFZ1_DBG_TIM24))
890#endif /*TIM24*/
891
892#define __HAL_DBGMCU_FREEZE_TIM1() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM1))
893#define __HAL_DBGMCU_FREEZE_TIM8() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM8))
894#define __HAL_DBGMCU_FREEZE_TIM15() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM15))
895#define __HAL_DBGMCU_FREEZE_TIM16() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM16))
896#define __HAL_DBGMCU_FREEZE_TIM17() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_TIM17))
897#define __HAL_DBGMCU_FREEZE_HRTIM() (DBGMCU->APB2FZ1 |= (DBGMCU_APB2FZ1_DBG_HRTIM))
898
899#define __HAL_DBGMCU_FREEZE_I2C4() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_I2C4))
900#define __HAL_DBGMCU_FREEZE_LPTIM2() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM2))
901#define __HAL_DBGMCU_FREEZE_LPTIM3() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM3))
902#define __HAL_DBGMCU_FREEZE_LPTIM4() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM4))
903#define __HAL_DBGMCU_FREEZE_LPTIM5() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_LPTIM5))
904#define __HAL_DBGMCU_FREEZE_RTC() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_RTC))
905#define __HAL_DBGMCU_FREEZE_IWDG1() (DBGMCU->APB4FZ1 |= (DBGMCU_APB4FZ1_DBG_IWDG1))
906
907
908#define __HAL_DBGMCU_UnFreeze_WWDG1() (DBGMCU->APB3FZ1 &= ~ (DBGMCU_APB3FZ1_DBG_WWDG1))
909
910#define __HAL_DBGMCU_UnFreeze_TIM2() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM2))
911#define __HAL_DBGMCU_UnFreeze_TIM3() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM3))
912#define __HAL_DBGMCU_UnFreeze_TIM4() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM4))
913#define __HAL_DBGMCU_UnFreeze_TIM5() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM5))
914#define __HAL_DBGMCU_UnFreeze_TIM6() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM6))
915#define __HAL_DBGMCU_UnFreeze_TIM7() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM7))
916#define __HAL_DBGMCU_UnFreeze_TIM12() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM12))
917#define __HAL_DBGMCU_UnFreeze_TIM13() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM13))
918#define __HAL_DBGMCU_UnFreeze_TIM14() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_TIM14))
919#define __HAL_DBGMCU_UnFreeze_LPTIM1() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_LPTIM1))
920#define __HAL_DBGMCU_UnFreeze_I2C1() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C1))
921#define __HAL_DBGMCU_UnFreeze_I2C2() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C2))
922#define __HAL_DBGMCU_UnFreeze_I2C3() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C3))
923#if defined(I2C5)
924#define __HAL_DBGMCU_UnFreeze_I2C5() (DBGMCU->APB1LFZ1 &= ~ (DBGMCU_APB1LFZ1_DBG_I2C5))
925#endif /*I2C5*/
926#if defined(DBGMCU_APB1HFZ1_DBG_FDCAN)
927#define __HAL_DBGMCU_UnFreeze_FDCAN() (DBGMCU->APB1HFZ1 &= ~ (DBGMCU_APB1HFZ1_DBG_FDCAN))
928#endif /*DBGMCU_APB1HFZ1_DBG_FDCAN*/
929
930#if defined(TIM23)
931#define __HAL_DBGMCU_UnFreeze_TIM23() (DBGMCU->APB1HFZ1 &= ~ (DBGMCU_APB1HFZ1_DBG_TIM23))
932#endif /*TIM23*/
933#if defined(TIM24)
934#define __HAL_DBGMCU_UnFreeze_TIM24() (DBGMCU->APB1HFZ1 &= ~ (DBGMCU_APB1HFZ1_DBG_TIM24))
935#endif /*TIM24*/
936
937#define __HAL_DBGMCU_UnFreeze_TIM1() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM1))
938#define __HAL_DBGMCU_UnFreeze_TIM8() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM8))
939#define __HAL_DBGMCU_UnFreeze_TIM15() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM15))
940#define __HAL_DBGMCU_UnFreeze_TIM16() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM16))
941#define __HAL_DBGMCU_UnFreeze_TIM17() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_TIM17))
942#define __HAL_DBGMCU_UnFreeze_HRTIM() (DBGMCU->APB2FZ1 &= ~ (DBGMCU_APB2FZ1_DBG_HRTIM))
943
944#define __HAL_DBGMCU_UnFreeze_I2C4() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_I2C4))
945#define __HAL_DBGMCU_UnFreeze_LPTIM2() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM2))
946#define __HAL_DBGMCU_UnFreeze_LPTIM3() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM3))
947#define __HAL_DBGMCU_UnFreeze_LPTIM4() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM4))
948#define __HAL_DBGMCU_UnFreeze_LPTIM5() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_LPTIM5))
949#define __HAL_DBGMCU_UnFreeze_RTC() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_RTC))
950#define __HAL_DBGMCU_UnFreeze_IWDG1() (DBGMCU->APB4FZ1 &= ~ (DBGMCU_APB4FZ1_DBG_IWDG1))
951
952
953#if defined(DUAL_CORE)
954#define __HAL_DBGMCU_FREEZE2_IWDG2() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_IWDG2))
955#define __HAL_DBGMCU_FREEZE2_WWDG2() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_WWDG2))
956
957#define __HAL_DBGMCU_UnFreeze2_IWDG2() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_IWDG2))
958#define __HAL_DBGMCU_UnFreeze2_WWDG2() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_WWDG2))
959
960
961#define __HAL_DBGMCU_FREEZE2_WWDG1() (DBGMCU->APB3FZ2 |= (DBGMCU_APB3FZ2_DBG_WWDG1))
962
963#define __HAL_DBGMCU_FREEZE2_TIM2() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM2))
964#define __HAL_DBGMCU_FREEZE2_TIM3() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM3))
965#define __HAL_DBGMCU_FREEZE2_TIM4() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM4))
966#define __HAL_DBGMCU_FREEZE2_TIM5() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM5))
967#define __HAL_DBGMCU_FREEZE2_TIM6() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM6))
968#define __HAL_DBGMCU_FREEZE2_TIM7() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM7))
969#define __HAL_DBGMCU_FREEZE2_TIM12() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM12))
970#define __HAL_DBGMCU_FREEZE2_TIM13() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM13))
971#define __HAL_DBGMCU_FREEZE2_TIM14() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_TIM14))
972#define __HAL_DBGMCU_FREEZE2_LPTIM1() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_LPTIM1))
973#define __HAL_DBGMCU_FREEZE2_I2C1() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_I2C1))
974#define __HAL_DBGMCU_FREEZE2_I2C2() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_I2C2))
975#define __HAL_DBGMCU_FREEZE2_I2C3() (DBGMCU->APB1LFZ2 |= (DBGMCU_APB1LFZ2_DBG_I2C3))
976#define __HAL_DBGMCU_FREEZE2_FDCAN() (DBGMCU->APB1HFZ2 |= (DBGMCU_APB1HFZ2_DBG_FDCAN))
977
978
979#define __HAL_DBGMCU_FREEZE2_TIM1() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM1))
980#define __HAL_DBGMCU_FREEZE2_TIM8() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM8))
981#define __HAL_DBGMCU_FREEZE2_TIM15() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM15))
982#define __HAL_DBGMCU_FREEZE2_TIM16() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM16))
983#define __HAL_DBGMCU_FREEZE2_TIM17() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_TIM17))
984#define __HAL_DBGMCU_FREEZE2_HRTIM() (DBGMCU->APB2FZ2 |= (DBGMCU_APB2FZ2_DBG_HRTIM))
985
986#define __HAL_DBGMCU_FREEZE2_I2C4() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_I2C4))
987#define __HAL_DBGMCU_FREEZE2_LPTIM2() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_LPTIM2))
988#define __HAL_DBGMCU_FREEZE2_LPTIM3() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_LPTIM3))
989#define __HAL_DBGMCU_FREEZE2_LPTIM4() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_LPTIM4))
990#define __HAL_DBGMCU_FREEZE2_LPTIM5() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_LPTIM5))
991#define __HAL_DBGMCU_FREEZE2_RTC() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_RTC))
992#define __HAL_DBGMCU_FREEZE2_IWDG1() (DBGMCU->APB4FZ2 |= (DBGMCU_APB4FZ2_DBG_IWDG1))
993
994#define __HAL_DBGMCU_UnFreeze2_WWDG1() (DBGMCU->APB3FZ2 &= ~ (DBGMCU_APB3FZ2_DBG_WWDG1))
995
996#define __HAL_DBGMCU_UnFreeze2_TIM2() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM2))
997#define __HAL_DBGMCU_UnFreeze2_TIM3() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM3))
998#define __HAL_DBGMCU_UnFreeze2_TIM4() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM4))
999#define __HAL_DBGMCU_UnFreeze2_TIM5() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM5))
1000#define __HAL_DBGMCU_UnFreeze2_TIM6() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM6))
1001#define __HAL_DBGMCU_UnFreeze2_TIM7() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM7))
1002#define __HAL_DBGMCU_UnFreeze2_TIM12() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM12))
1003#define __HAL_DBGMCU_UnFreeze2_TIM13() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM13))
1004#define __HAL_DBGMCU_UnFreeze2_TIM14() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_TIM14))
1005#define __HAL_DBGMCU_UnFreeze2_LPTIM1() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_LPTIM1))
1006#define __HAL_DBGMCU_UnFreeze2_I2C1() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_I2C1))
1007#define __HAL_DBGMCU_UnFreeze2_I2C2() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_I2C2))
1008#define __HAL_DBGMCU_UnFreeze2_I2C3() (DBGMCU->APB1LFZ2 &= ~ (DBGMCU_APB1LFZ2_DBG_I2C3))
1009#define __HAL_DBGMCU_UnFreeze2_FDCAN() (DBGMCU->APB1HFZ2 &= ~ (DBGMCU_APB1HFZ2_DBG_FDCAN))
1010
1011
1012#define __HAL_DBGMCU_UnFreeze2_TIM1() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM1))
1013#define __HAL_DBGMCU_UnFreeze2_TIM8() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM8))
1014#define __HAL_DBGMCU_UnFreeze2_TIM15() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM15))
1015#define __HAL_DBGMCU_UnFreeze2_TIM16() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM16))
1016#define __HAL_DBGMCU_UnFreeze2_TIM17() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_TIM17))
1017#define __HAL_DBGMCU_UnFreeze2_HRTIM() (DBGMCU->APB2FZ2 &= ~ (DBGMCU_APB2FZ2_DBG_HRTIM))
1018
1019#define __HAL_DBGMCU_UnFreeze2_I2C4() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_I2C4))
1020#define __HAL_DBGMCU_UnFreeze2_LPTIM2() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_LPTIM2))
1021#define __HAL_DBGMCU_UnFreeze2_LPTIM3() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_LPTIM3))
1022#define __HAL_DBGMCU_UnFreeze2_LPTIM4() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_LPTIM4))
1023#define __HAL_DBGMCU_UnFreeze2_LPTIM5() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_LPTIM5))
1024#define __HAL_DBGMCU_UnFreeze2_RTC() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_RTC))
1025#define __HAL_DBGMCU_UnFreeze2_IWDG1() (DBGMCU->APB4FZ2 &= ~ (DBGMCU_APB4FZ2_DBG_IWDG1))
1026
1027#endif /*DUAL_CORE*/
1028/**
1029 * @}
1030 */
1031/**
1032 * @}
1033 */
1034
1035/** @defgroup HAL_Private_Macros HAL Private Macros
1036 * @{
1037 */
1038#define IS_TICKFREQ(FREQ) (((FREQ) == HAL_TICK_FREQ_10HZ) || \
1039 ((FREQ) == HAL_TICK_FREQ_100HZ) || \
1040 ((FREQ) == HAL_TICK_FREQ_1KHZ))
1041/**
1042 * @}
1043 */
1044
1045/* Exported variables --------------------------------------------------------*/
1046
1047/** @addtogroup HAL_Exported_Variables
1048 * @{
1049 */
1050extern __IO uint32_t uwTick;
1051extern uint32_t uwTickPrio;
1052extern HAL_TickFreqTypeDef uwTickFreq;
1053/**
1054 * @}
1055 */
1056
1057/* Exported functions --------------------------------------------------------*/
1058/** @defgroup HAL_Exported_Functions HAL Exported Functions
1059 * @{
1060 */
1061/* Initialization and de-initialization functions ******************************/
1062/** @defgroup HAL_Group1 Initialization and de-initialization Functions
1063 * @{
1064 */
1065HAL_StatusTypeDef HAL_Init(void);
1066HAL_StatusTypeDef HAL_DeInit(void);
1067void HAL_MspInit(void);
1068void HAL_MspDeInit(void);
1069HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
1070
1071/**
1072 * @}
1073 */
1074
1075/* Peripheral Control functions ************************************************/
1076/** @defgroup HAL_Group2 HAL Control functions
1077 *
1078 */
1079void HAL_IncTick(void);
1080void HAL_Delay(uint32_t Delay);
1081uint32_t HAL_GetTick(void);
1082uint32_t HAL_GetTickPrio(void);
1083HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq);
1084HAL_TickFreqTypeDef HAL_GetTickFreq(void);
1085void HAL_SuspendTick(void);
1086void HAL_ResumeTick(void);
1087uint32_t HAL_GetHalVersion(void);
1088uint32_t HAL_GetREVID(void);
1089uint32_t HAL_GetDEVID(void);
1090uint32_t HAL_GetUIDw0(void);
1091uint32_t HAL_GetUIDw1(void);
1092uint32_t HAL_GetUIDw2(void);
1093#if defined(SYSCFG_PMCR_EPIS_SEL)
1094void HAL_SYSCFG_ETHInterfaceSelect(uint32_t SYSCFG_ETHInterface);
1095#endif /* SYSCFG_PMCR_EPIS_SEL */
1096void HAL_SYSCFG_AnalogSwitchConfig(uint32_t SYSCFG_AnalogSwitch , uint32_t SYSCFG_SwitchState );
1097#if defined(SYSCFG_PMCR_BOOSTEN)
1098void HAL_SYSCFG_EnableBOOST(void);
1099void HAL_SYSCFG_DisableBOOST(void);
1100#endif /* SYSCFG_PMCR_BOOSTEN */
1101
1102#if defined (SYSCFG_UR2_BOOT_ADD0) || defined (SYSCFG_UR2_BCM7_ADD0)
1103void HAL_SYSCFG_CM7BootAddConfig(uint32_t BootRegister, uint32_t BootAddress);
1104#endif /* SYSCFG_UR2_BOOT_ADD0 || SYSCFG_UR2_BCM7_ADD0*/
1105
1106#if defined(DUAL_CORE)
1107void HAL_SYSCFG_CM4BootAddConfig(uint32_t BootRegister, uint32_t BootAddress);
1108void HAL_SYSCFG_EnableCM7BOOT(void);
1109void HAL_SYSCFG_DisableCM7BOOT(void);
1110void HAL_SYSCFG_EnableCM4BOOT(void);
1111void HAL_SYSCFG_DisableCM4BOOT(void);
1112#endif /*DUAL_CORE*/
1113void HAL_EnableCompensationCell(void);
1114void HAL_DisableCompensationCell(void);
1115void HAL_SYSCFG_EnableIOSpeedOptimize(void);
1116void HAL_SYSCFG_DisableIOSpeedOptimize(void);
1117void HAL_SYSCFG_CompensationCodeSelect(uint32_t SYSCFG_CompCode);
1118void HAL_SYSCFG_CompensationCodeConfig(uint32_t SYSCFG_PMOSCode, uint32_t SYSCFG_NMOSCode);
1119#if defined(SYSCFG_CCCR_NCC_MMC)
1120void HAL_SYSCFG_VDDMMC_CompensationCodeConfig(uint32_t SYSCFG_PMOSCode, uint32_t SYSCFG_NMOSCode);
1121#endif /* SYSCFG_CCCR_NCC_MMC */
1122void HAL_DBGMCU_EnableDBGSleepMode(void);
1123void HAL_DBGMCU_DisableDBGSleepMode(void);
1124void HAL_DBGMCU_EnableDBGStopMode(void);
1125void HAL_DBGMCU_DisableDBGStopMode(void);
1126void HAL_DBGMCU_EnableDBGStandbyMode(void);
1127void HAL_DBGMCU_DisableDBGStandbyMode(void);
1128#if defined(DUAL_CORE)
1129void HAL_EnableDomain2DBGSleepMode(void);
1130void HAL_DisableDomain2DBGSleepMode(void);
1131void HAL_EnableDomain2DBGStopMode(void);
1132void HAL_DisableDomain2DBGStopMode(void);
1133void HAL_EnableDomain2DBGStandbyMode(void);
1134void HAL_DisableDomain2DBGStandbyMode(void);
1135#endif /*DUAL_CORE*/
1136#if defined(DBGMCU_CR_DBG_STOPD3)
1137void HAL_EnableDomain3DBGStopMode(void);
1138void HAL_DisableDomain3DBGStopMode(void);
1139#endif /*DBGMCU_CR_DBG_STOPD3*/
1140#if defined(DBGMCU_CR_DBG_STANDBYD3)
1141void HAL_EnableDomain3DBGStandbyMode(void);
1142void HAL_DisableDomain3DBGStandbyMode(void);
1143#endif /*DBGMCU_CR_DBG_STANDBYD3*/
1144void HAL_EXTI_EdgeConfig(uint32_t EXTI_Line , uint32_t EXTI_Edge );
1145void HAL_EXTI_GenerateSWInterrupt(uint32_t EXTI_Line);
1146#if defined(DUAL_CORE)
1147void HAL_EXTI_D2_ClearFlag(uint32_t EXTI_Line);
1148#endif /*DUAL_CORE*/
1149void HAL_EXTI_D1_ClearFlag(uint32_t EXTI_Line);
1150void HAL_EXTI_D1_EventInputConfig(uint32_t EXTI_Line , uint32_t EXTI_Mode, uint32_t EXTI_LineCmd);
1151#if defined(DUAL_CORE)
1152void HAL_EXTI_D2_EventInputConfig(uint32_t EXTI_Line , uint32_t EXTI_Mode, uint32_t EXTI_LineCmd);
1153#endif /*DUAL_CORE*/
1154void HAL_EXTI_D3_EventInputConfig(uint32_t EXTI_Line, uint32_t EXTI_LineCmd , uint32_t EXTI_ClearSrc);
1155void HAL_SetFMCMemorySwappingConfig(uint32_t BankMapConfig);
1156uint32_t HAL_GetFMCMemorySwappingConfig(void);
1157void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling);
1158void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode);
1159void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue);
1160HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void);
1161void HAL_SYSCFG_DisableVREFBUF(void);
1162#if defined(SYSCFG_ADC2ALT_ADC2_ROUT0)
1163void HAL_SYSCFG_ADC2ALT_Rout0Config(uint32_t Adc2AltRout0);
1164#endif /*SYSCFG_ADC2ALT_ADC2_ROUT0*/
1165#if defined(SYSCFG_ADC2ALT_ADC2_ROUT1)
1166void HAL_SYSCFG_ADC2ALT_Rout1Config(uint32_t Adc2AltRout1);
1167#endif /*SYSCFG_ADC2ALT_ADC2_ROUT1*/
1168
1169/**
1170 * @}
1171 */
1172
1173/**
1174 * @}
1175 */
1176
1177/**
1178 * @}
1179 */
1180
1181/**
1182 * @}
1183 */
1184
1185#ifdef __cplusplus
1186}
1187#endif
1188
1189#endif /* STM32H7xx_HAL_H */
1190
1191
__IO
#define __IO
Defines 'read / write' permissions.
Definition core_armv81mml.h:290
HAL_EXTI_D3_EventInputConfig
void HAL_EXTI_D3_EventInputConfig(uint32_t EXTI_Line, uint32_t EXTI_LineCmd, uint32_t EXTI_ClearSrc)
Configure the EXTI input event line for Domain D3.
Definition stm32h7xx_hal.c:1264
HAL_SYSCFG_CompensationCodeSelect
void HAL_SYSCFG_CompensationCodeSelect(uint32_t SYSCFG_CompCode)
Code selection for the I/O Compensation cell.
Definition stm32h7xx_hal.c:833
HAL_EnableCompensationCell
void HAL_EnableCompensationCell(void)
Enables the I/O Compensation Cell.
Definition stm32h7xx_hal.c:776
HAL_ResumeTick
void HAL_ResumeTick(void)
Resume Tick increment.
Definition stm32h7xx_hal_timebase_tim.c:126
HAL_SYSCFG_DisableVREFBUF
void HAL_SYSCFG_DisableVREFBUF(void)
Disable the Internal Voltage Reference buffer (VREFBUF).
Definition stm32h7xx_hal.c:587
HAL_DBGMCU_EnableDBGStandbyMode
void HAL_DBGMCU_EnableDBGStandbyMode(void)
Enable the Debug Module during Domain1/CDomain STANDBY mode.
Definition stm32h7xx_hal.c:949
HAL_SetFMCMemorySwappingConfig
void HAL_SetFMCMemorySwappingConfig(uint32_t BankMapConfig)
Set the FMC Memory Mapping Swapping config.
Definition stm32h7xx_hal.c:1065
HAL_DBGMCU_DisableDBGStopMode
void HAL_DBGMCU_DisableDBGStopMode(void)
Disable the Debug Module during Domain1/CDomain STOP mode.
Definition stm32h7xx_hal.c:940
HAL_SYSCFG_EnableVREFBUF
HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void)
Enable the Internal Voltage Reference buffer (VREFBUF).
Definition stm32h7xx_hal.c:561
HAL_SetTickFreq
HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq)
Set new tick Freq.
Definition stm32h7xx_hal.c:356
HAL_GetUIDw1
uint32_t HAL_GetUIDw1(void)
Return the second word of the unique device identifier (UID based on 96 bits).
Definition stm32h7xx_hal.c:493
HAL_GetUIDw2
uint32_t HAL_GetUIDw2(void)
Return the third word of the unique device identifier (UID based on 96 bits).
Definition stm32h7xx_hal.c:502
HAL_DisableCompensationCell
void HAL_DisableCompensationCell(void)
Power-down the I/O Compensation Cell.
Definition stm32h7xx_hal.c:787
HAL_SYSCFG_VREFBUF_VoltageScalingConfig
void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling)
Configure the internal voltage reference buffer voltage scale.
Definition stm32h7xx_hal.c:521
HAL_SYSCFG_VREFBUF_HighImpedanceConfig
void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode)
Configure the internal voltage reference buffer high impedance mode.
Definition stm32h7xx_hal.c:537
HAL_SYSCFG_DisableIOSpeedOptimize
void HAL_SYSCFG_DisableIOSpeedOptimize(void)
To Disable optimize the I/O speed when the product voltage is low.
Definition stm32h7xx_hal.c:816
HAL_DBGMCU_DisableDBGStandbyMode
void HAL_DBGMCU_DisableDBGStandbyMode(void)
Disable the Debug Module during Domain1/CDomain STANDBY mode.
Definition stm32h7xx_hal.c:958
HAL_GetTickFreq
HAL_TickFreqTypeDef HAL_GetTickFreq(void)
Return tick frequency.
Definition stm32h7xx_hal.c:389
HAL_IncTick
void HAL_IncTick(void)
This function is called to increment a global variable "uwTick" used as application time base.
Definition stm32h7xx_hal.c:327
HAL_EXTI_D1_ClearFlag
void HAL_EXTI_D1_ClearFlag(uint32_t EXTI_Line)
Clears the EXTI's line pending flags for Domain D1.
Definition stm32h7xx_hal.c:1135
HAL_SuspendTick
void HAL_SuspendTick(void)
Suspend Tick increment.
Definition stm32h7xx_hal_timebase_tim.c:114
HAL_EXTI_GenerateSWInterrupt
void HAL_EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
Generates a Software interrupt on selected EXTI line.
Definition stm32h7xx_hal.c:1120
HAL_EXTI_EdgeConfig
void HAL_EXTI_EdgeConfig(uint32_t EXTI_Line, uint32_t EXTI_Edge)
Configure the EXTI input event line edge.
Definition stm32h7xx_hal.c:1094
HAL_GetFMCMemorySwappingConfig
uint32_t HAL_GetFMCMemorySwappingConfig(void)
Get FMC Bank mapping mode.
Definition stm32h7xx_hal.c:1077
HAL_DBGMCU_DisableDBGSleepMode
void HAL_DBGMCU_DisableDBGSleepMode(void)
Disable the Debug Module during Domain1/CDomain SLEEP mode.
Definition stm32h7xx_hal.c:921
HAL_GetTickPrio
uint32_t HAL_GetTickPrio(void)
This function returns a tick priority.
Definition stm32h7xx_hal.c:347
HAL_SYSCFG_CompensationCodeConfig
void HAL_SYSCFG_CompensationCodeConfig(uint32_t SYSCFG_PMOSCode, uint32_t SYSCFG_NMOSCode)
Code selection for the I/O Compensation cell.
Definition stm32h7xx_hal.c:850
HAL_DBGMCU_EnableDBGStopMode
void HAL_DBGMCU_EnableDBGStopMode(void)
Enable the Debug Module during Domain1/CDomain STOP mode.
Definition stm32h7xx_hal.c:931
HAL_SYSCFG_VREFBUF_TrimmingConfig
void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue)
Tune the Internal Voltage Reference buffer (VREFBUF).
Definition stm32h7xx_hal.c:549
HAL_GetREVID
uint32_t HAL_GetREVID(void)
Returns the device revision identifier.
Definition stm32h7xx_hal.c:466
HAL_Delay
void HAL_Delay(uint32_t Delay)
This function provides minimum delay (in milliseconds) based on variable incremented.
Definition stm32h7xx_hal.c:405
HAL_DBGMCU_EnableDBGSleepMode
void HAL_DBGMCU_EnableDBGSleepMode(void)
Enable the Debug Module during Domain1/CDomain SLEEP mode.
Definition stm32h7xx_hal.c:912
HAL_GetTick
uint32_t HAL_GetTick(void)
Provides a tick value in millisecond.
Definition stm32h7xx_hal.c:338
HAL_SYSCFG_AnalogSwitchConfig
void HAL_SYSCFG_AnalogSwitchConfig(uint32_t SYSCFG_AnalogSwitch, uint32_t SYSCFG_SwitchState)
Analog Switch control for dual analog pads.
Definition stm32h7xx_hal.c:631
HAL_SYSCFG_EnableIOSpeedOptimize
void HAL_SYSCFG_EnableIOSpeedOptimize(void)
To Enable optimize the I/O speed when the product voltage is low.
Definition stm32h7xx_hal.c:800
HAL_GetUIDw0
uint32_t HAL_GetUIDw0(void)
Return the first word of the unique device identifier (UID based on 96 bits).
Definition stm32h7xx_hal.c:484
HAL_GetHalVersion
uint32_t HAL_GetHalVersion(void)
Returns the HAL revision.
Definition stm32h7xx_hal.c:457
HAL_EXTI_D1_EventInputConfig
void HAL_EXTI_D1_EventInputConfig(uint32_t EXTI_Line, uint32_t EXTI_Mode, uint32_t EXTI_LineCmd)
Configure the EXTI input event line for Domain D1.
Definition stm32h7xx_hal.c:1170
HAL_GetDEVID
uint32_t HAL_GetDEVID(void)
Returns the device identifier.
Definition stm32h7xx_hal.c:475
uwTickPrio
uint32_t uwTickPrio
Definition stm32h7xx_hal.c:72
uwTickFreq
HAL_TickFreqTypeDef uwTickFreq
Definition stm32h7xx_hal.c:73
uwTick
__IO uint32_t uwTick
Definition stm32h7xx_hal.c:71
HAL_InitTick
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
This function configures the source of the time base.
Definition stm32h7xx_hal.c:262
HAL_DeInit
HAL_StatusTypeDef HAL_DeInit(void)
This function de-Initializes common part of the HAL and stops the systick.
Definition stm32h7xx_hal.c:187
HAL_MspDeInit
void HAL_MspDeInit(void)
DeInitializes the MSP.
Definition stm32h7xx_hal.c:239
HAL_MspInit
void HAL_MspInit(void)
Initializes the MSP.
Definition stm32h7xx_hal.c:228
HAL_Init
HAL_StatusTypeDef HAL_Init(void)
This function is used to initialize the HAL Library; it must be the first instruction to be executed ...
Definition stm32h7xx_hal.c:134
HAL_TickFreqTypeDef
HAL_TickFreqTypeDef
Definition stm32h7xx_hal.h:44
HAL_TICK_FREQ_DEFAULT
@ HAL_TICK_FREQ_DEFAULT
Definition stm32h7xx_hal.h:48
HAL_TICK_FREQ_1KHZ
@ HAL_TICK_FREQ_1KHZ
Definition stm32h7xx_hal.h:47
HAL_TICK_FREQ_10HZ
@ HAL_TICK_FREQ_10HZ
Definition stm32h7xx_hal.h:45
HAL_TICK_FREQ_100HZ
@ HAL_TICK_FREQ_100HZ
Definition stm32h7xx_hal.h:46
stm32h7xx_hal_conf.h
HAL configuration file.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition stm32h7xx_hal_def.h:40