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stm32h7xx_hal_dma_ex.h
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1/**
2 ******************************************************************************
3 * @file stm32h7xx_hal_dma_ex.h
4 * @author MCD Application Team
5 * @brief Header file of DMA HAL extension module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_DMA_EX_H
21#define STM32H7xx_HAL_DMA_EX_H
22
23#ifdef __cplusplus
24 extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
30/** @addtogroup STM32H7xx_HAL_Driver
31 * @{
32 */
33
34/** @addtogroup DMAEx
35 * @{
36 */
37
38/* Exported types ------------------------------------------------------------*/
39/** @defgroup DMAEx_Exported_Types DMAEx Exported Types
40 * @brief DMAEx Exported types
41 * @{
42 */
43
44/**
45 * @brief HAL DMA Memory definition
46 */
47typedef enum
48{
49 MEMORY0 = 0x00U, /*!< Memory 0 */
50 MEMORY1 = 0x01U, /*!< Memory 1 */
51
53
54/**
55 * @brief HAL DMAMUX Synchronization configuration structure definition
56 */
57typedef struct
58{
59 uint32_t SyncSignalID; /*!< Specifies the synchronization signal gating the DMA request in periodic mode.
60 This parameter can be a value of @ref DMAEx_MUX_SyncSignalID_selection */
61
62 uint32_t SyncPolarity; /*!< Specifies the polarity of the signal on which the DMA request is synchronized.
63 This parameter can be a value of @ref DMAEx_MUX_SyncPolarity_selection */
64
65 FunctionalState SyncEnable; /*!< Specifies if the synchronization shall be enabled or disabled
66 This parameter can take the value ENABLE or DISABLE*/
67
68
69 FunctionalState EventEnable; /*!< Specifies if an event shall be generated once the RequestNumber is reached.
70 This parameter can take the value ENABLE or DISABLE */
71
72 uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be authorized after a sync event.
73 This parameters can be in the range 1 to 32 */
74
76
77
78/**
79 * @brief HAL DMAMUX request generator parameters structure definition
80 */
81typedef struct
82{
83 uint32_t SignalID; /*!< Specifies the ID of the signal used for DMAMUX request generator
84 This parameter can be a value of @ref DMAEx_MUX_SignalGeneratorID_selection */
85
86 uint32_t Polarity; /*!< Specifies the polarity of the signal on which the request is generated.
87 This parameter can be a value of @ref DMAEx_MUX_RequestGeneneratorPolarity_selection */
88
89 uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be generated after a signal event.
90 This parameters can be in the range 1 to 32 */
91
93
94/**
95 * @}
96 */
97
98/* Exported constants --------------------------------------------------------*/
99
100/** @defgroup DMAEx_Exported_Constants DMA Exported Constants
101 * @brief DMAEx Exported constants
102 * @{
103 */
104
105/** @defgroup DMAEx_MUX_SyncSignalID_selection DMAEx MUX SyncSignalID selection
106 * @brief DMAEx MUX SyncSignalID selection
107 * @{
108 */
109#define HAL_DMAMUX1_SYNC_DMAMUX1_CH0_EVT 0U /*!< DMAMUX1 synchronization Signal is DMAMUX1 Channel0 Event */
110#define HAL_DMAMUX1_SYNC_DMAMUX1_CH1_EVT 1U /*!< DMAMUX1 synchronization Signal is DMAMUX1 Channel1 Event */
111#define HAL_DMAMUX1_SYNC_DMAMUX1_CH2_EVT 2U /*!< DMAMUX1 synchronization Signal is DMAMUX1 Channel2 Event */
112#define HAL_DMAMUX1_SYNC_LPTIM1_OUT 3U /*!< DMAMUX1 synchronization Signal is LPTIM1 OUT */
113#define HAL_DMAMUX1_SYNC_LPTIM2_OUT 4U /*!< DMAMUX1 synchronization Signal is LPTIM2 OUT */
114#define HAL_DMAMUX1_SYNC_LPTIM3_OUT 5U /*!< DMAMUX1 synchronization Signal is LPTIM3 OUT */
115#define HAL_DMAMUX1_SYNC_EXTI0 6U /*!< DMAMUX1 synchronization Signal is EXTI0 IT */
116#define HAL_DMAMUX1_SYNC_TIM12_TRGO 7U /*!< DMAMUX1 synchronization Signal is TIM12 TRGO */
117
118#define HAL_DMAMUX2_SYNC_DMAMUX2_CH0_EVT 0U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel0 Event */
119#define HAL_DMAMUX2_SYNC_DMAMUX2_CH1_EVT 1U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel1 Event */
120#define HAL_DMAMUX2_SYNC_DMAMUX2_CH2_EVT 2U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel2 Event */
121#define HAL_DMAMUX2_SYNC_DMAMUX2_CH3_EVT 3U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel3 Event */
122#define HAL_DMAMUX2_SYNC_DMAMUX2_CH4_EVT 4U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel4 Event */
123#define HAL_DMAMUX2_SYNC_DMAMUX2_CH5_EVT 5U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel5 Event */
124#define HAL_DMAMUX2_SYNC_LPUART1_RX_WKUP 6U /*!< DMAMUX2 synchronization Signal is LPUART1 RX Wakeup */
125#define HAL_DMAMUX2_SYNC_LPUART1_TX_WKUP 7U /*!< DMAMUX2 synchronization Signal is LPUART1 TX Wakeup */
126#define HAL_DMAMUX2_SYNC_LPTIM2_OUT 8U /*!< DMAMUX2 synchronization Signal is LPTIM2 output */
127#define HAL_DMAMUX2_SYNC_LPTIM3_OUT 9U /*!< DMAMUX2 synchronization Signal is LPTIM3 output */
128#define HAL_DMAMUX2_SYNC_I2C4_WKUP 10U /*!< DMAMUX2 synchronization Signal is I2C4 Wakeup */
129#define HAL_DMAMUX2_SYNC_SPI6_WKUP 11U /*!< DMAMUX2 synchronization Signal is SPI6 Wakeup */
130#define HAL_DMAMUX2_SYNC_COMP1_OUT 12U /*!< DMAMUX2 synchronization Signal is Comparator 1 output */
131#define HAL_DMAMUX2_SYNC_RTC_WKUP 13U /*!< DMAMUX2 synchronization Signal is RTC Wakeup */
132#define HAL_DMAMUX2_SYNC_EXTI0 14U /*!< DMAMUX2 synchronization Signal is EXTI0 IT */
133#define HAL_DMAMUX2_SYNC_EXTI2 15U /*!< DMAMUX2 synchronization Signal is EXTI2 IT */
134
135/**
136 * @}
137 */
138
139/** @defgroup DMAEx_MUX_SyncPolarity_selection DMAEx MUX SyncPolarity selection
140 * @brief DMAEx MUX SyncPolarity selection
141 * @{
142 */
143#define HAL_DMAMUX_SYNC_NO_EVENT 0x00000000U /*!< block synchronization events */
144#define HAL_DMAMUX_SYNC_RISING DMAMUX_CxCR_SPOL_0 /*!< synchronize with rising edge events */
145#define HAL_DMAMUX_SYNC_FALLING DMAMUX_CxCR_SPOL_1 /*!< synchronize with falling edge events */
146#define HAL_DMAMUX_SYNC_RISING_FALLING DMAMUX_CxCR_SPOL /*!< synchronize with rising and falling edge events */
147
148/**
149 * @}
150 */
151
152
153/** @defgroup DMAEx_MUX_SignalGeneratorID_selection DMAEx MUX SignalGeneratorID selection
154 * @brief DMAEx MUX SignalGeneratorID selection
155 * @{
156 */
157#define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT 0U /*!< DMAMUX1 Request generator Signal is DMAMUX1 Channel0 Event */
158#define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT 1U /*!< DMAMUX1 Request generator Signal is DMAMUX1 Channel1 Event */
159#define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT 2U /*!< DMAMUX1 Request generator Signal is DMAMUX1 Channel2 Event */
160#define HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT 3U /*!< DMAMUX1 Request generator Signal is LPTIM1 OUT */
161#define HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT 4U /*!< DMAMUX1 Request generator Signal is LPTIM2 OUT */
162#define HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT 5U /*!< DMAMUX1 Request generator Signal is LPTIM3 OUT */
163#define HAL_DMAMUX1_REQ_GEN_EXTI0 6U /*!< DMAMUX1 Request generator Signal is EXTI0 IT */
164#define HAL_DMAMUX1_REQ_GEN_TIM12_TRGO 7U /*!< DMAMUX1 Request generator Signal is TIM12 TRGO */
165
166#define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT 0U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel0 Event */
167#define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT 1U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel1 Event */
168#define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT 2U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel2 Event */
169#define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT 3U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel3 Event */
170#define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT 4U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel4 Event */
171#define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT 5U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel5 Event */
172#define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT 6U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel6 Event */
173#define HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP 7U /*!< DMAMUX2 Request generator Signal is LPUART1 RX Wakeup */
174#define HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP 8U /*!< DMAMUX2 Request generator Signal is LPUART1 TX Wakeup */
175#define HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP 9U /*!< DMAMUX2 Request generator Signal is LPTIM2 Wakeup */
176#define HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT 10U /*!< DMAMUX2 Request generator Signal is LPTIM2 OUT */
177#define HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP 11U /*!< DMAMUX2 Request generator Signal is LPTIM3 Wakeup */
178#define HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT 12U /*!< DMAMUX2 Request generator Signal is LPTIM3 OUT */
179#if defined(LPTIM4)
180#define HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP 13U /*!< DMAMUX2 Request generator Signal is LPTIM4 Wakeup */
181#endif /* LPTIM4 */
182#if defined(LPTIM5)
183#define HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP 14U /*!< DMAMUX2 Request generator Signal is LPTIM5 Wakeup */
184#endif /* LPTIM5 */
185#define HAL_DMAMUX2_REQ_GEN_I2C4_WKUP 15U /*!< DMAMUX2 Request generator Signal is I2C4 Wakeup */
186#define HAL_DMAMUX2_REQ_GEN_SPI6_WKUP 16U /*!< DMAMUX2 Request generator Signal is SPI6 Wakeup */
187#define HAL_DMAMUX2_REQ_GEN_COMP1_OUT 17U /*!< DMAMUX2 Request generator Signal is Comparator 1 output */
188#define HAL_DMAMUX2_REQ_GEN_COMP2_OUT 18U /*!< DMAMUX2 Request generator Signal is Comparator 2 output */
189#define HAL_DMAMUX2_REQ_GEN_RTC_WKUP 19U /*!< DMAMUX2 Request generator Signal is RTC Wakeup */
190#define HAL_DMAMUX2_REQ_GEN_EXTI0 20U /*!< DMAMUX2 Request generator Signal is EXTI0 */
191#define HAL_DMAMUX2_REQ_GEN_EXTI2 21U /*!< DMAMUX2 Request generator Signal is EXTI2 */
192#define HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT 22U /*!< DMAMUX2 Request generator Signal is I2C4 IT Event */
193#define HAL_DMAMUX2_REQ_GEN_SPI6_IT 23U /*!< DMAMUX2 Request generator Signal is SPI6 IT */
194#define HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT 24U /*!< DMAMUX2 Request generator Signal is LPUART1 Tx IT */
195#define HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT 25U /*!< DMAMUX2 Request generator Signal is LPUART1 Rx IT */
196#if defined(ADC3)
197#define HAL_DMAMUX2_REQ_GEN_ADC3_IT 26U /*!< DMAMUX2 Request generator Signal is ADC3 IT */
198#define HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT 27U /*!< DMAMUX2 Request generator Signal is ADC3 Analog Watchdog 1 output */
199#endif /* ADC3 */
200#define HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT 28U /*!< DMAMUX2 Request generator Signal is BDMA Channel 0 IT */
201#define HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT 29U /*!< DMAMUX2 Request generator Signal is BDMA Channel 1 IT */
202
203
204/**
205 * @}
206 */
207
208/** @defgroup DMAEx_MUX_RequestGeneneratorPolarity_selection DMAEx MUX RequestGeneneratorPolarity selection
209 * @brief DMAEx MUX RequestGeneneratorPolarity selection
210 * @{
211 */
212#define HAL_DMAMUX_REQ_GEN_NO_EVENT 0x00000000U /*!< block request generator events */
213#define HAL_DMAMUX_REQ_GEN_RISING DMAMUX_RGxCR_GPOL_0 /*!< generate request on rising edge events */
214#define HAL_DMAMUX_REQ_GEN_FALLING DMAMUX_RGxCR_GPOL_1 /*!< generate request on falling edge events */
215#define HAL_DMAMUX_REQ_GEN_RISING_FALLING DMAMUX_RGxCR_GPOL /*!< generate request on rising and falling edge events */
216
217/**
218 * @}
219 */
220
221/**
222 * @}
223 */
224
225/* Exported functions --------------------------------------------------------*/
226/** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions
227 * @brief DMAEx Exported functions
228 * @{
229 */
230
231/** @defgroup DMAEx_Exported_Functions_Group1 Extended features functions
232 * @brief Extended features functions
233 * @{
234 */
235
236/* IO operation functions *******************************************************/
237HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
238HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
244
246/**
247 * @}
248 */
249/**
250 * @}
251 */
252
253/* Private macros ------------------------------------------------------------*/
254/** @defgroup DMAEx_Private_Macros DMA Private Macros
255 * @brief DMAEx private macros
256 * @{
257 */
258
259#define IS_DMA_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_SYNC_TIM12_TRGO)
260#define IS_BDMA_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX2_SYNC_EXTI2)
261
262#define IS_DMAMUX_SYNC_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0U) && ((REQUEST_NUMBER) <= 32U))
263
264#define IS_DMAMUX_SYNC_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_SYNC_NO_EVENT) || \
265 ((POLARITY) == HAL_DMAMUX_SYNC_RISING) || \
266 ((POLARITY) == HAL_DMAMUX_SYNC_FALLING) || \
267 ((POLARITY) == HAL_DMAMUX_SYNC_RISING_FALLING))
268
269#define IS_DMAMUX_SYNC_STATE(SYNC) (((SYNC) == DISABLE) || ((SYNC) == ENABLE))
270
271#define IS_DMAMUX_SYNC_EVENT(EVENT) (((EVENT) == DISABLE) || \
272 ((EVENT) == ENABLE))
273
274#define IS_DMA_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_REQ_GEN_TIM12_TRGO)
275#define IS_BDMA_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT)
276
277#define IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0U) && ((REQUEST_NUMBER) <= 32U))
278
279#define IS_DMAMUX_REQUEST_GEN_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_REQ_GEN_NO_EVENT) || \
280 ((POLARITY) == HAL_DMAMUX_REQ_GEN_RISING) || \
281 ((POLARITY) == HAL_DMAMUX_REQ_GEN_FALLING) || \
282 ((POLARITY) == HAL_DMAMUX_REQ_GEN_RISING_FALLING))
283
284/**
285 * @}
286 */
287
288/* Private functions ---------------------------------------------------------*/
289/** @defgroup DMAEx_Private_Functions DMAEx Private Functions
290 * @brief DMAEx Private functions
291 * @{
292 */
293/**
294 * @}
295 */
296
297/**
298 * @}
299 */
300
301/**
302 * @}
303 */
304
305#ifdef __cplusplus
306}
307#endif
308
309#endif /* STM32H7xx_HAL_DMA_H */
310
HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator(DMA_HandleTypeDef *hdma)
void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma)
HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory)
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator(DMA_HandleTypeDef *hdma)
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig)
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator(DMA_HandleTypeDef *hdma, HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig)
HAL_DMA_MemoryTypeDef
HAL DMA Memory definition.
@ MEMORY1
Memory 1.
@ MEMORY0
Memory 0.
struct __DMA_HandleTypeDef DMA_HandleTypeDef
DMA handle Structure definition.
FunctionalState
Definition stm32h7xx.h:187
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition.
HAL DMAMUX request generator parameters structure definition.
uint32_t Polarity
Specifies the polarity of the signal on which the request is generated.
uint32_t RequestNumber
Specifies the number of DMA request that will be generated after a signal event.
uint32_t SignalID
Specifies the ID of the signal used for DMAMUX request generator This parameter can be a value of DMA...
HAL DMAMUX Synchronization configuration structure definition.
uint32_t RequestNumber
Specifies the number of DMA request that will be authorized after a sync event.
FunctionalState EventEnable
Specifies if an event shall be generated once the RequestNumber is reached.
FunctionalState SyncEnable
Specifies if the synchronization shall be enabled or disabled This parameter can take the value ENABL...
uint32_t SyncSignalID
Specifies the synchronization signal gating the DMA request in periodic mode.
uint32_t SyncPolarity
Specifies the polarity of the signal on which the DMA request is synchronized.