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stm32h7xx_hal_uart_ex.h
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1/**
2 ******************************************************************************
3 * @file stm32h7xx_hal_uart_ex.h
4 * @author MCD Application Team
5 * @brief Header file of UART HAL Extended module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_UART_EX_H
21#define STM32H7xx_HAL_UART_EX_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
30/** @addtogroup STM32H7xx_HAL_Driver
31 * @{
32 */
33
34/** @addtogroup UARTEx
35 * @{
36 */
37
38/* Exported types ------------------------------------------------------------*/
39/** @defgroup UARTEx_Exported_Types UARTEx Exported Types
40 * @{
41 */
42
43/**
44 * @brief UART wake up from stop mode parameters
45 */
46typedef struct
47{
48 uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF).
49 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
50 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
51 be filled up. */
52
53 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.
54 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */
55
56 uint8_t Address; /*!< UART/USART node address (7-bit long max). */
58
59/**
60 * @}
61 */
62
63/* Exported constants --------------------------------------------------------*/
64/** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
65 * @{
66 */
67
68/** @defgroup UARTEx_Word_Length UARTEx Word Length
69 * @{
70 */
71#define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */
72#define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */
73#define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */
74/**
75 * @}
76 */
77
78/** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length
79 * @{
80 */
81#define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */
82#define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */
83/**
84 * @}
85 */
86
87/** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode
88 * @brief UART FIFO mode
89 * @{
90 */
91#define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */
92#define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */
93/**
94 * @}
95 */
96
97/** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level
98 * @brief UART TXFIFO threshold level
99 * @{
100 */
101#define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */
102#define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */
103#define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */
104#define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */
105#define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */
106#define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */
107/**
108 * @}
109 */
110
111/** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level
112 * @brief UART RXFIFO threshold level
113 * @{
114 */
115#define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */
116#define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */
117#define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */
118#define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */
119#define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */
120#define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */
121/**
122 * @}
123 */
124
125/**
126 * @}
127 */
128
129/* Exported macros -----------------------------------------------------------*/
130/* Exported functions --------------------------------------------------------*/
131/** @addtogroup UARTEx_Exported_Functions
132 * @{
133 */
134
135/** @addtogroup UARTEx_Exported_Functions_Group1
136 * @{
137 */
138
139/* Initialization and de-initialization functions ****************************/
140HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime,
141 uint32_t DeassertionTime);
142
143/**
144 * @}
145 */
146
147/** @addtogroup UARTEx_Exported_Functions_Group2
148 * @{
149 */
150
152
155
156/**
157 * @}
158 */
159
160/** @addtogroup UARTEx_Exported_Functions_Group3
161 * @{
162 */
163
164/* Peripheral Control functions **********************************************/
168
170
175
176HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen,
177 uint32_t Timeout);
180
182
183
184/**
185 * @}
186 */
187
188/**
189 * @}
190 */
191
192/* Private macros ------------------------------------------------------------*/
193/** @defgroup UARTEx_Private_Macros UARTEx Private Macros
194 * @{
195 */
196
197/** @brief Report the UART clock source.
198 * @param __HANDLE__ specifies the UART Handle.
199 * @param __CLOCKSOURCE__ output variable.
200 * @retval UART clocking source, written in __CLOCKSOURCE__.
201 */
202#if defined(UART9) && defined(USART10)
203#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
204 do { \
205 if((__HANDLE__)->Instance == USART1) \
206 { \
207 switch(__HAL_RCC_GET_USART1_SOURCE()) \
208 { \
209 case RCC_USART1CLKSOURCE_D2PCLK2: \
210 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \
211 break; \
212 case RCC_USART1CLKSOURCE_PLL2: \
213 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
214 break; \
215 case RCC_USART1CLKSOURCE_PLL3: \
216 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
217 break; \
218 case RCC_USART1CLKSOURCE_HSI: \
219 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
220 break; \
221 case RCC_USART1CLKSOURCE_CSI: \
222 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
223 break; \
224 case RCC_USART1CLKSOURCE_LSE: \
225 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
226 break; \
227 default: \
228 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
229 break; \
230 } \
231 } \
232 else if((__HANDLE__)->Instance == USART2) \
233 { \
234 switch(__HAL_RCC_GET_USART2_SOURCE()) \
235 { \
236 case RCC_USART2CLKSOURCE_D2PCLK1: \
237 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
238 break; \
239 case RCC_USART2CLKSOURCE_PLL2: \
240 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
241 break; \
242 case RCC_USART2CLKSOURCE_PLL3: \
243 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
244 break; \
245 case RCC_USART2CLKSOURCE_HSI: \
246 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
247 break; \
248 case RCC_USART2CLKSOURCE_CSI: \
249 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
250 break; \
251 case RCC_USART2CLKSOURCE_LSE: \
252 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
253 break; \
254 default: \
255 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
256 break; \
257 } \
258 } \
259 else if((__HANDLE__)->Instance == USART3) \
260 { \
261 switch(__HAL_RCC_GET_USART3_SOURCE()) \
262 { \
263 case RCC_USART3CLKSOURCE_D2PCLK1: \
264 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
265 break; \
266 case RCC_USART3CLKSOURCE_PLL2: \
267 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
268 break; \
269 case RCC_USART3CLKSOURCE_PLL3: \
270 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
271 break; \
272 case RCC_USART3CLKSOURCE_HSI: \
273 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
274 break; \
275 case RCC_USART3CLKSOURCE_CSI: \
276 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
277 break; \
278 case RCC_USART3CLKSOURCE_LSE: \
279 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
280 break; \
281 default: \
282 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
283 break; \
284 } \
285 } \
286 else if((__HANDLE__)->Instance == UART4) \
287 { \
288 switch(__HAL_RCC_GET_UART4_SOURCE()) \
289 { \
290 case RCC_UART4CLKSOURCE_D2PCLK1: \
291 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
292 break; \
293 case RCC_UART4CLKSOURCE_PLL2: \
294 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
295 break; \
296 case RCC_UART4CLKSOURCE_PLL3: \
297 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
298 break; \
299 case RCC_UART4CLKSOURCE_HSI: \
300 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
301 break; \
302 case RCC_UART4CLKSOURCE_CSI: \
303 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
304 break; \
305 case RCC_UART4CLKSOURCE_LSE: \
306 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
307 break; \
308 default: \
309 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
310 break; \
311 } \
312 } \
313 else if ((__HANDLE__)->Instance == UART5) \
314 { \
315 switch(__HAL_RCC_GET_UART5_SOURCE()) \
316 { \
317 case RCC_UART5CLKSOURCE_D2PCLK1: \
318 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
319 break; \
320 case RCC_UART5CLKSOURCE_PLL2: \
321 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
322 break; \
323 case RCC_UART5CLKSOURCE_PLL3: \
324 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
325 break; \
326 case RCC_UART5CLKSOURCE_HSI: \
327 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
328 break; \
329 case RCC_UART5CLKSOURCE_CSI: \
330 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
331 break; \
332 case RCC_UART5CLKSOURCE_LSE: \
333 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
334 break; \
335 default: \
336 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
337 break; \
338 } \
339 } \
340 else if((__HANDLE__)->Instance == USART6) \
341 { \
342 switch(__HAL_RCC_GET_USART6_SOURCE()) \
343 { \
344 case RCC_USART6CLKSOURCE_D2PCLK2: \
345 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \
346 break; \
347 case RCC_USART6CLKSOURCE_PLL2: \
348 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
349 break; \
350 case RCC_USART6CLKSOURCE_PLL3: \
351 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
352 break; \
353 case RCC_USART6CLKSOURCE_HSI: \
354 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
355 break; \
356 case RCC_USART6CLKSOURCE_CSI: \
357 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
358 break; \
359 case RCC_USART6CLKSOURCE_LSE: \
360 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
361 break; \
362 default: \
363 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
364 break; \
365 } \
366 } \
367 else if((__HANDLE__)->Instance == UART7) \
368 { \
369 switch(__HAL_RCC_GET_UART7_SOURCE()) \
370 { \
371 case RCC_UART7CLKSOURCE_D2PCLK1: \
372 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
373 break; \
374 case RCC_UART7CLKSOURCE_PLL2: \
375 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
376 break; \
377 case RCC_UART7CLKSOURCE_PLL3: \
378 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
379 break; \
380 case RCC_UART7CLKSOURCE_HSI: \
381 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
382 break; \
383 case RCC_UART7CLKSOURCE_CSI: \
384 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
385 break; \
386 case RCC_UART7CLKSOURCE_LSE: \
387 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
388 break; \
389 default: \
390 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
391 break; \
392 } \
393 } \
394 else if((__HANDLE__)->Instance == UART8) \
395 { \
396 switch(__HAL_RCC_GET_UART8_SOURCE()) \
397 { \
398 case RCC_UART8CLKSOURCE_D2PCLK1: \
399 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
400 break; \
401 case RCC_UART8CLKSOURCE_PLL2: \
402 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
403 break; \
404 case RCC_UART8CLKSOURCE_PLL3: \
405 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
406 break; \
407 case RCC_UART8CLKSOURCE_HSI: \
408 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
409 break; \
410 case RCC_UART8CLKSOURCE_CSI: \
411 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
412 break; \
413 case RCC_UART8CLKSOURCE_LSE: \
414 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
415 break; \
416 default: \
417 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
418 break; \
419 } \
420 } \
421 else if((__HANDLE__)->Instance == UART9) \
422 { \
423 switch(__HAL_RCC_GET_UART9_SOURCE()) \
424 { \
425 case RCC_UART9CLKSOURCE_D2PCLK2: \
426 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \
427 break; \
428 case RCC_UART9CLKSOURCE_PLL2: \
429 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
430 break; \
431 case RCC_UART9CLKSOURCE_PLL3: \
432 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
433 break; \
434 case RCC_UART9CLKSOURCE_HSI: \
435 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
436 break; \
437 case RCC_UART9CLKSOURCE_CSI: \
438 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
439 break; \
440 case RCC_UART9CLKSOURCE_LSE: \
441 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
442 break; \
443 default: \
444 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
445 break; \
446 } \
447 } \
448 else if((__HANDLE__)->Instance == USART10) \
449 { \
450 switch(__HAL_RCC_GET_USART10_SOURCE()) \
451 { \
452 case RCC_USART10CLKSOURCE_D2PCLK2: \
453 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \
454 break; \
455 case RCC_USART10CLKSOURCE_PLL2: \
456 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
457 break; \
458 case RCC_USART10CLKSOURCE_PLL3: \
459 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
460 break; \
461 case RCC_USART10CLKSOURCE_HSI: \
462 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
463 break; \
464 case RCC_USART10CLKSOURCE_CSI: \
465 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
466 break; \
467 case RCC_USART10CLKSOURCE_LSE: \
468 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
469 break; \
470 default: \
471 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
472 break; \
473 } \
474 } \
475 else if((__HANDLE__)->Instance == LPUART1) \
476 { \
477 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
478 { \
479 case RCC_LPUART1CLKSOURCE_D3PCLK1: \
480 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D3PCLK1; \
481 break; \
482 case RCC_LPUART1CLKSOURCE_PLL2: \
483 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
484 break; \
485 case RCC_LPUART1CLKSOURCE_PLL3: \
486 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
487 break; \
488 case RCC_LPUART1CLKSOURCE_HSI: \
489 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
490 break; \
491 case RCC_LPUART1CLKSOURCE_CSI: \
492 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
493 break; \
494 case RCC_LPUART1CLKSOURCE_LSE: \
495 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
496 break; \
497 default: \
498 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
499 break; \
500 } \
501 } \
502 else \
503 { \
504 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
505 } \
506 } while(0U)
507#else
508#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
509 do { \
510 if((__HANDLE__)->Instance == USART1) \
511 { \
512 switch(__HAL_RCC_GET_USART1_SOURCE()) \
513 { \
514 case RCC_USART1CLKSOURCE_D2PCLK2: \
515 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \
516 break; \
517 case RCC_USART1CLKSOURCE_PLL2: \
518 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
519 break; \
520 case RCC_USART1CLKSOURCE_PLL3: \
521 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
522 break; \
523 case RCC_USART1CLKSOURCE_HSI: \
524 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
525 break; \
526 case RCC_USART1CLKSOURCE_CSI: \
527 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
528 break; \
529 case RCC_USART1CLKSOURCE_LSE: \
530 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
531 break; \
532 default: \
533 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
534 break; \
535 } \
536 } \
537 else if((__HANDLE__)->Instance == USART2) \
538 { \
539 switch(__HAL_RCC_GET_USART2_SOURCE()) \
540 { \
541 case RCC_USART2CLKSOURCE_D2PCLK1: \
542 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
543 break; \
544 case RCC_USART2CLKSOURCE_PLL2: \
545 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
546 break; \
547 case RCC_USART2CLKSOURCE_PLL3: \
548 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
549 break; \
550 case RCC_USART2CLKSOURCE_HSI: \
551 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
552 break; \
553 case RCC_USART2CLKSOURCE_CSI: \
554 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
555 break; \
556 case RCC_USART2CLKSOURCE_LSE: \
557 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
558 break; \
559 default: \
560 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
561 break; \
562 } \
563 } \
564 else if((__HANDLE__)->Instance == USART3) \
565 { \
566 switch(__HAL_RCC_GET_USART3_SOURCE()) \
567 { \
568 case RCC_USART3CLKSOURCE_D2PCLK1: \
569 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
570 break; \
571 case RCC_USART3CLKSOURCE_PLL2: \
572 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
573 break; \
574 case RCC_USART3CLKSOURCE_PLL3: \
575 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
576 break; \
577 case RCC_USART3CLKSOURCE_HSI: \
578 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
579 break; \
580 case RCC_USART3CLKSOURCE_CSI: \
581 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
582 break; \
583 case RCC_USART3CLKSOURCE_LSE: \
584 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
585 break; \
586 default: \
587 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
588 break; \
589 } \
590 } \
591 else if((__HANDLE__)->Instance == UART4) \
592 { \
593 switch(__HAL_RCC_GET_UART4_SOURCE()) \
594 { \
595 case RCC_UART4CLKSOURCE_D2PCLK1: \
596 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
597 break; \
598 case RCC_UART4CLKSOURCE_PLL2: \
599 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
600 break; \
601 case RCC_UART4CLKSOURCE_PLL3: \
602 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
603 break; \
604 case RCC_UART4CLKSOURCE_HSI: \
605 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
606 break; \
607 case RCC_UART4CLKSOURCE_CSI: \
608 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
609 break; \
610 case RCC_UART4CLKSOURCE_LSE: \
611 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
612 break; \
613 default: \
614 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
615 break; \
616 } \
617 } \
618 else if ((__HANDLE__)->Instance == UART5) \
619 { \
620 switch(__HAL_RCC_GET_UART5_SOURCE()) \
621 { \
622 case RCC_UART5CLKSOURCE_D2PCLK1: \
623 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
624 break; \
625 case RCC_UART5CLKSOURCE_PLL2: \
626 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
627 break; \
628 case RCC_UART5CLKSOURCE_PLL3: \
629 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
630 break; \
631 case RCC_UART5CLKSOURCE_HSI: \
632 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
633 break; \
634 case RCC_UART5CLKSOURCE_CSI: \
635 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
636 break; \
637 case RCC_UART5CLKSOURCE_LSE: \
638 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
639 break; \
640 default: \
641 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
642 break; \
643 } \
644 } \
645 else if((__HANDLE__)->Instance == USART6) \
646 { \
647 switch(__HAL_RCC_GET_USART6_SOURCE()) \
648 { \
649 case RCC_USART6CLKSOURCE_D2PCLK2: \
650 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK2; \
651 break; \
652 case RCC_USART6CLKSOURCE_PLL2: \
653 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
654 break; \
655 case RCC_USART6CLKSOURCE_PLL3: \
656 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
657 break; \
658 case RCC_USART6CLKSOURCE_HSI: \
659 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
660 break; \
661 case RCC_USART6CLKSOURCE_CSI: \
662 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
663 break; \
664 case RCC_USART6CLKSOURCE_LSE: \
665 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
666 break; \
667 default: \
668 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
669 break; \
670 } \
671 } \
672 else if((__HANDLE__)->Instance == UART7) \
673 { \
674 switch(__HAL_RCC_GET_UART7_SOURCE()) \
675 { \
676 case RCC_UART7CLKSOURCE_D2PCLK1: \
677 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
678 break; \
679 case RCC_UART7CLKSOURCE_PLL2: \
680 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
681 break; \
682 case RCC_UART7CLKSOURCE_PLL3: \
683 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
684 break; \
685 case RCC_UART7CLKSOURCE_HSI: \
686 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
687 break; \
688 case RCC_UART7CLKSOURCE_CSI: \
689 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
690 break; \
691 case RCC_UART7CLKSOURCE_LSE: \
692 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
693 break; \
694 default: \
695 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
696 break; \
697 } \
698 } \
699 else if((__HANDLE__)->Instance == UART8) \
700 { \
701 switch(__HAL_RCC_GET_UART8_SOURCE()) \
702 { \
703 case RCC_UART8CLKSOURCE_D2PCLK1: \
704 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D2PCLK1; \
705 break; \
706 case RCC_UART8CLKSOURCE_PLL2: \
707 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
708 break; \
709 case RCC_UART8CLKSOURCE_PLL3: \
710 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
711 break; \
712 case RCC_UART8CLKSOURCE_HSI: \
713 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
714 break; \
715 case RCC_UART8CLKSOURCE_CSI: \
716 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
717 break; \
718 case RCC_UART8CLKSOURCE_LSE: \
719 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
720 break; \
721 default: \
722 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
723 break; \
724 } \
725 } \
726 else if((__HANDLE__)->Instance == LPUART1) \
727 { \
728 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \
729 { \
730 case RCC_LPUART1CLKSOURCE_D3PCLK1: \
731 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_D3PCLK1; \
732 break; \
733 case RCC_LPUART1CLKSOURCE_PLL2: \
734 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL2; \
735 break; \
736 case RCC_LPUART1CLKSOURCE_PLL3: \
737 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PLL3; \
738 break; \
739 case RCC_LPUART1CLKSOURCE_HSI: \
740 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
741 break; \
742 case RCC_LPUART1CLKSOURCE_CSI: \
743 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_CSI; \
744 break; \
745 case RCC_LPUART1CLKSOURCE_LSE: \
746 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
747 break; \
748 default: \
749 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
750 break; \
751 } \
752 } \
753 else \
754 { \
755 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
756 } \
757 } while(0U)
758#endif /* UART9 && USART10 */
759
760/** @brief Report the UART mask to apply to retrieve the received data
761 * according to the word length and to the parity bits activation.
762 * @note If PCE = 1, the parity bit is not included in the data extracted
763 * by the reception API().
764 * This masking operation is not carried out in the case of
765 * DMA transfers.
766 * @param __HANDLE__ specifies the UART Handle.
767 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.
768 */
769#define UART_MASK_COMPUTATION(__HANDLE__) \
770 do { \
771 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
772 { \
773 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
774 { \
775 (__HANDLE__)->Mask = 0x01FFU ; \
776 } \
777 else \
778 { \
779 (__HANDLE__)->Mask = 0x00FFU ; \
780 } \
781 } \
782 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
783 { \
784 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
785 { \
786 (__HANDLE__)->Mask = 0x00FFU ; \
787 } \
788 else \
789 { \
790 (__HANDLE__)->Mask = 0x007FU ; \
791 } \
792 } \
793 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
794 { \
795 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
796 { \
797 (__HANDLE__)->Mask = 0x007FU ; \
798 } \
799 else \
800 { \
801 (__HANDLE__)->Mask = 0x003FU ; \
802 } \
803 } \
804 else \
805 { \
806 (__HANDLE__)->Mask = 0x0000U; \
807 } \
808 } while(0U)
809
810/**
811 * @brief Ensure that UART frame length is valid.
812 * @param __LENGTH__ UART frame length.
813 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
814 */
815#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \
816 ((__LENGTH__) == UART_WORDLENGTH_8B) || \
817 ((__LENGTH__) == UART_WORDLENGTH_9B))
818
819/**
820 * @brief Ensure that UART wake-up address length is valid.
821 * @param __ADDRESS__ UART wake-up address length.
822 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid)
823 */
824#define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \
825 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B))
826
827/**
828 * @brief Ensure that UART TXFIFO threshold level is valid.
829 * @param __THRESHOLD__ UART TXFIFO threshold level.
830 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
831 */
832#define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \
833 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \
834 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \
835 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \
836 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \
837 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8))
838
839/**
840 * @brief Ensure that UART RXFIFO threshold level is valid.
841 * @param __THRESHOLD__ UART RXFIFO threshold level.
842 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
843 */
844#define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \
845 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \
846 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \
847 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \
848 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \
849 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8))
850
851/**
852 * @}
853 */
854
855/* Private functions ---------------------------------------------------------*/
856
857/**
858 * @}
859 */
860
861/**
862 * @}
863 */
864
865#ifdef __cplusplus
866}
867#endif
868
869#endif /* STM32H7xx_HAL_UART_EX_H */
870
HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime)
void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart)
void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, uint32_t Timeout)
HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection)
HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength)
HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold)
HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart)
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
struct __UART_HandleTypeDef UART_HandleTypeDef
UART handle Structure definition.
uint32_t HAL_UART_RxEventTypeTypeDef
HAL UART Rx Event type definition.
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition.
UART wake up from stop mode parameters.
uint8_t Address
UART/USART node address (7-bit long max).
uint32_t WakeUpEvent
Specifies which event will activate the Wakeup from Stop mode flag (WUF).
uint16_t AddressLength
Specifies whether the address is 4 or 7-bit long.