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stm32h7xx_hal_uart.h
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1/**
2 ******************************************************************************
3 * @file stm32h7xx_hal_uart.h
4 * @author MCD Application Team
5 * @brief Header file of UART HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_UART_H
21#define STM32H7xx_HAL_UART_H
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
30/** @addtogroup STM32H7xx_HAL_Driver
31 * @{
32 */
33
34/** @addtogroup UART
35 * @{
36 */
37
38/* Exported types ------------------------------------------------------------*/
39/** @defgroup UART_Exported_Types UART Exported Types
40 * @{
41 */
42
43/**
44 * @brief UART Init Structure definition
45 */
46typedef struct
47{
48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
49 The baud rate register is computed using the following formula:
50 @note For LPUART :
51 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate)))
52 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler.
53 @note For UART :
54 - If oversampling is 16 or in LIN mode,
55 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate)))
56 - If oversampling is 8,
57 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) /
58 ((huart->Init.BaudRate)))[15:4]
59 Baud Rate Register[3] = 0
60 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) /
61 ((huart->Init.BaudRate)))[3:0]) >> 1
62 where uart_ker_ck_pres is the UART input clock divided by a prescaler */
63
64 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
65 This parameter can be a value of @ref UARTEx_Word_Length. */
66
67 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
68 This parameter can be a value of @ref UART_Stop_Bits. */
69
70 uint32_t Parity; /*!< Specifies the parity mode.
71 This parameter can be a value of @ref UART_Parity
72 @note When parity is enabled, the computed parity is inserted
73 at the MSB position of the transmitted data (9th bit when
74 the word length is set to 9 data bits; 8th bit when the
75 word length is set to 8 data bits). */
76
77 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
78 This parameter can be a value of @ref UART_Mode. */
79
80 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
81 or disabled.
82 This parameter can be a value of @ref UART_Hardware_Flow_Control. */
83
84 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled,
85 to achieve higher speed (up to f_PCLK/8).
86 This parameter can be a value of @ref UART_Over_Sampling. */
87
88 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
89 Selecting the single sample method increases the receiver tolerance to clock
90 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
91
92 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source.
93 This parameter can be a value of @ref UART_ClockPrescaler. */
94
95} UART_InitTypeDef;
96
97/**
98 * @brief UART Advanced Features initialization structure definition
99 */
100typedef struct
101{
102 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
103 Advanced Features may be initialized at the same time .
104 This parameter can be a value of
105 @ref UART_Advanced_Features_Initialization_Type. */
106
107 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
108 This parameter can be a value of @ref UART_Tx_Inv. */
109
110 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
111 This parameter can be a value of @ref UART_Rx_Inv. */
112
113 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
114 vs negative/inverted logic).
115 This parameter can be a value of @ref UART_Data_Inv. */
116
117 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
118 This parameter can be a value of @ref UART_Rx_Tx_Swap. */
119
120 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
121 This parameter can be a value of @ref UART_Overrun_Disable. */
122
123 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
124 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
125
126 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
127 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */
128
129 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
130 detection is carried out.
131 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */
132
133 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
134 This parameter can be a value of @ref UART_MSB_First. */
135} UART_AdvFeatureInitTypeDef;
136
137/**
138 * @brief HAL UART State definition
139 * @note HAL UART State value is a combination of 2 different substates:
140 * gState and RxState (see @ref UART_State_Definition).
141 * - gState contains UART state information related to global Handle management
142 * and also information related to Tx operations.
143 * gState value coding follow below described bitmap :
144 * b7-b6 Error information
145 * 00 : No Error
146 * 01 : (Not Used)
147 * 10 : Timeout
148 * 11 : Error
149 * b5 Peripheral initialization status
150 * 0 : Reset (Peripheral not initialized)
151 * 1 : Init done (Peripheral initialized. HAL UART Init function already called)
152 * b4-b3 (not used)
153 * xx : Should be set to 00
154 * b2 Intrinsic process state
155 * 0 : Ready
156 * 1 : Busy (Peripheral busy with some configuration or internal operations)
157 * b1 (not used)
158 * x : Should be set to 0
159 * b0 Tx state
160 * 0 : Ready (no Tx operation ongoing)
161 * 1 : Busy (Tx operation ongoing)
162 * - RxState contains information related to Rx operations.
163 * RxState value coding follow below described bitmap :
164 * b7-b6 (not used)
165 * xx : Should be set to 00
166 * b5 Peripheral initialization status
167 * 0 : Reset (Peripheral not initialized)
168 * 1 : Init done (Peripheral initialized)
169 * b4-b2 (not used)
170 * xxx : Should be set to 000
171 * b1 Rx state
172 * 0 : Ready (no Rx operation ongoing)
173 * 1 : Busy (Rx operation ongoing)
174 * b0 (not used)
175 * x : Should be set to 0.
176 */
177typedef uint32_t HAL_UART_StateTypeDef;
178
179/**
180 * @brief UART clock sources definition
181 */
182typedef enum
183{
184 UART_CLOCKSOURCE_D2PCLK1 = 0x00U, /*!< Domain2 PCLK1 clock source */
185 UART_CLOCKSOURCE_D2PCLK2 = 0x01U, /*!< Domain2 PCLK2 clock source */
186 UART_CLOCKSOURCE_D3PCLK1 = 0x02U, /*!< Domain3 PCLK1 clock source */
187 UART_CLOCKSOURCE_PLL2 = 0x04U, /*!< PLL2Q clock source */
188 UART_CLOCKSOURCE_PLL3 = 0x08U, /*!< PLL3Q clock source */
189 UART_CLOCKSOURCE_HSI = 0x10U, /*!< HSI clock source */
190 UART_CLOCKSOURCE_CSI = 0x20U, /*!< CSI clock source */
191 UART_CLOCKSOURCE_LSE = 0x40U, /*!< LSE clock source */
192 UART_CLOCKSOURCE_UNDEFINED = 0x80U /*!< Undefined clock source */
193} UART_ClockSourceTypeDef;
194
195/**
196 * @brief HAL UART Reception type definition
197 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing.
198 * This parameter can be a value of @ref UART_Reception_Type_Values :
199 * HAL_UART_RECEPTION_STANDARD = 0x00U,
200 * HAL_UART_RECEPTION_TOIDLE = 0x01U,
201 * HAL_UART_RECEPTION_TORTO = 0x02U,
202 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U,
203 */
204typedef uint32_t HAL_UART_RxTypeTypeDef;
205
206/**
207 * @brief HAL UART Rx Event type definition
208 * @note HAL UART Rx Event type value aims to identify which type of Event has occurred
209 * leading to call of the RxEvent callback.
210 * This parameter can be a value of @ref UART_RxEvent_Type_Values :
211 * HAL_UART_RXEVENT_TC = 0x00U,
212 * HAL_UART_RXEVENT_HT = 0x01U,
213 * HAL_UART_RXEVENT_IDLE = 0x02U,
214 */
215typedef uint32_t HAL_UART_RxEventTypeTypeDef;
216
217/**
218 * @brief UART handle Structure definition
219 */
220typedef struct __UART_HandleTypeDef
221{
222 USART_TypeDef *Instance; /*!< UART registers base address */
223
224 UART_InitTypeDef Init; /*!< UART communication parameters */
225
226 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */
227
228 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
229
230 uint16_t TxXferSize; /*!< UART Tx Transfer size */
231
232 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
233
234 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
235
236 uint16_t RxXferSize; /*!< UART Rx Transfer size */
237
238 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
239
240 uint16_t Mask; /*!< UART Rx RDR register mask */
241
242 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used.
243 This parameter can be a value of @ref UARTEx_FIFO_mode. */
244
245 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */
246
247 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */
248
249 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */
250
251 __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */
252
253 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */
254
255 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */
256
257 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
258
259 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
260
261 HAL_LockTypeDef Lock; /*!< Locking object */
262
263 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
264 and also related to Tx operations. This parameter
265 can be a value of @ref HAL_UART_StateTypeDef */
266
267 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This
268 parameter can be a value of @ref HAL_UART_StateTypeDef */
269
270 __IO uint32_t ErrorCode; /*!< UART Error code */
271
272#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
273 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */
274 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */
275 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */
276 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */
277 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */
278 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */
279 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */
280 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */
281 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */
282 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */
283 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */
284 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */
285
286 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */
287 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */
288#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
289
290} UART_HandleTypeDef;
291
292#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
293/**
294 * @brief HAL UART Callback ID enumeration definition
295 */
296typedef enum
297{
298 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */
299 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */
300 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */
301 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */
302 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */
303 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */
304 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */
305 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */
306 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */
307 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */
308 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */
309
310 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */
311 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */
312
313} HAL_UART_CallbackIDTypeDef;
314
315/**
316 * @brief HAL UART Callback pointer definition
317 */
318typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */
319typedef void (*pUART_RxEventCallbackTypeDef)
320(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */
321
322#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
323
324/**
325 * @}
326 */
327
328/* Exported constants --------------------------------------------------------*/
329/** @defgroup UART_Exported_Constants UART Exported Constants
330 * @{
331 */
332
333/** @defgroup UART_State_Definition UART State Code Definition
334 * @{
335 */
336#define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized
337 Value is allowed for gState and RxState */
338#define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use
339 Value is allowed for gState and RxState */
340#define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing
341 Value is allowed for gState only */
342#define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing
343 Value is allowed for gState only */
344#define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing
345 Value is allowed for RxState only */
346#define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing
347 Not to be used for neither gState nor RxState.Value is result
348 of combination (Or) between gState and RxState values */
349#define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state
350 Value is allowed for gState only */
351#define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error
352 Value is allowed for gState only */
353/**
354 * @}
355 */
356
357/** @defgroup UART_Error_Definition UART Error Definition
358 * @{
359 */
360#define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */
361#define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */
362#define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */
363#define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */
364#define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */
365#define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
366#define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */
367
368#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
369#define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */
370#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
371/**
372 * @}
373 */
374
375/** @defgroup UART_Stop_Bits UART Number of Stop Bits
376 * @{
377 */
378#define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */
379#define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */
380#define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */
381#define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */
382/**
383 * @}
384 */
385
386/** @defgroup UART_Parity UART Parity
387 * @{
388 */
389#define UART_PARITY_NONE 0x00000000U /*!< No parity */
390#define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */
391#define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */
392/**
393 * @}
394 */
395
396/** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
397 * @{
398 */
399#define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */
400#define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */
401#define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */
402#define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */
403/**
404 * @}
405 */
406
407/** @defgroup UART_Mode UART Transfer Mode
408 * @{
409 */
410#define UART_MODE_RX USART_CR1_RE /*!< RX mode */
411#define UART_MODE_TX USART_CR1_TE /*!< TX mode */
412#define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */
413/**
414 * @}
415 */
416
417/** @defgroup UART_State UART State
418 * @{
419 */
420#define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */
421#define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */
422/**
423 * @}
424 */
425
426/** @defgroup UART_Over_Sampling UART Over Sampling
427 * @{
428 */
429#define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
430#define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
431/**
432 * @}
433 */
434
435/** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
436 * @{
437 */
438#define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */
439#define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */
440/**
441 * @}
442 */
443
444/** @defgroup UART_ClockPrescaler UART Clock Prescaler
445 * @{
446 */
447#define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */
448#define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */
449#define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */
450#define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */
451#define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */
452#define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */
453#define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */
454#define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */
455#define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */
456#define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */
457#define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */
458#define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */
459/**
460 * @}
461 */
462
463/** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode
464 * @{
465 */
466#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection
467 on start bit */
468#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection
469 on falling edge */
470#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection
471 on 0x7F frame detection */
472#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection
473 on 0x55 frame detection */
474/**
475 * @}
476 */
477
478/** @defgroup UART_Receiver_Timeout UART Receiver Timeout
479 * @{
480 */
481#define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */
482#define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */
483/**
484 * @}
485 */
486
487/** @defgroup UART_LIN UART Local Interconnection Network mode
488 * @{
489 */
490#define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */
491#define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */
492/**
493 * @}
494 */
495
496/** @defgroup UART_LIN_Break_Detection UART LIN Break Detection
497 * @{
498 */
499#define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */
500#define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */
501/**
502 * @}
503 */
504
505/** @defgroup UART_DMA_Tx UART DMA Tx
506 * @{
507 */
508#define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */
509#define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */
510/**
511 * @}
512 */
513
514/** @defgroup UART_DMA_Rx UART DMA Rx
515 * @{
516 */
517#define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */
518#define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */
519/**
520 * @}
521 */
522
523/** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
524 * @{
525 */
526#define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */
527#define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */
528/**
529 * @}
530 */
531
532/** @defgroup UART_WakeUp_Methods UART WakeUp Methods
533 * @{
534 */
535#define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */
536#define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */
537/**
538 * @}
539 */
540
541/** @defgroup UART_Request_Parameters UART Request Parameters
542 * @{
543 */
544#define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */
545#define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */
546#define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */
547#define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */
548#define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */
549/**
550 * @}
551 */
552
553/** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
554 * @{
555 */
556#define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */
557#define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */
558#define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */
559#define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */
560#define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */
561#define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */
562#define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */
563#define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */
564#define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */
565/**
566 * @}
567 */
568
569/** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
570 * @{
571 */
572#define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */
573#define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */
574/**
575 * @}
576 */
577
578/** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
579 * @{
580 */
581#define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */
582#define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */
583/**
584 * @}
585 */
586
587/** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
588 * @{
589 */
590#define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */
591#define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */
592/**
593 * @}
594 */
595
596/** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
597 * @{
598 */
599#define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */
600#define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */
601/**
602 * @}
603 */
604
605/** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
606 * @{
607 */
608#define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */
609#define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */
610/**
611 * @}
612 */
613
614/** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
615 * @{
616 */
617#define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */
618#define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */
619/**
620 * @}
621 */
622
623/** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
624 * @{
625 */
626#define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */
627#define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */
628/**
629 * @}
630 */
631
632/** @defgroup UART_MSB_First UART Advanced Feature MSB First
633 * @{
634 */
635#define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received
636 first disable */
637#define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received
638 first enable */
639/**
640 * @}
641 */
642
643/** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable
644 * @{
645 */
646#define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */
647#define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */
648/**
649 * @}
650 */
651
652/** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
653 * @{
654 */
655#define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */
656#define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */
657/**
658 * @}
659 */
660
661/** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
662 * @{
663 */
664#define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */
665/**
666 * @}
667 */
668
669/** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
670 * @{
671 */
672#define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */
673#define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */
674#define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register
675 not empty or RXFIFO is not empty */
676/**
677 * @}
678 */
679
680/** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
681 * @{
682 */
683#define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */
684#define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */
685/**
686 * @}
687 */
688
689/** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
690 * @{
691 */
692#define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB
693 position in CR1 register */
694/**
695 * @}
696 */
697
698/** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
699 * @{
700 */
701#define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB
702 position in CR1 register */
703/**
704 * @}
705 */
706
707/** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
708 * @{
709 */
710#define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */
711/**
712 * @}
713 */
714
715/** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
716 * @{
717 */
718#define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */
719/**
720 * @}
721 */
722
723/** @defgroup UART_Flags UART Status Flags
724 * Elements values convention: 0xXXXX
725 * - 0xXXXX : Flag mask in the ISR register
726 * @{
727 */
728#define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */
729#define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */
730#define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */
731#define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */
732#define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */
733#define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */
734#define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */
735#define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */
736#define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */
737#define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */
738#define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */
739#define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */
740#define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */
741#define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */
742#define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */
743#define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */
744#define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */
745#define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */
746#define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */
747#define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */
748#define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */
749#define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */
750#define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */
751#define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */
752#define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */
753#define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */
754#define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */
755/**
756 * @}
757 */
758
759/** @defgroup UART_Interrupt_definition UART Interrupts Definition
760 * Elements values convention: 000ZZZZZ0XXYYYYYb
761 * - YYYYY : Interrupt source position in the XX register (5bits)
762 * - XX : Interrupt source register (2bits)
763 * - 01: CR1 register
764 * - 10: CR2 register
765 * - 11: CR3 register
766 * - ZZZZZ : Flag position in the ISR register(5bits)
767 * Elements values convention: 000000000XXYYYYYb
768 * - YYYYY : Interrupt source position in the XX register (5bits)
769 * - XX : Interrupt source register (2bits)
770 * - 01: CR1 register
771 * - 10: CR2 register
772 * - 11: CR3 register
773 * Elements values convention: 0000ZZZZ00000000b
774 * - ZZZZ : Flag position in the ISR register(4bits)
775 * @{
776 */
777#define UART_IT_PE 0x0028U /*!< UART parity error interruption */
778#define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */
779#define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */
780#define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */
781#define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */
782#define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */
783#define UART_IT_IDLE 0x0424U /*!< UART idle interruption */
784#define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */
785#define UART_IT_CTS 0x096AU /*!< UART CTS interruption */
786#define UART_IT_CM 0x112EU /*!< UART character match interruption */
787#define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */
788#define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */
789#define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */
790#define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */
791#define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */
792#define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */
793
794#define UART_IT_ERR 0x0060U /*!< UART error interruption */
795
796#define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */
797#define UART_IT_NE 0x0200U /*!< UART noise error interruption */
798#define UART_IT_FE 0x0100U /*!< UART frame error interruption */
799/**
800 * @}
801 */
802
803/** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags
804 * @{
805 */
806#define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
807#define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
808#define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */
809#define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */
810#define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
811#define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */
812#define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
813#define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */
814#define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
815#define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */
816#define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */
817#define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */
818/**
819 * @}
820 */
821
822/** @defgroup UART_Reception_Type_Values UART Reception type values
823 * @{
824 */
825#define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */
826#define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */
827#define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */
828#define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */
829/**
830 * @}
831 */
832
833/** @defgroup UART_RxEvent_Type_Values UART RxEvent type values
834 * @{
835 */
836#define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */
837#define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */
838#define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */
839/**
840 * @}
841 */
842
843/**
844 * @}
845 */
846
847/* Exported macros -----------------------------------------------------------*/
848/** @defgroup UART_Exported_Macros UART Exported Macros
849 * @{
850 */
851
852/** @brief Reset UART handle states.
853 * @param __HANDLE__ UART handle.
854 * @retval None
855 */
856#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
857#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
858 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
859 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
860 (__HANDLE__)->MspInitCallback = NULL; \
861 (__HANDLE__)->MspDeInitCallback = NULL; \
862 } while(0U)
863#else
864#define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
865 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
866 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
867 } while(0U)
868#endif /*USE_HAL_UART_REGISTER_CALLBACKS */
869
870/** @brief Flush the UART Data registers.
871 * @param __HANDLE__ specifies the UART Handle.
872 * @retval None
873 */
874#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
875 do{ \
876 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
877 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
878 } while(0U)
879
880/** @brief Clear the specified UART pending flag.
881 * @param __HANDLE__ specifies the UART Handle.
882 * @param __FLAG__ specifies the flag to check.
883 * This parameter can be any combination of the following values:
884 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
885 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
886 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
887 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
888 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
889 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag
890 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
891 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag
892 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
893 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
894 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
895 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
896 * @retval None
897 */
898#define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
899
900/** @brief Clear the UART PE pending flag.
901 * @param __HANDLE__ specifies the UART Handle.
902 * @retval None
903 */
904#define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
905
906/** @brief Clear the UART FE pending flag.
907 * @param __HANDLE__ specifies the UART Handle.
908 * @retval None
909 */
910#define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
911
912/** @brief Clear the UART NE pending flag.
913 * @param __HANDLE__ specifies the UART Handle.
914 * @retval None
915 */
916#define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
917
918/** @brief Clear the UART ORE pending flag.
919 * @param __HANDLE__ specifies the UART Handle.
920 * @retval None
921 */
922#define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
923
924/** @brief Clear the UART IDLE pending flag.
925 * @param __HANDLE__ specifies the UART Handle.
926 * @retval None
927 */
928#define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
929
930/** @brief Clear the UART TX FIFO empty clear flag.
931 * @param __HANDLE__ specifies the UART Handle.
932 * @retval None
933 */
934#define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF)
935
936/** @brief Check whether the specified UART flag is set or not.
937 * @param __HANDLE__ specifies the UART Handle.
938 * @param __FLAG__ specifies the flag to check.
939 * This parameter can be one of the following values:
940 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag
941 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag
942 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag
943 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag
944 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
945 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
946 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag
947 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode)
948 * @arg @ref UART_FLAG_SBKF Send Break flag
949 * @arg @ref UART_FLAG_CMF Character match flag
950 * @arg @ref UART_FLAG_BUSY Busy flag
951 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag
952 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag
953 * @arg @ref UART_FLAG_CTS CTS Change flag
954 * @arg @ref UART_FLAG_LBDF LIN Break detection flag
955 * @arg @ref UART_FLAG_TXE Transmit data register empty flag
956 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag
957 * @arg @ref UART_FLAG_TC Transmission Complete flag
958 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag
959 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag
960 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag
961 * @arg @ref UART_FLAG_IDLE Idle Line detection flag
962 * @arg @ref UART_FLAG_ORE Overrun Error flag
963 * @arg @ref UART_FLAG_NE Noise Error flag
964 * @arg @ref UART_FLAG_FE Framing Error flag
965 * @arg @ref UART_FLAG_PE Parity Error flag
966 * @retval The new state of __FLAG__ (TRUE or FALSE).
967 */
968#define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
969
970/** @brief Enable the specified UART interrupt.
971 * @param __HANDLE__ specifies the UART Handle.
972 * @param __INTERRUPT__ specifies the UART interrupt source to enable.
973 * This parameter can be one of the following values:
974 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
975 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
976 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
977 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
978 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
979 * @arg @ref UART_IT_CM Character match interrupt
980 * @arg @ref UART_IT_CTS CTS change interrupt
981 * @arg @ref UART_IT_LBD LIN Break detection interrupt
982 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
983 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
984 * @arg @ref UART_IT_TC Transmission complete interrupt
985 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
986 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
987 * @arg @ref UART_IT_RTO Receive Timeout interrupt
988 * @arg @ref UART_IT_IDLE Idle line detection interrupt
989 * @arg @ref UART_IT_PE Parity Error interrupt
990 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error)
991 * @retval None
992 */
993#define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\
994 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\
995 ((__HANDLE__)->Instance->CR1 |= (1U <<\
996 ((__INTERRUPT__) & UART_IT_MASK))): \
997 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\
998 ((__HANDLE__)->Instance->CR2 |= (1U <<\
999 ((__INTERRUPT__) & UART_IT_MASK))): \
1000 ((__HANDLE__)->Instance->CR3 |= (1U <<\
1001 ((__INTERRUPT__) & UART_IT_MASK))))
1002
1003/** @brief Disable the specified UART interrupt.
1004 * @param __HANDLE__ specifies the UART Handle.
1005 * @param __INTERRUPT__ specifies the UART interrupt source to disable.
1006 * This parameter can be one of the following values:
1007 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
1008 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
1009 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
1010 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
1011 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
1012 * @arg @ref UART_IT_CM Character match interrupt
1013 * @arg @ref UART_IT_CTS CTS change interrupt
1014 * @arg @ref UART_IT_LBD LIN Break detection interrupt
1015 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
1016 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
1017 * @arg @ref UART_IT_TC Transmission complete interrupt
1018 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
1019 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
1020 * @arg @ref UART_IT_RTO Receive Timeout interrupt
1021 * @arg @ref UART_IT_IDLE Idle line detection interrupt
1022 * @arg @ref UART_IT_PE Parity Error interrupt
1023 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
1024 * @retval None
1025 */
1026#define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\
1027 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\
1028 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\
1029 ((__INTERRUPT__) & UART_IT_MASK))): \
1030 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\
1031 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\
1032 ((__INTERRUPT__) & UART_IT_MASK))): \
1033 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\
1034 ((__INTERRUPT__) & UART_IT_MASK))))
1035
1036/** @brief Check whether the specified UART interrupt has occurred or not.
1037 * @param __HANDLE__ specifies the UART Handle.
1038 * @param __INTERRUPT__ specifies the UART interrupt to check.
1039 * This parameter can be one of the following values:
1040 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
1041 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
1042 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
1043 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
1044 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
1045 * @arg @ref UART_IT_CM Character match interrupt
1046 * @arg @ref UART_IT_CTS CTS change interrupt
1047 * @arg @ref UART_IT_LBD LIN Break detection interrupt
1048 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
1049 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
1050 * @arg @ref UART_IT_TC Transmission complete interrupt
1051 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
1052 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
1053 * @arg @ref UART_IT_RTO Receive Timeout interrupt
1054 * @arg @ref UART_IT_IDLE Idle line detection interrupt
1055 * @arg @ref UART_IT_PE Parity Error interrupt
1056 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
1057 * @retval The new state of __INTERRUPT__ (SET or RESET).
1058 */
1059#define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\
1060 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET)
1061
1062/** @brief Check whether the specified UART interrupt source is enabled or not.
1063 * @param __HANDLE__ specifies the UART Handle.
1064 * @param __INTERRUPT__ specifies the UART interrupt source to check.
1065 * This parameter can be one of the following values:
1066 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
1067 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
1068 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
1069 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
1070 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
1071 * @arg @ref UART_IT_CM Character match interrupt
1072 * @arg @ref UART_IT_CTS CTS change interrupt
1073 * @arg @ref UART_IT_LBD LIN Break detection interrupt
1074 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
1075 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
1076 * @arg @ref UART_IT_TC Transmission complete interrupt
1077 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
1078 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
1079 * @arg @ref UART_IT_RTO Receive Timeout interrupt
1080 * @arg @ref UART_IT_IDLE Idle line detection interrupt
1081 * @arg @ref UART_IT_PE Parity Error interrupt
1082 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
1083 * @retval The new state of __INTERRUPT__ (SET or RESET).
1084 */
1085#define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\
1086 (__HANDLE__)->Instance->CR1 : \
1087 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\
1088 (__HANDLE__)->Instance->CR2 : \
1089 (__HANDLE__)->Instance->CR3)) & (1U <<\
1090 (((uint16_t)(__INTERRUPT__)) &\
1091 UART_IT_MASK))) != RESET) ? SET : RESET)
1092
1093/** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag.
1094 * @param __HANDLE__ specifies the UART Handle.
1095 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
1096 * to clear the corresponding interrupt
1097 * This parameter can be one of the following values:
1098 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
1099 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
1100 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
1101 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
1102 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
1103 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag
1104 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag
1105 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
1106 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
1107 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
1108 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
1109 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
1110 * @retval None
1111 */
1112#define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
1113
1114/** @brief Set a specific UART request flag.
1115 * @param __HANDLE__ specifies the UART Handle.
1116 * @param __REQ__ specifies the request flag to set
1117 * This parameter can be one of the following values:
1118 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
1119 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request
1120 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
1121 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
1122 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request
1123 * @retval None
1124 */
1125#define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
1126
1127/** @brief Enable the UART one bit sample method.
1128 * @param __HANDLE__ specifies the UART Handle.
1129 * @retval None
1130 */
1131#define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
1132
1133/** @brief Disable the UART one bit sample method.
1134 * @param __HANDLE__ specifies the UART Handle.
1135 * @retval None
1136 */
1137#define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT)
1138
1139/** @brief Enable UART.
1140 * @param __HANDLE__ specifies the UART Handle.
1141 * @retval None
1142 */
1143#define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
1144
1145/** @brief Disable UART.
1146 * @param __HANDLE__ specifies the UART Handle.
1147 * @retval None
1148 */
1149#define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
1150
1151/** @brief Enable CTS flow control.
1152 * @note This macro allows to enable CTS hardware flow control for a given UART instance,
1153 * without need to call HAL_UART_Init() function.
1154 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1155 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
1156 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1157 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1158 * - macro could only be called when corresponding UART instance is disabled
1159 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable
1160 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1161 * @param __HANDLE__ specifies the UART Handle.
1162 * @retval None
1163 */
1164#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
1165 do{ \
1166 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1167 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
1168 } while(0U)
1169
1170/** @brief Disable CTS flow control.
1171 * @note This macro allows to disable CTS hardware flow control for a given UART instance,
1172 * without need to call HAL_UART_Init() function.
1173 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1174 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
1175 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1176 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1177 * - macro could only be called when corresponding UART instance is disabled
1178 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable
1179 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1180 * @param __HANDLE__ specifies the UART Handle.
1181 * @retval None
1182 */
1183#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
1184 do{ \
1185 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1186 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
1187 } while(0U)
1188
1189/** @brief Enable RTS flow control.
1190 * @note This macro allows to enable RTS hardware flow control for a given UART instance,
1191 * without need to call HAL_UART_Init() function.
1192 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1193 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
1194 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1195 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1196 * - macro could only be called when corresponding UART instance is disabled
1197 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable
1198 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1199 * @param __HANDLE__ specifies the UART Handle.
1200 * @retval None
1201 */
1202#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
1203 do{ \
1204 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
1205 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
1206 } while(0U)
1207
1208/** @brief Disable RTS flow control.
1209 * @note This macro allows to disable RTS hardware flow control for a given UART instance,
1210 * without need to call HAL_UART_Init() function.
1211 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1212 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
1213 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1214 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1215 * - macro could only be called when corresponding UART instance is disabled
1216 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable
1217 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1218 * @param __HANDLE__ specifies the UART Handle.
1219 * @retval None
1220 */
1221#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
1222 do{ \
1223 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
1224 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
1225 } while(0U)
1226/**
1227 * @}
1228 */
1229
1230/* Private macros --------------------------------------------------------*/
1231/** @defgroup UART_Private_Macros UART Private Macros
1232 * @{
1233 */
1234/** @brief Get UART clock division factor from clock prescaler value.
1235 * @param __CLOCKPRESCALER__ UART prescaler value.
1236 * @retval UART clock division factor
1237 */
1238#define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \
1239 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \
1240 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \
1241 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \
1242 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \
1243 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \
1244 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \
1245 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \
1246 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \
1247 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \
1248 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \
1249 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : 256U)
1250
1251/** @brief BRR division operation to set BRR register with LPUART.
1252 * @param __PCLK__ LPUART clock.
1253 * @param __BAUD__ Baud rate set by the user.
1254 * @param __CLOCKPRESCALER__ UART prescaler value.
1255 * @retval Division result
1256 */
1257#define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \
1258 ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \
1259 (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \
1260 )
1261
1262/** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
1263 * @param __PCLK__ UART clock.
1264 * @param __BAUD__ Baud rate set by the user.
1265 * @param __CLOCKPRESCALER__ UART prescaler value.
1266 * @retval Division result
1267 */
1268#define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \
1269 (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__))
1270
1271/** @brief BRR division operation to set BRR register in 16-bit oversampling mode.
1272 * @param __PCLK__ UART clock.
1273 * @param __BAUD__ Baud rate set by the user.
1274 * @param __CLOCKPRESCALER__ UART prescaler value.
1275 * @retval Division result
1276 */
1277#define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \
1278 ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__))
1279
1280/** @brief Check whether or not UART instance is Low Power UART.
1281 * @param __HANDLE__ specifies the UART Handle.
1282 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART)
1283 */
1284#define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance))
1285
1286/** @brief Check UART Baud rate.
1287 * @param __BAUDRATE__ Baudrate specified by the user.
1288 * The maximum Baud Rate is derived from the maximum clock on H7 (i.e. 100 MHz)
1289 * divided by the smallest oversampling used on the USART (i.e. 8)
1290 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
1291 */
1292#define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 12500000U)
1293
1294/** @brief Check UART assertion time.
1295 * @param __TIME__ 5-bit value assertion time.
1296 * @retval Test result (TRUE or FALSE).
1297 */
1298#define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
1299
1300/** @brief Check UART deassertion time.
1301 * @param __TIME__ 5-bit value deassertion time.
1302 * @retval Test result (TRUE or FALSE).
1303 */
1304#define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
1305
1306/**
1307 * @brief Ensure that UART frame number of stop bits is valid.
1308 * @param __STOPBITS__ UART frame number of stop bits.
1309 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
1310 */
1311#define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \
1312 ((__STOPBITS__) == UART_STOPBITS_1) || \
1313 ((__STOPBITS__) == UART_STOPBITS_1_5) || \
1314 ((__STOPBITS__) == UART_STOPBITS_2))
1315
1316/**
1317 * @brief Ensure that LPUART frame number of stop bits is valid.
1318 * @param __STOPBITS__ LPUART frame number of stop bits.
1319 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
1320 */
1321#define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \
1322 ((__STOPBITS__) == UART_STOPBITS_2))
1323
1324/**
1325 * @brief Ensure that UART frame parity is valid.
1326 * @param __PARITY__ UART frame parity.
1327 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
1328 */
1329#define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \
1330 ((__PARITY__) == UART_PARITY_EVEN) || \
1331 ((__PARITY__) == UART_PARITY_ODD))
1332
1333/**
1334 * @brief Ensure that UART hardware flow control is valid.
1335 * @param __CONTROL__ UART hardware flow control.
1336 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
1337 */
1338#define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
1339 (((__CONTROL__) == UART_HWCONTROL_NONE) || \
1340 ((__CONTROL__) == UART_HWCONTROL_RTS) || \
1341 ((__CONTROL__) == UART_HWCONTROL_CTS) || \
1342 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
1343
1344/**
1345 * @brief Ensure that UART communication mode is valid.
1346 * @param __MODE__ UART communication mode.
1347 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1348 */
1349#define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U))
1350
1351/**
1352 * @brief Ensure that UART state is valid.
1353 * @param __STATE__ UART state.
1354 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
1355 */
1356#define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \
1357 ((__STATE__) == UART_STATE_ENABLE))
1358
1359/**
1360 * @brief Ensure that UART oversampling is valid.
1361 * @param __SAMPLING__ UART oversampling.
1362 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
1363 */
1364#define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \
1365 ((__SAMPLING__) == UART_OVERSAMPLING_8))
1366
1367/**
1368 * @brief Ensure that UART frame sampling is valid.
1369 * @param __ONEBIT__ UART frame sampling.
1370 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
1371 */
1372#define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \
1373 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
1374
1375/**
1376 * @brief Ensure that UART auto Baud rate detection mode is valid.
1377 * @param __MODE__ UART auto Baud rate detection mode.
1378 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1379 */
1380#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
1381 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
1382 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \
1383 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
1384
1385/**
1386 * @brief Ensure that UART receiver timeout setting is valid.
1387 * @param __TIMEOUT__ UART receiver timeout setting.
1388 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
1389 */
1390#define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \
1391 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
1392
1393/** @brief Check the receiver timeout value.
1394 * @note The maximum UART receiver timeout value is 0xFFFFFF.
1395 * @param __TIMEOUTVALUE__ receiver timeout value.
1396 * @retval Test result (TRUE or FALSE)
1397 */
1398#define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU)
1399
1400/**
1401 * @brief Ensure that UART LIN state is valid.
1402 * @param __LIN__ UART LIN state.
1403 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
1404 */
1405#define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \
1406 ((__LIN__) == UART_LIN_ENABLE))
1407
1408/**
1409 * @brief Ensure that UART LIN break detection length is valid.
1410 * @param __LENGTH__ UART LIN break detection length.
1411 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
1412 */
1413#define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \
1414 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
1415
1416/**
1417 * @brief Ensure that UART DMA TX state is valid.
1418 * @param __DMATX__ UART DMA TX state.
1419 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
1420 */
1421#define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \
1422 ((__DMATX__) == UART_DMA_TX_ENABLE))
1423
1424/**
1425 * @brief Ensure that UART DMA RX state is valid.
1426 * @param __DMARX__ UART DMA RX state.
1427 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
1428 */
1429#define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \
1430 ((__DMARX__) == UART_DMA_RX_ENABLE))
1431
1432/**
1433 * @brief Ensure that UART half-duplex state is valid.
1434 * @param __HDSEL__ UART half-duplex state.
1435 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
1436 */
1437#define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \
1438 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
1439
1440/**
1441 * @brief Ensure that UART wake-up method is valid.
1442 * @param __WAKEUP__ UART wake-up method .
1443 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
1444 */
1445#define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \
1446 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
1447
1448/**
1449 * @brief Ensure that UART request parameter is valid.
1450 * @param __PARAM__ UART request parameter.
1451 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
1452 */
1453#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \
1454 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \
1455 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \
1456 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \
1457 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
1458
1459/**
1460 * @brief Ensure that UART advanced features initialization is valid.
1461 * @param __INIT__ UART advanced features initialization.
1462 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
1463 */
1464#define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \
1465 UART_ADVFEATURE_TXINVERT_INIT | \
1466 UART_ADVFEATURE_RXINVERT_INIT | \
1467 UART_ADVFEATURE_DATAINVERT_INIT | \
1468 UART_ADVFEATURE_SWAP_INIT | \
1469 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \
1470 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
1471 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \
1472 UART_ADVFEATURE_MSBFIRST_INIT))
1473
1474/**
1475 * @brief Ensure that UART frame TX inversion setting is valid.
1476 * @param __TXINV__ UART frame TX inversion setting.
1477 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
1478 */
1479#define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \
1480 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
1481
1482/**
1483 * @brief Ensure that UART frame RX inversion setting is valid.
1484 * @param __RXINV__ UART frame RX inversion setting.
1485 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
1486 */
1487#define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \
1488 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
1489
1490/**
1491 * @brief Ensure that UART frame data inversion setting is valid.
1492 * @param __DATAINV__ UART frame data inversion setting.
1493 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
1494 */
1495#define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \
1496 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
1497
1498/**
1499 * @brief Ensure that UART frame RX/TX pins swap setting is valid.
1500 * @param __SWAP__ UART frame RX/TX pins swap setting.
1501 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
1502 */
1503#define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \
1504 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
1505
1506/**
1507 * @brief Ensure that UART frame overrun setting is valid.
1508 * @param __OVERRUN__ UART frame overrun setting.
1509 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
1510 */
1511#define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
1512 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
1513
1514/**
1515 * @brief Ensure that UART auto Baud rate state is valid.
1516 * @param __AUTOBAUDRATE__ UART auto Baud rate state.
1517 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
1518 */
1519#define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \
1520 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
1521 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
1522
1523/**
1524 * @brief Ensure that UART DMA enabling or disabling on error setting is valid.
1525 * @param __DMA__ UART DMA enabling or disabling on error setting.
1526 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
1527 */
1528#define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
1529 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
1530
1531/**
1532 * @brief Ensure that UART frame MSB first setting is valid.
1533 * @param __MSBFIRST__ UART frame MSB first setting.
1534 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
1535 */
1536#define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
1537 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
1538
1539/**
1540 * @brief Ensure that UART stop mode state is valid.
1541 * @param __STOPMODE__ UART stop mode state.
1542 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
1543 */
1544#define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
1545 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
1546
1547/**
1548 * @brief Ensure that UART mute mode state is valid.
1549 * @param __MUTE__ UART mute mode state.
1550 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
1551 */
1552#define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
1553 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
1554
1555/**
1556 * @brief Ensure that UART wake-up selection is valid.
1557 * @param __WAKE__ UART wake-up selection.
1558 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
1559 */
1560#define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \
1561 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \
1562 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
1563
1564/**
1565 * @brief Ensure that UART driver enable polarity is valid.
1566 * @param __POLARITY__ UART driver enable polarity.
1567 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
1568 */
1569#define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \
1570 ((__POLARITY__) == UART_DE_POLARITY_LOW))
1571
1572/**
1573 * @brief Ensure that UART Prescaler is valid.
1574 * @param __CLOCKPRESCALER__ UART Prescaler value.
1575 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid)
1576 */
1577#define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \
1578 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \
1579 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \
1580 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \
1581 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \
1582 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \
1583 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \
1584 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \
1585 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \
1586 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \
1587 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \
1588 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256))
1589
1590/**
1591 * @}
1592 */
1593
1594/* Include UART HAL Extended module */
1595#include "stm32h7xx_hal_uart_ex.h"
1596
1597/* Exported functions --------------------------------------------------------*/
1598/** @addtogroup UART_Exported_Functions UART Exported Functions
1599 * @{
1600 */
1601
1602/** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
1603 * @{
1604 */
1605
1606/* Initialization and de-initialization functions ****************************/
1607HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
1608HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
1609HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
1610HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
1611HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart);
1612void HAL_UART_MspInit(UART_HandleTypeDef *huart);
1613void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
1614
1615/* Callbacks Register/UnRegister functions ***********************************/
1616#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
1617HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
1618 pUART_CallbackTypeDef pCallback);
1619HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID);
1620
1621HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback);
1622HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart);
1623#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1624
1625/**
1626 * @}
1627 */
1628
1629/** @addtogroup UART_Exported_Functions_Group2 IO operation functions
1630 * @{
1631 */
1632
1633/* IO operation functions *****************************************************/
1634HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
1635HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
1636HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
1637HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1638HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
1639HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1640HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
1641HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
1642HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
1643/* Transfer Abort functions */
1644HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
1645HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
1646HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
1647HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
1648HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
1649HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
1650
1651void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
1652void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
1653void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
1654void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
1655void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
1656void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
1657void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart);
1658void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart);
1659void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart);
1660
1661void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size);
1662
1663/**
1664 * @}
1665 */
1666
1667/** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
1668 * @{
1669 */
1670
1671/* Peripheral Control functions ************************************************/
1672void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue);
1673HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart);
1674HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart);
1675
1676HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
1677HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
1678HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
1679void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
1680HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
1681HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
1682
1683/**
1684 * @}
1685 */
1686
1687/** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
1688 * @{
1689 */
1690
1691/* Peripheral State and Errors functions **************************************************/
1692HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart);
1693uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart);
1694
1695/**
1696 * @}
1697 */
1698
1699/**
1700 * @}
1701 */
1702
1703/* Private functions -----------------------------------------------------------*/
1704/** @addtogroup UART_Private_Functions UART Private Functions
1705 * @{
1706 */
1707#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
1708void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart);
1709#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1710HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
1711HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
1712HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
1713 uint32_t Tickstart, uint32_t Timeout);
1714void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
1715HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1716HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1717
1718/**
1719 * @}
1720 */
1721
1722/* Private variables -----------------------------------------------------------*/
1723/** @defgroup UART_Private_variables UART Private variables
1724 * @{
1725 */
1726/* Prescaler Table used in BRR computation macros.
1727 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */
1728extern const uint16_t UARTPrescTable[12];
1729/**
1730 * @}
1731 */
1732
1733/**
1734 * @}
1735 */
1736
1737/**
1738 * @}
1739 */
1740
1741#ifdef __cplusplus
1742}
1743#endif
1744
1745#endif /* STM32H7xx_HAL_UART_H */
1746
__IO
#define __IO
Defines 'read / write' permissions.
Definition core_armv81mml.h:290
DMA_HandleTypeDef
struct __DMA_HandleTypeDef DMA_HandleTypeDef
DMA handle Structure definition.
FlagStatus
FlagStatus
Definition stm32h7xx.h:181
HAL_UART_MspInit
void HAL_UART_MspInit(UART_HandleTypeDef *huart)
UART MSP Initialization This function configures the hardware resources used in this example.
Definition stm32h7xx_hal_msp.c:879
HAL_LIN_Init
HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
HAL_UART_MspDeInit
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
UART MSP De-Initialization This function freeze the hardware resources used in this example.
Definition stm32h7xx_hal_msp.c:930
HAL_UART_DeInit
HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
HAL_HalfDuplex_Init
HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
HAL_MultiProcessor_Init
HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
HAL_UART_Init
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
HAL_UART_Transmit
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_UART_ErrorCallback
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
Definition board_uart9.c:98
HAL_UART_AbortReceiveCpltCallback
void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart)
HAL_UART_AbortTransmit_IT
HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
HAL_UART_RxHalfCpltCallback
void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
HAL_UART_Abort
HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
HAL_UART_Abort_IT
HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
HAL_UART_TxHalfCpltCallback
void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
HAL_UART_AbortTransmit
HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
HAL_UART_Transmit_IT
HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
HAL_UART_Transmit_DMA
HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size)
HAL_UART_DMAPause
HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
HAL_UARTEx_RxEventCallback
void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
Definition board_uart9.c:78
HAL_UART_AbortReceive
HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
HAL_UART_IRQHandler
void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
HAL_UART_AbortReceive_IT
HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
HAL_UART_DMAStop
HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
HAL_UART_Receive
HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
HAL_UART_TxCpltCallback
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
HAL_UART_AbortCpltCallback
void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart)
HAL_UART_AbortTransmitCpltCallback
void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart)
HAL_UART_Receive_DMA
HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
HAL_UART_Receive_IT
HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
HAL_UART_RxCpltCallback
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
HAL_UART_DMAResume
HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
HAL_HalfDuplex_EnableReceiver
HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
HAL_HalfDuplex_EnableTransmitter
HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
HAL_MultiProcessor_DisableMuteMode
HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
HAL_MultiProcessor_EnterMuteMode
void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
HAL_UART_DisableReceiverTimeout
HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart)
HAL_UART_EnableReceiverTimeout
HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart)
HAL_MultiProcessor_EnableMuteMode
HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
HAL_UART_ReceiverTimeout_Config
void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue)
HAL_LIN_SendBreak
HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
HAL_UART_GetError
uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart)
HAL_UART_GetState
HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart)
UART_HandleTypeDef
struct __UART_HandleTypeDef UART_HandleTypeDef
UART handle Structure definition.
HAL_UART_StateTypeDef
uint32_t HAL_UART_StateTypeDef
HAL UART State definition.
Definition stm32h7xx_hal_uart.h:177
HAL_UART_RxTypeTypeDef
uint32_t HAL_UART_RxTypeTypeDef
HAL UART Reception type definition.
Definition stm32h7xx_hal_uart.h:204
UART_ClockSourceTypeDef
UART_ClockSourceTypeDef
UART clock sources definition.
Definition stm32h7xx_hal_uart.h:183
HAL_UART_RxEventTypeTypeDef
uint32_t HAL_UART_RxEventTypeTypeDef
HAL UART Rx Event type definition.
Definition stm32h7xx_hal_uart.h:215
UART_CLOCKSOURCE_PLL3
@ UART_CLOCKSOURCE_PLL3
PLL3Q clock source.
Definition stm32h7xx_hal_uart.h:188
UART_CLOCKSOURCE_D2PCLK2
@ UART_CLOCKSOURCE_D2PCLK2
Domain2 PCLK2 clock source.
Definition stm32h7xx_hal_uart.h:185
UART_CLOCKSOURCE_PLL2
@ UART_CLOCKSOURCE_PLL2
PLL2Q clock source.
Definition stm32h7xx_hal_uart.h:187
UART_CLOCKSOURCE_D3PCLK1
@ UART_CLOCKSOURCE_D3PCLK1
Domain3 PCLK1 clock source.
Definition stm32h7xx_hal_uart.h:186
UART_CLOCKSOURCE_CSI
@ UART_CLOCKSOURCE_CSI
CSI clock source.
Definition stm32h7xx_hal_uart.h:190
UART_CLOCKSOURCE_UNDEFINED
@ UART_CLOCKSOURCE_UNDEFINED
Undefined clock source.
Definition stm32h7xx_hal_uart.h:192
UART_CLOCKSOURCE_LSE
@ UART_CLOCKSOURCE_LSE
LSE clock source.
Definition stm32h7xx_hal_uart.h:191
UART_CLOCKSOURCE_D2PCLK1
@ UART_CLOCKSOURCE_D2PCLK1
Domain2 PCLK1 clock source.
Definition stm32h7xx_hal_uart.h:184
UART_CLOCKSOURCE_HSI
@ UART_CLOCKSOURCE_HSI
HSI clock source.
Definition stm32h7xx_hal_uart.h:189
UART_Start_Receive_DMA
HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
UART_SetConfig
HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
UART_Start_Receive_IT
HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
UART_AdvFeatureConfig
void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
UART_WaitOnFlagUntilTimeout
HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
UART_CheckIdleState
HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
UARTPrescTable
const uint16_t UARTPrescTable[12]
stm32h7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition stm32h7xx_hal_def.h:40
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition.
Definition stm32h7xx_hal_def.h:51
stm32h7xx_hal_uart_ex.h
Header file of UART HAL Extended module.
UART_AdvFeatureInitTypeDef
UART Advanced Features initialization structure definition.
Definition stm32h7xx_hal_uart.h:101
UART_AdvFeatureInitTypeDef::Swap
uint32_t Swap
Specifies whether TX and RX pins are swapped.
Definition stm32h7xx_hal_uart.h:117
UART_AdvFeatureInitTypeDef::AutoBaudRateMode
uint32_t AutoBaudRateMode
If auto Baud rate detection is enabled, specifies how the rate detection is carried out.
Definition stm32h7xx_hal_uart.h:129
UART_AdvFeatureInitTypeDef::AdvFeatureInit
uint32_t AdvFeatureInit
Specifies which advanced UART features is initialized.
Definition stm32h7xx_hal_uart.h:102
UART_AdvFeatureInitTypeDef::DMADisableonRxError
uint32_t DMADisableonRxError
Specifies whether the DMA is disabled in case of reception error.
Definition stm32h7xx_hal_uart.h:123
UART_AdvFeatureInitTypeDef::MSBFirst
uint32_t MSBFirst
Specifies whether MSB is sent first on UART line.
Definition stm32h7xx_hal_uart.h:133
UART_AdvFeatureInitTypeDef::RxPinLevelInvert
uint32_t RxPinLevelInvert
Specifies whether the RX pin active level is inverted.
Definition stm32h7xx_hal_uart.h:110
UART_AdvFeatureInitTypeDef::AutoBaudRateEnable
uint32_t AutoBaudRateEnable
Specifies whether auto Baud rate detection is enabled.
Definition stm32h7xx_hal_uart.h:126
UART_AdvFeatureInitTypeDef::TxPinLevelInvert
uint32_t TxPinLevelInvert
Specifies whether the TX pin active level is inverted.
Definition stm32h7xx_hal_uart.h:107
UART_AdvFeatureInitTypeDef::DataInvert
uint32_t DataInvert
Specifies whether data are inverted (positive/direct logic vs negative/inverted logic).
Definition stm32h7xx_hal_uart.h:113
UART_AdvFeatureInitTypeDef::OverrunDisable
uint32_t OverrunDisable
Specifies whether the reception overrun detection is disabled.
Definition stm32h7xx_hal_uart.h:120
UART_InitTypeDef
UART Init Structure definition.
Definition stm32h7xx_hal_uart.h:47
UART_InitTypeDef::WordLength
uint32_t WordLength
Specifies the number of data bits transmitted or received in a frame.
Definition stm32h7xx_hal_uart.h:64
UART_InitTypeDef::OneBitSampling
uint32_t OneBitSampling
Specifies whether a single sample or three samples' majority vote is selected.
Definition stm32h7xx_hal_uart.h:88
UART_InitTypeDef::StopBits
uint32_t StopBits
Specifies the number of stop bits transmitted.
Definition stm32h7xx_hal_uart.h:67
UART_InitTypeDef::OverSampling
uint32_t OverSampling
Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8...
Definition stm32h7xx_hal_uart.h:84
UART_InitTypeDef::Mode
uint32_t Mode
Specifies whether the Receive or Transmit mode is enabled or disabled.
Definition stm32h7xx_hal_uart.h:77
UART_InitTypeDef::HwFlowCtl
uint32_t HwFlowCtl
Specifies whether the hardware flow control mode is enabled or disabled.
Definition stm32h7xx_hal_uart.h:80
UART_InitTypeDef::Parity
uint32_t Parity
Specifies the parity mode.
Definition stm32h7xx_hal_uart.h:70
UART_InitTypeDef::BaudRate
uint32_t BaudRate
This member configures the UART communication baud rate.
Definition stm32h7xx_hal_uart.h:48
UART_InitTypeDef::ClockPrescaler
uint32_t ClockPrescaler
Specifies the prescaler value used to divide the UART clock source.
Definition stm32h7xx_hal_uart.h:92
USART_TypeDef
Universal Synchronous Asynchronous Receiver Transmitter.
Definition stm32h723xx.h:1596
__UART_HandleTypeDef
UART handle Structure definition.
Definition stm32h7xx_hal_uart.h:221
__UART_HandleTypeDef::RxEventType
__IO HAL_UART_RxEventTypeTypeDef RxEventType
Type of Rx Event.
Definition stm32h7xx_hal_uart.h:251
__UART_HandleTypeDef::ErrorCode
__IO uint32_t ErrorCode
UART Error code.
Definition stm32h7xx_hal_uart.h:270
__UART_HandleTypeDef::RxXferCount
__IO uint16_t RxXferCount
UART Rx Transfer Counter.
Definition stm32h7xx_hal_uart.h:238
__UART_HandleTypeDef::gState
__IO HAL_UART_StateTypeDef gState
UART state information related to global Handle management and also related to Tx operations.
Definition stm32h7xx_hal_uart.h:263
__UART_HandleTypeDef::RxState
__IO HAL_UART_StateTypeDef RxState
UART state information related to Rx operations.
Definition stm32h7xx_hal_uart.h:267
__UART_HandleTypeDef::TxXferSize
uint16_t TxXferSize
UART Tx Transfer size.
Definition stm32h7xx_hal_uart.h:230
__UART_HandleTypeDef::Lock
HAL_LockTypeDef Lock
Locking object.
Definition stm32h7xx_hal_uart.h:261
__UART_HandleTypeDef::TxISR
void(* TxISR)(struct __UART_HandleTypeDef *huart)
Function pointer on Tx IRQ handler.
Definition stm32h7xx_hal_uart.h:255
__UART_HandleTypeDef::pRxBuffPtr
uint8_t * pRxBuffPtr
Pointer to UART Rx transfer Buffer.
Definition stm32h7xx_hal_uart.h:234
__UART_HandleTypeDef::Mask
uint16_t Mask
UART Rx RDR register mask.
Definition stm32h7xx_hal_uart.h:240
__UART_HandleTypeDef::Init
UART_InitTypeDef Init
UART communication parameters.
Definition stm32h7xx_hal_uart.h:224
__UART_HandleTypeDef::TxXferCount
__IO uint16_t TxXferCount
UART Tx Transfer Counter.
Definition stm32h7xx_hal_uart.h:232
__UART_HandleTypeDef::RxISR
void(* RxISR)(struct __UART_HandleTypeDef *huart)
Function pointer on Rx IRQ handler.
Definition stm32h7xx_hal_uart.h:253
__UART_HandleTypeDef::AdvancedInit
UART_AdvFeatureInitTypeDef AdvancedInit
UART Advanced Features initialization parameters.
Definition stm32h7xx_hal_uart.h:226
__UART_HandleTypeDef::hdmarx
DMA_HandleTypeDef * hdmarx
UART Rx DMA Handle parameters.
Definition stm32h7xx_hal_uart.h:259
__UART_HandleTypeDef::Instance
USART_TypeDef * Instance
UART registers base address.
Definition stm32h7xx_hal_uart.h:222
__UART_HandleTypeDef::FifoMode
uint32_t FifoMode
Specifies if the FIFO mode is being used.
Definition stm32h7xx_hal_uart.h:242
__UART_HandleTypeDef::pTxBuffPtr
const uint8_t * pTxBuffPtr
Pointer to UART Tx transfer Buffer.
Definition stm32h7xx_hal_uart.h:228
__UART_HandleTypeDef::NbRxDataToProcess
uint16_t NbRxDataToProcess
Number of data to process during RX ISR execution.
Definition stm32h7xx_hal_uart.h:245
__UART_HandleTypeDef::ReceptionType
__IO HAL_UART_RxTypeTypeDef ReceptionType
Type of ongoing reception.
Definition stm32h7xx_hal_uart.h:249
__UART_HandleTypeDef::RxXferSize
uint16_t RxXferSize
UART Rx Transfer size.
Definition stm32h7xx_hal_uart.h:236
__UART_HandleTypeDef::NbTxDataToProcess
uint16_t NbTxDataToProcess
Number of data to process during TX ISR execution.
Definition stm32h7xx_hal_uart.h:247
__UART_HandleTypeDef::hdmatx
DMA_HandleTypeDef * hdmatx
UART Tx DMA Handle parameters.
Definition stm32h7xx_hal_uart.h:257