Debug MCU. More...

#include <stm32h723xx.h>

Public Attributes
__IO uint32_t	IDCODE
	MCU device ID code, Address offset: 0x00.
__IO uint32_t	CR
	Debug MCU configuration register, Address offset: 0x04.
uint32_t	RESERVED4 [11]
	Reserved, Address offset: 0x08.
__IO uint32_t	APB3FZ1
	Debug MCU APB3FZ1 freeze register, Address offset: 0x34.
uint32_t	RESERVED5
	Reserved, Address offset: 0x38.
__IO uint32_t	APB1LFZ1
	Debug MCU APB1LFZ1 freeze register, Address offset: 0x3C.
uint32_t	RESERVED6
	Reserved, Address offset: 0x40.
__IO uint32_t	APB1HFZ1
	Debug MCU APB1LFZ1 freeze register, Address offset: 0x44.
uint32_t	RESERVED7
	Reserved, Address offset: 0x48.
__IO uint32_t	APB2FZ1
	Debug MCU APB2FZ1 freeze register, Address offset: 0x4C.
uint32_t	RESERVED8
	Reserved, Address offset: 0x50.
__IO uint32_t	APB4FZ1
	Debug MCU APB4FZ1 freeze register, Address offset: 0x54.
__IO uint32_t	RESERVED9 [990]
	Reserved, Address offset: 0x58-0xFCC.
__IO uint32_t	PIDR4
	Debug MCU peripheral identity register 4, Address offset: 0xFD0.
__IO uint32_t	RESERVED10 [3]
	Reserved, Address offset: 0xFD4-0xFDC.
__IO uint32_t	PIDR0
	Debug MCU peripheral identity register 0, Address offset: 0xFE0.
__IO uint32_t	PIDR1
	Debug MCU peripheral identity register 1, Address offset: 0xFE4.
__IO uint32_t	PIDR2
	Debug MCU peripheral identity register 2, Address offset: 0xFE8.
__IO uint32_t	PIDR3
	Debug MCU peripheral identity register 3, Address offset: 0xFEC.
__IO uint32_t	CIDR0
	Debug MCU component identity register 0, Address offset: 0xFF0.
__IO uint32_t	CIDR1
	Debug MCU component identity register 1, Address offset: 0xFF4.
__IO uint32_t	CIDR2
	Debug MCU component identity register 2, Address offset: 0xFF8.
__IO uint32_t	CIDR3
	Debug MCU component identity register 3, Address offset: 0xFFC.

Detailed Description

Debug MCU.

Definition at line 530 of file stm32h723xx.h.

Member Data Documentation

◆ APB1HFZ1

__IO uint32_t DBGMCU_TypeDef::APB1HFZ1

Debug MCU APB1LFZ1 freeze register, Address offset: 0x44.

Definition at line 539 of file stm32h723xx.h.

◆ APB1LFZ1

__IO uint32_t DBGMCU_TypeDef::APB1LFZ1

Debug MCU APB1LFZ1 freeze register, Address offset: 0x3C.

Definition at line 537 of file stm32h723xx.h.

◆ APB2FZ1

__IO uint32_t DBGMCU_TypeDef::APB2FZ1

Debug MCU APB2FZ1 freeze register, Address offset: 0x4C.

Definition at line 541 of file stm32h723xx.h.

◆ APB3FZ1

__IO uint32_t DBGMCU_TypeDef::APB3FZ1

Debug MCU APB3FZ1 freeze register, Address offset: 0x34.

Definition at line 535 of file stm32h723xx.h.

◆ APB4FZ1

__IO uint32_t DBGMCU_TypeDef::APB4FZ1

Debug MCU APB4FZ1 freeze register, Address offset: 0x54.

Definition at line 543 of file stm32h723xx.h.

◆ CIDR0

__IO uint32_t DBGMCU_TypeDef::CIDR0

Debug MCU component identity register 0, Address offset: 0xFF0.

Definition at line 551 of file stm32h723xx.h.

◆ CIDR1

__IO uint32_t DBGMCU_TypeDef::CIDR1

Debug MCU component identity register 1, Address offset: 0xFF4.

Definition at line 552 of file stm32h723xx.h.

◆ CIDR2

__IO uint32_t DBGMCU_TypeDef::CIDR2

Debug MCU component identity register 2, Address offset: 0xFF8.

Definition at line 553 of file stm32h723xx.h.

◆ CIDR3

__IO uint32_t DBGMCU_TypeDef::CIDR3

Debug MCU component identity register 3, Address offset: 0xFFC.

Definition at line 554 of file stm32h723xx.h.

◆ CR

__IO uint32_t DBGMCU_TypeDef::CR

Debug MCU configuration register, Address offset: 0x04.

Definition at line 533 of file stm32h723xx.h.

◆ IDCODE

__IO uint32_t DBGMCU_TypeDef::IDCODE

MCU device ID code, Address offset: 0x00.

Definition at line 532 of file stm32h723xx.h.

◆ PIDR0

__IO uint32_t DBGMCU_TypeDef::PIDR0

Debug MCU peripheral identity register 0, Address offset: 0xFE0.

Definition at line 547 of file stm32h723xx.h.

◆ PIDR1

__IO uint32_t DBGMCU_TypeDef::PIDR1

Debug MCU peripheral identity register 1, Address offset: 0xFE4.

Definition at line 548 of file stm32h723xx.h.

◆ PIDR2

__IO uint32_t DBGMCU_TypeDef::PIDR2

Debug MCU peripheral identity register 2, Address offset: 0xFE8.

Definition at line 549 of file stm32h723xx.h.

◆ PIDR3

__IO uint32_t DBGMCU_TypeDef::PIDR3

Debug MCU peripheral identity register 3, Address offset: 0xFEC.

Definition at line 550 of file stm32h723xx.h.

◆ PIDR4

__IO uint32_t DBGMCU_TypeDef::PIDR4

Debug MCU peripheral identity register 4, Address offset: 0xFD0.

Definition at line 545 of file stm32h723xx.h.

◆ RESERVED10

__IO uint32_t DBGMCU_TypeDef::RESERVED10[3]

Reserved, Address offset: 0xFD4-0xFDC.

Definition at line 546 of file stm32h723xx.h.

◆ RESERVED4

uint32_t DBGMCU_TypeDef::RESERVED4[11]

Reserved, Address offset: 0x08.

Definition at line 534 of file stm32h723xx.h.

◆ RESERVED5

uint32_t DBGMCU_TypeDef::RESERVED5

Reserved, Address offset: 0x38.

Definition at line 536 of file stm32h723xx.h.

◆ RESERVED6

uint32_t DBGMCU_TypeDef::RESERVED6

Reserved, Address offset: 0x40.

Definition at line 538 of file stm32h723xx.h.

◆ RESERVED7

uint32_t DBGMCU_TypeDef::RESERVED7

Reserved, Address offset: 0x48.

Definition at line 540 of file stm32h723xx.h.

◆ RESERVED8

uint32_t DBGMCU_TypeDef::RESERVED8

Reserved, Address offset: 0x50.

Definition at line 542 of file stm32h723xx.h.

◆ RESERVED9

__IO uint32_t DBGMCU_TypeDef::RESERVED9[990]

Reserved, Address offset: 0x58-0xFCC.

Definition at line 544 of file stm32h723xx.h.

The documentation for this struct was generated from the following file:

firmware/Flight_Computer/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h723xx.h

Public Attributes