DFSDM_Channel_TypeDef Struct Reference

DFSDM channel configuration registers. More...

#include <stm32h723xx.h>

Public Attributes
__IO uint32_t	CHCFGR1
	DFSDM channel configuration register1, Address offset: 0x00.
__IO uint32_t	CHCFGR2
	DFSDM channel configuration register2, Address offset: 0x04.
__IO uint32_t	CHAWSCDR
	DFSDM channel analog watchdog and short circuit detector register, Address offset: 0x08.
__IO uint32_t	CHWDATAR
	DFSDM channel watchdog filter data register, Address offset: 0x0C.
__IO uint32_t	CHDATINR
	DFSDM channel data input register, Address offset: 0x10.

Detailed Description

DFSDM channel configuration registers.

Definition at line 517 of file stm32h723xx.h.

Member Data Documentation

CHAWSCDR

__IO uint32_t DFSDM_Channel_TypeDef::CHAWSCDR

DFSDM channel analog watchdog and short circuit detector register, Address offset: 0x08.

Definition at line 521 of file stm32h723xx.h.

CHCFGR1

__IO uint32_t DFSDM_Channel_TypeDef::CHCFGR1

DFSDM channel configuration register1, Address offset: 0x00.

Definition at line 519 of file stm32h723xx.h.

CHCFGR2

__IO uint32_t DFSDM_Channel_TypeDef::CHCFGR2

DFSDM channel configuration register2, Address offset: 0x04.

Definition at line 520 of file stm32h723xx.h.

CHDATINR

__IO uint32_t DFSDM_Channel_TypeDef::CHDATINR

DFSDM channel data input register, Address offset: 0x10.

Definition at line 524 of file stm32h723xx.h.

CHWDATAR

__IO uint32_t DFSDM_Channel_TypeDef::CHWDATAR

DFSDM channel watchdog filter data register, Address offset: 0x0C.

Definition at line 523 of file stm32h723xx.h.

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The documentation for this struct was generated from the following file:

• firmware/Flight_Computer/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h723xx.h