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DTS_TypeDef Struct Reference

DTS. More...

#include <stm32h723xx.h>

Public Attributes

__IO uint32_t CFGR1
 DTS configuration register, Address offset: 0x00.
uint32_t RESERVED0
 Reserved, Address offset: 0x04.
__IO uint32_t T0VALR1
 DTS T0 Value register, Address offset: 0x08.
uint32_t RESERVED1
 Reserved, Address offset: 0x0C.
__IO uint32_t RAMPVALR
 DTS Ramp value register, Address offset: 0x10.
__IO uint32_t ITR1
 DTS Interrupt threshold register, Address offset: 0x14.
uint32_t RESERVED2
 Reserved, Address offset: 0x18.
__IO uint32_t DR
 DTS data register, Address offset: 0x1C.
__IO uint32_t SR
 DTS status register Address offset: 0x20.
__IO uint32_t ITENR
 DTS Interrupt enable register, Address offset: 0x24.
__IO uint32_t ICIFR
 DTS Clear Interrupt flag register, Address offset: 0x28.
__IO uint32_t OR
 DTS option register 1, Address offset: 0x2C.

Detailed Description

DTS.

Definition at line 1503 of file stm32h723xx.h.

Member Data Documentation

◆ CFGR1

__IO uint32_t DTS_TypeDef::CFGR1

DTS configuration register, Address offset: 0x00.

Definition at line 1505 of file stm32h723xx.h.

◆ DR

__IO uint32_t DTS_TypeDef::DR

DTS data register, Address offset: 0x1C.

Definition at line 1512 of file stm32h723xx.h.

◆ ICIFR

__IO uint32_t DTS_TypeDef::ICIFR

DTS Clear Interrupt flag register, Address offset: 0x28.

Definition at line 1515 of file stm32h723xx.h.

◆ ITENR

__IO uint32_t DTS_TypeDef::ITENR

DTS Interrupt enable register, Address offset: 0x24.

Definition at line 1514 of file stm32h723xx.h.

◆ ITR1

__IO uint32_t DTS_TypeDef::ITR1

DTS Interrupt threshold register, Address offset: 0x14.

Definition at line 1510 of file stm32h723xx.h.

◆ OR

__IO uint32_t DTS_TypeDef::OR

DTS option register 1, Address offset: 0x2C.

Definition at line 1516 of file stm32h723xx.h.

◆ RAMPVALR

__IO uint32_t DTS_TypeDef::RAMPVALR

DTS Ramp value register, Address offset: 0x10.

Definition at line 1509 of file stm32h723xx.h.

◆ RESERVED0

uint32_t DTS_TypeDef::RESERVED0

Reserved, Address offset: 0x04.

Definition at line 1506 of file stm32h723xx.h.

◆ RESERVED1

uint32_t DTS_TypeDef::RESERVED1

Reserved, Address offset: 0x0C.

Definition at line 1508 of file stm32h723xx.h.

◆ RESERVED2

uint32_t DTS_TypeDef::RESERVED2

Reserved, Address offset: 0x18.

Definition at line 1511 of file stm32h723xx.h.

◆ SR

__IO uint32_t DTS_TypeDef::SR

DTS status register Address offset: 0x20.

Definition at line 1513 of file stm32h723xx.h.

◆ T0VALR1

__IO uint32_t DTS_TypeDef::T0VALR1

DTS T0 Value register, Address offset: 0x08.

Definition at line 1507 of file stm32h723xx.h.


The documentation for this struct was generated from the following file:
  • firmware/Flight_Computer/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h723xx.h