This structure registers corresponds to EXTI_Typdef CPU1/CPU2 registers subset (IMRx, EMRx and PRx), allowing to define EXTI_D1/EXTI_D2 with rapid/common access to these IMRx, EMRx, PRx registers for CPU1 and CPU2. More...

#include <stm32h723xx.h>

Public Attributes
__IO uint32_t	IMR1
	EXTI Interrupt mask register, Address offset: 0x00.
__IO uint32_t	EMR1
	EXTI Event mask register, Address offset: 0x04.
__IO uint32_t	PR1
	EXTI Pending register, Address offset: 0x08.
uint32_t	RESERVED1
	Reserved, 0x0C.
__IO uint32_t	IMR2
	EXTI Interrupt mask register, Address offset: 0x10.
__IO uint32_t	EMR2
	EXTI Event mask register, Address offset: 0x14.
__IO uint32_t	PR2
	EXTI Pending register, Address offset: 0x18.
uint32_t	RESERVED2
	Reserved, 0x1C.
__IO uint32_t	IMR3
	EXTI Interrupt mask register, Address offset: 0x20.
__IO uint32_t	EMR3
	EXTI Event mask register, Address offset: 0x24.
__IO uint32_t	PR3
	EXTI Pending register, Address offset: 0x28.

Detailed Description

This structure registers corresponds to EXTI_Typdef CPU1/CPU2 registers subset (IMRx, EMRx and PRx), allowing to define EXTI_D1/EXTI_D2 with rapid/common access to these IMRx, EMRx, PRx registers for CPU1 and CPU2.

Note that EXTI_D1 and EXTI_D2 bases addresses are calculated to point to CPUx first register: IMR1 in case of EXTI_D1 that is addressing CPU1 (Cortex-M7) C2IMR1 in case of EXTI_D2 that is addressing CPU2 (Cortex-M4) Note: EXTI_D2 and corresponding C2IMRx, C2EMRx and C2PRx registers are available for Dual Core devices only

Definition at line 935 of file stm32h723xx.h.

Member Data Documentation

◆ EMR1

__IO uint32_t EXTI_Core_TypeDef::EMR1

EXTI Event mask register, Address offset: 0x04.

Definition at line 938 of file stm32h723xx.h.

◆ EMR2

__IO uint32_t EXTI_Core_TypeDef::EMR2

EXTI Event mask register, Address offset: 0x14.

Definition at line 942 of file stm32h723xx.h.

◆ EMR3

__IO uint32_t EXTI_Core_TypeDef::EMR3

EXTI Event mask register, Address offset: 0x24.

Definition at line 946 of file stm32h723xx.h.

◆ IMR1

__IO uint32_t EXTI_Core_TypeDef::IMR1

EXTI Interrupt mask register, Address offset: 0x00.

Definition at line 937 of file stm32h723xx.h.

◆ IMR2

__IO uint32_t EXTI_Core_TypeDef::IMR2

EXTI Interrupt mask register, Address offset: 0x10.

Definition at line 941 of file stm32h723xx.h.

◆ IMR3

__IO uint32_t EXTI_Core_TypeDef::IMR3

EXTI Interrupt mask register, Address offset: 0x20.

Definition at line 945 of file stm32h723xx.h.

◆ PR1

__IO uint32_t EXTI_Core_TypeDef::PR1

EXTI Pending register, Address offset: 0x08.

Definition at line 939 of file stm32h723xx.h.

◆ PR2

__IO uint32_t EXTI_Core_TypeDef::PR2

EXTI Pending register, Address offset: 0x18.

Definition at line 943 of file stm32h723xx.h.

◆ PR3

__IO uint32_t EXTI_Core_TypeDef::PR3

EXTI Pending register, Address offset: 0x28.

Definition at line 947 of file stm32h723xx.h.

◆ RESERVED1

uint32_t EXTI_Core_TypeDef::RESERVED1

Reserved, 0x0C.

Definition at line 940 of file stm32h723xx.h.

◆ RESERVED2

uint32_t EXTI_Core_TypeDef::RESERVED2

Reserved, 0x1C.

Definition at line 944 of file stm32h723xx.h.

The documentation for this struct was generated from the following file:

firmware/Flight_Computer/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h723xx.h

Public Attributes