STAR
Cal STAR — firmware, DAQ server, and engine design
Loading...
Searching...
No Matches
EXTI_TypeDef Struct Reference
CMSIS_Device » Stm32h723xx » Peripheral_registers_structures

External Interrupt/Event Controller. More...

#include <stm32h723xx.h>

Public Attributes

__IO uint32_t RTSR1
 EXTI Rising trigger selection register, Address offset: 0x00.
__IO uint32_t FTSR1
 EXTI Falling trigger selection register, Address offset: 0x04.
__IO uint32_t SWIER1
 EXTI Software interrupt event register, Address offset: 0x08.
__IO uint32_t D3PMR1
 EXTI D3 Pending mask register, (same register as to SRDPMR1) Address offset: 0x0C.
__IO uint32_t D3PCR1L
 EXTI D3 Pending clear selection register low, (same register as to SRDPCR1L) Address offset: 0x10.
__IO uint32_t D3PCR1H
 EXTI D3 Pending clear selection register High, (same register as to SRDPCR1H) Address offset: 0x14.
uint32_t RESERVED1 [2]
 Reserved, 0x18 to 0x1C.
__IO uint32_t RTSR2
 EXTI Rising trigger selection register, Address offset: 0x20.
__IO uint32_t FTSR2
 EXTI Falling trigger selection register, Address offset: 0x24.
__IO uint32_t SWIER2
 EXTI Software interrupt event register, Address offset: 0x28.
__IO uint32_t D3PMR2
 EXTI D3 Pending mask register, (same register as to SRDPMR2) Address offset: 0x2C.
__IO uint32_t D3PCR2L
 EXTI D3 Pending clear selection register low, (same register as to SRDPCR2L) Address offset: 0x30.
__IO uint32_t D3PCR2H
 EXTI D3 Pending clear selection register High, (same register as to SRDPCR2H) Address offset: 0x34.
uint32_t RESERVED2 [2]
 Reserved, 0x38 to 0x3C.
__IO uint32_t RTSR3
 EXTI Rising trigger selection register, Address offset: 0x40.
__IO uint32_t FTSR3
 EXTI Falling trigger selection register, Address offset: 0x44.
__IO uint32_t SWIER3
 EXTI Software interrupt event register, Address offset: 0x48.
__IO uint32_t D3PMR3
 EXTI D3 Pending mask register, (same register as to SRDPMR3) Address offset: 0x4C.
__IO uint32_t D3PCR3L
 EXTI D3 Pending clear selection register low, (same register as to SRDPCR3L) Address offset: 0x50.
__IO uint32_t D3PCR3H
 EXTI D3 Pending clear selection register High, (same register as to SRDPCR3H) Address offset: 0x54.
uint32_t RESERVED3 [10]
 Reserved, 0x58 to 0x7C.
__IO uint32_t IMR1
 EXTI Interrupt mask register, Address offset: 0x80.
__IO uint32_t EMR1
 EXTI Event mask register, Address offset: 0x84.
__IO uint32_t PR1
 EXTI Pending register, Address offset: 0x88.
uint32_t RESERVED4
 Reserved, 0x8C.
__IO uint32_t IMR2
 EXTI Interrupt mask register, Address offset: 0x90.
__IO uint32_t EMR2
 EXTI Event mask register, Address offset: 0x94.
__IO uint32_t PR2
 EXTI Pending register, Address offset: 0x98.
uint32_t RESERVED5
 Reserved, 0x9C.
__IO uint32_t IMR3
 EXTI Interrupt mask register, Address offset: 0xA0.
__IO uint32_t EMR3
 EXTI Event mask register, Address offset: 0xA4.
__IO uint32_t PR3
 EXTI Pending register, Address offset: 0xA8.

Detailed Description

External Interrupt/Event Controller.

Definition at line 890 of file stm32h723xx.h.

Member Data Documentation

◆ D3PCR1H

__IO uint32_t EXTI_TypeDef::D3PCR1H

EXTI D3 Pending clear selection register High, (same register as to SRDPCR1H) Address offset: 0x14.

Definition at line 897 of file stm32h723xx.h.

◆ D3PCR1L

__IO uint32_t EXTI_TypeDef::D3PCR1L

EXTI D3 Pending clear selection register low, (same register as to SRDPCR1L) Address offset: 0x10.

Definition at line 896 of file stm32h723xx.h.

◆ D3PCR2H

__IO uint32_t EXTI_TypeDef::D3PCR2H

EXTI D3 Pending clear selection register High, (same register as to SRDPCR2H) Address offset: 0x34.

Definition at line 904 of file stm32h723xx.h.

◆ D3PCR2L

__IO uint32_t EXTI_TypeDef::D3PCR2L

EXTI D3 Pending clear selection register low, (same register as to SRDPCR2L) Address offset: 0x30.

Definition at line 903 of file stm32h723xx.h.

◆ D3PCR3H

__IO uint32_t EXTI_TypeDef::D3PCR3H

EXTI D3 Pending clear selection register High, (same register as to SRDPCR3H) Address offset: 0x54.

Definition at line 911 of file stm32h723xx.h.

◆ D3PCR3L

__IO uint32_t EXTI_TypeDef::D3PCR3L

EXTI D3 Pending clear selection register low, (same register as to SRDPCR3L) Address offset: 0x50.

Definition at line 910 of file stm32h723xx.h.

◆ D3PMR1

__IO uint32_t EXTI_TypeDef::D3PMR1

EXTI D3 Pending mask register, (same register as to SRDPMR1) Address offset: 0x0C.

Definition at line 895 of file stm32h723xx.h.

◆ D3PMR2

__IO uint32_t EXTI_TypeDef::D3PMR2

EXTI D3 Pending mask register, (same register as to SRDPMR2) Address offset: 0x2C.

Definition at line 902 of file stm32h723xx.h.

◆ D3PMR3

__IO uint32_t EXTI_TypeDef::D3PMR3

EXTI D3 Pending mask register, (same register as to SRDPMR3) Address offset: 0x4C.

Definition at line 909 of file stm32h723xx.h.

◆ EMR1

__IO uint32_t EXTI_TypeDef::EMR1

EXTI Event mask register, Address offset: 0x84.

Definition at line 914 of file stm32h723xx.h.

◆ EMR2

__IO uint32_t EXTI_TypeDef::EMR2

EXTI Event mask register, Address offset: 0x94.

Definition at line 918 of file stm32h723xx.h.

◆ EMR3

__IO uint32_t EXTI_TypeDef::EMR3

EXTI Event mask register, Address offset: 0xA4.

Definition at line 922 of file stm32h723xx.h.

◆ FTSR1

__IO uint32_t EXTI_TypeDef::FTSR1

EXTI Falling trigger selection register, Address offset: 0x04.

Definition at line 893 of file stm32h723xx.h.

◆ FTSR2

__IO uint32_t EXTI_TypeDef::FTSR2

EXTI Falling trigger selection register, Address offset: 0x24.

Definition at line 900 of file stm32h723xx.h.

◆ FTSR3

__IO uint32_t EXTI_TypeDef::FTSR3

EXTI Falling trigger selection register, Address offset: 0x44.

Definition at line 907 of file stm32h723xx.h.

◆ IMR1

__IO uint32_t EXTI_TypeDef::IMR1

EXTI Interrupt mask register, Address offset: 0x80.

Definition at line 913 of file stm32h723xx.h.

◆ IMR2

__IO uint32_t EXTI_TypeDef::IMR2

EXTI Interrupt mask register, Address offset: 0x90.

Definition at line 917 of file stm32h723xx.h.

◆ IMR3

__IO uint32_t EXTI_TypeDef::IMR3

EXTI Interrupt mask register, Address offset: 0xA0.

Definition at line 921 of file stm32h723xx.h.

◆ PR1

__IO uint32_t EXTI_TypeDef::PR1

EXTI Pending register, Address offset: 0x88.

Definition at line 915 of file stm32h723xx.h.

◆ PR2

__IO uint32_t EXTI_TypeDef::PR2

EXTI Pending register, Address offset: 0x98.

Definition at line 919 of file stm32h723xx.h.

◆ PR3

__IO uint32_t EXTI_TypeDef::PR3

EXTI Pending register, Address offset: 0xA8.

Definition at line 923 of file stm32h723xx.h.

◆ RESERVED1

uint32_t EXTI_TypeDef::RESERVED1[2]

Reserved, 0x18 to 0x1C.

Definition at line 898 of file stm32h723xx.h.

◆ RESERVED2

uint32_t EXTI_TypeDef::RESERVED2[2]

Reserved, 0x38 to 0x3C.

Definition at line 905 of file stm32h723xx.h.

◆ RESERVED3

uint32_t EXTI_TypeDef::RESERVED3[10]

Reserved, 0x58 to 0x7C.

Definition at line 912 of file stm32h723xx.h.

◆ RESERVED4

uint32_t EXTI_TypeDef::RESERVED4

Reserved, 0x8C.

Definition at line 916 of file stm32h723xx.h.

◆ RESERVED5

uint32_t EXTI_TypeDef::RESERVED5

Reserved, 0x9C.

Definition at line 920 of file stm32h723xx.h.

◆ RTSR1

__IO uint32_t EXTI_TypeDef::RTSR1

EXTI Rising trigger selection register, Address offset: 0x00.

Definition at line 892 of file stm32h723xx.h.

◆ RTSR2

__IO uint32_t EXTI_TypeDef::RTSR2

EXTI Rising trigger selection register, Address offset: 0x20.

Definition at line 899 of file stm32h723xx.h.

◆ RTSR3

__IO uint32_t EXTI_TypeDef::RTSR3

EXTI Rising trigger selection register, Address offset: 0x40.

Definition at line 906 of file stm32h723xx.h.

◆ SWIER1

__IO uint32_t EXTI_TypeDef::SWIER1

EXTI Software interrupt event register, Address offset: 0x08.

Definition at line 894 of file stm32h723xx.h.

◆ SWIER2

__IO uint32_t EXTI_TypeDef::SWIER2

EXTI Software interrupt event register, Address offset: 0x28.

Definition at line 901 of file stm32h723xx.h.

◆ SWIER3

__IO uint32_t EXTI_TypeDef::SWIER3

EXTI Software interrupt event register, Address offset: 0x48.

Definition at line 908 of file stm32h723xx.h.

The documentation for this struct was generated from the following file:
  • firmware/Flight_Computer/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h723xx.h