FMC_Bank1E_TypeDef Struct Reference

Flexible Memory Controller Bank1E. More...

#include <stm32h723xx.h>

Public Attributes
__IO uint32_t	BWTR [7]
	NOR/PSRAM write timing registers, Address offset: 0x104-0x11C.

Detailed Description

Flexible Memory Controller Bank1E.

Definition at line 1014 of file stm32h723xx.h.

Member Data Documentation

BWTR

__IO uint32_t FMC_Bank1E_TypeDef::BWTR[7]

NOR/PSRAM write timing registers, Address offset: 0x104-0x11C.

Definition at line 1016 of file stm32h723xx.h.

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The documentation for this struct was generated from the following file:

• firmware/Flight_Computer/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h723xx.h