LCD-TFT Display Controller. More...

#include <stm32h723xx.h>

Public Attributes
uint32_t	RESERVED0 [2]
	Reserved, 0x00-0x04.
__IO uint32_t	SSCR
	LTDC Synchronization Size Configuration Register, Address offset: 0x08.
__IO uint32_t	BPCR
	LTDC Back Porch Configuration Register, Address offset: 0x0C.
__IO uint32_t	AWCR
	LTDC Active Width Configuration Register, Address offset: 0x10.
__IO uint32_t	TWCR
	LTDC Total Width Configuration Register, Address offset: 0x14.
__IO uint32_t	GCR
	LTDC Global Control Register, Address offset: 0x18.
uint32_t	RESERVED1 [2]
	Reserved, 0x1C-0x20.
__IO uint32_t	SRCR
	LTDC Shadow Reload Configuration Register, Address offset: 0x24.
uint32_t	RESERVED2 [1]
	Reserved, 0x28.
__IO uint32_t	BCCR
	LTDC Background Color Configuration Register, Address offset: 0x2C.
uint32_t	RESERVED3 [1]
	Reserved, 0x30.
__IO uint32_t	IER
	LTDC Interrupt Enable Register, Address offset: 0x34.
__IO uint32_t	ISR
	LTDC Interrupt Status Register, Address offset: 0x38.
__IO uint32_t	ICR
	LTDC Interrupt Clear Register, Address offset: 0x3C.
__IO uint32_t	LIPCR
	LTDC Line Interrupt Position Configuration Register, Address offset: 0x40.
__IO uint32_t	CPSR
	LTDC Current Position Status Register, Address offset: 0x44.
__IO uint32_t	CDSR
	LTDC Current Display Status Register, Address offset: 0x48.

Detailed Description

LCD-TFT Display Controller.

Definition at line 1165 of file stm32h723xx.h.

Member Data Documentation

◆ AWCR

__IO uint32_t LTDC_TypeDef::AWCR

LTDC Active Width Configuration Register, Address offset: 0x10.

Definition at line 1170 of file stm32h723xx.h.

◆ BCCR

__IO uint32_t LTDC_TypeDef::BCCR

LTDC Background Color Configuration Register, Address offset: 0x2C.

Definition at line 1176 of file stm32h723xx.h.

◆ BPCR

__IO uint32_t LTDC_TypeDef::BPCR

LTDC Back Porch Configuration Register, Address offset: 0x0C.

Definition at line 1169 of file stm32h723xx.h.

◆ CDSR

__IO uint32_t LTDC_TypeDef::CDSR

LTDC Current Display Status Register, Address offset: 0x48.

Definition at line 1183 of file stm32h723xx.h.

◆ CPSR

__IO uint32_t LTDC_TypeDef::CPSR

LTDC Current Position Status Register, Address offset: 0x44.

Definition at line 1182 of file stm32h723xx.h.

◆ GCR

__IO uint32_t LTDC_TypeDef::GCR

LTDC Global Control Register, Address offset: 0x18.

Definition at line 1172 of file stm32h723xx.h.

◆ ICR

__IO uint32_t LTDC_TypeDef::ICR

LTDC Interrupt Clear Register, Address offset: 0x3C.

Definition at line 1180 of file stm32h723xx.h.

◆ IER

__IO uint32_t LTDC_TypeDef::IER

LTDC Interrupt Enable Register, Address offset: 0x34.

Definition at line 1178 of file stm32h723xx.h.

◆ ISR

__IO uint32_t LTDC_TypeDef::ISR

LTDC Interrupt Status Register, Address offset: 0x38.

Definition at line 1179 of file stm32h723xx.h.

◆ LIPCR

__IO uint32_t LTDC_TypeDef::LIPCR

LTDC Line Interrupt Position Configuration Register, Address offset: 0x40.

Definition at line 1181 of file stm32h723xx.h.

◆ RESERVED0

uint32_t LTDC_TypeDef::RESERVED0[2]

Reserved, 0x00-0x04.

Definition at line 1167 of file stm32h723xx.h.

◆ RESERVED1

uint32_t LTDC_TypeDef::RESERVED1[2]

Reserved, 0x1C-0x20.

Definition at line 1173 of file stm32h723xx.h.

◆ RESERVED2

uint32_t LTDC_TypeDef::RESERVED2[1]

Reserved, 0x28.

Definition at line 1175 of file stm32h723xx.h.

◆ RESERVED3

uint32_t LTDC_TypeDef::RESERVED3[1]

Reserved, 0x30.

Definition at line 1177 of file stm32h723xx.h.

◆ SRCR

__IO uint32_t LTDC_TypeDef::SRCR

LTDC Shadow Reload Configuration Register, Address offset: 0x24.

Definition at line 1174 of file stm32h723xx.h.

◆ SSCR

__IO uint32_t LTDC_TypeDef::SSCR

LTDC Synchronization Size Configuration Register, Address offset: 0x08.

Definition at line 1168 of file stm32h723xx.h.

◆ TWCR

__IO uint32_t LTDC_TypeDef::TWCR

LTDC Total Width Configuration Register, Address offset: 0x14.

Definition at line 1171 of file stm32h723xx.h.

The documentation for this struct was generated from the following file:

firmware/Flight_Computer/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h723xx.h

Public Attributes