#include <stm32h723xx.h>

Public Attributes
__IO uint32_t	CISR
	MDMA channel x interrupt/status register, Address offset: 0x40.
__IO uint32_t	CIFCR
	MDMA channel x interrupt flag clear register, Address offset: 0x44.
__IO uint32_t	CESR
	MDMA Channel x error status register, Address offset: 0x48.
__IO uint32_t	CCR
	MDMA channel x control register, Address offset: 0x4C.
__IO uint32_t	CTCR
	MDMA channel x Transfer Configuration register, Address offset: 0x50.
__IO uint32_t	CBNDTR
	MDMA Channel x block number of data register, Address offset: 0x54.
__IO uint32_t	CSAR
	MDMA channel x source address register, Address offset: 0x58.
__IO uint32_t	CDAR
	MDMA channel x destination address register, Address offset: 0x5C.
__IO uint32_t	CBRUR
	MDMA channel x Block Repeat address Update register, Address offset: 0x60.
__IO uint32_t	CLAR
	MDMA channel x Link Address register, Address offset: 0x64.
__IO uint32_t	CTBR
	MDMA channel x Trigger and Bus selection Register, Address offset: 0x68.
uint32_t	RESERVED0
	Reserved, 0x6C.
__IO uint32_t	CMAR
	MDMA channel x Mask address register, Address offset: 0x70.
__IO uint32_t	CMDR
	MDMA channel x Mask Data register, Address offset: 0x74.

Detailed Description

Definition at line 663 of file stm32h723xx.h.

Member Data Documentation

◆ CBNDTR

__IO uint32_t MDMA_Channel_TypeDef::CBNDTR

MDMA Channel x block number of data register, Address offset: 0x54.

Definition at line 670 of file stm32h723xx.h.

◆ CBRUR

__IO uint32_t MDMA_Channel_TypeDef::CBRUR

MDMA channel x Block Repeat address Update register, Address offset: 0x60.

Definition at line 673 of file stm32h723xx.h.

◆ CCR

__IO uint32_t MDMA_Channel_TypeDef::CCR

MDMA channel x control register, Address offset: 0x4C.

Definition at line 668 of file stm32h723xx.h.

◆ CDAR

__IO uint32_t MDMA_Channel_TypeDef::CDAR

MDMA channel x destination address register, Address offset: 0x5C.

Definition at line 672 of file stm32h723xx.h.

◆ CESR

__IO uint32_t MDMA_Channel_TypeDef::CESR

MDMA Channel x error status register, Address offset: 0x48.

Definition at line 667 of file stm32h723xx.h.

◆ CIFCR

__IO uint32_t MDMA_Channel_TypeDef::CIFCR

MDMA channel x interrupt flag clear register, Address offset: 0x44.

Definition at line 666 of file stm32h723xx.h.

◆ CISR

__IO uint32_t MDMA_Channel_TypeDef::CISR

MDMA channel x interrupt/status register, Address offset: 0x40.

Definition at line 665 of file stm32h723xx.h.

◆ CLAR

__IO uint32_t MDMA_Channel_TypeDef::CLAR

MDMA channel x Link Address register, Address offset: 0x64.

Definition at line 674 of file stm32h723xx.h.

◆ CMAR

__IO uint32_t MDMA_Channel_TypeDef::CMAR

MDMA channel x Mask address register, Address offset: 0x70.

Definition at line 677 of file stm32h723xx.h.

◆ CMDR

__IO uint32_t MDMA_Channel_TypeDef::CMDR

MDMA channel x Mask Data register, Address offset: 0x74.

Definition at line 678 of file stm32h723xx.h.

◆ CSAR

__IO uint32_t MDMA_Channel_TypeDef::CSAR

MDMA channel x source address register, Address offset: 0x58.

Definition at line 671 of file stm32h723xx.h.

◆ CTBR

__IO uint32_t MDMA_Channel_TypeDef::CTBR

MDMA channel x Trigger and Bus selection Register, Address offset: 0x68.

Definition at line 675 of file stm32h723xx.h.

◆ CTCR

__IO uint32_t MDMA_Channel_TypeDef::CTCR

MDMA channel x Transfer Configuration register, Address offset: 0x50.

Definition at line 669 of file stm32h723xx.h.

◆ RESERVED0

uint32_t MDMA_Channel_TypeDef::RESERVED0

Reserved, 0x6C.

Definition at line 676 of file stm32h723xx.h.

The documentation for this struct was generated from the following file:

firmware/Flight_Computer/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h723xx.h

Public Attributes