|
STAR
Cal STAR — firmware, DAQ server, and engine design
|
OCTO Serial Peripheral Interface. More...
#include <stm32h723xx.h>
Public Attributes | |
| __IO uint32_t | CR |
| OCTOSPI Control register, Address offset: 0x000. | |
| uint32_t | RESERVED |
| Reserved, Address offset: 0x004. | |
| __IO uint32_t | DCR1 |
| OCTOSPI Device Configuration register 1, Address offset: 0x008. | |
| __IO uint32_t | DCR2 |
| OCTOSPI Device Configuration register 2, Address offset: 0x00C. | |
| __IO uint32_t | DCR3 |
| OCTOSPI Device Configuration register 3, Address offset: 0x010. | |
| __IO uint32_t | DCR4 |
| OCTOSPI Device Configuration register 4, Address offset: 0x014. | |
| uint32_t | RESERVED1 [2] |
| Reserved, Address offset: 0x018-0x01C. | |
| __IO uint32_t | SR |
| OCTOSPI Status register, Address offset: 0x020. | |
| __IO uint32_t | FCR |
| OCTOSPI Flag Clear register, Address offset: 0x024. | |
| uint32_t | RESERVED2 [6] |
| Reserved, Address offset: 0x028-0x03C. | |
| __IO uint32_t | DLR |
| OCTOSPI Data Length register, Address offset: 0x040. | |
| uint32_t | RESERVED3 |
| Reserved, Address offset: 0x044. | |
| __IO uint32_t | AR |
| OCTOSPI Address register, Address offset: 0x048. | |
| uint32_t | RESERVED4 |
| Reserved, Address offset: 0x04C. | |
| __IO uint32_t | DR |
| OCTOSPI Data register, Address offset: 0x050. | |
| uint32_t | RESERVED5 [11] |
| Reserved, Address offset: 0x054-0x07C. | |
| __IO uint32_t | PSMKR |
| OCTOSPI Polling Status Mask register, Address offset: 0x080. | |
| uint32_t | RESERVED6 |
| Reserved, Address offset: 0x084. | |
| __IO uint32_t | PSMAR |
| OCTOSPI Polling Status Match register, Address offset: 0x088. | |
| uint32_t | RESERVED7 |
| Reserved, Address offset: 0x08C. | |
| __IO uint32_t | PIR |
| OCTOSPI Polling Interval register, Address offset: 0x090. | |
| uint32_t | RESERVED8 [27] |
| Reserved, Address offset: 0x094-0x0FC. | |
| __IO uint32_t | CCR |
| OCTOSPI Communication Configuration register, Address offset: 0x100. | |
| uint32_t | RESERVED9 |
| Reserved, Address offset: 0x104. | |
| __IO uint32_t | TCR |
| OCTOSPI Timing Configuration register, Address offset: 0x108. | |
| uint32_t | RESERVED10 |
| Reserved, Address offset: 0x10C. | |
| __IO uint32_t | IR |
| OCTOSPI Instruction register, Address offset: 0x110. | |
| uint32_t | RESERVED11 [3] |
| Reserved, Address offset: 0x114-0x11C. | |
| __IO uint32_t | ABR |
| OCTOSPI Alternate Bytes register, Address offset: 0x120. | |
| uint32_t | RESERVED12 [3] |
| Reserved, Address offset: 0x124-0x12C. | |
| __IO uint32_t | LPTR |
| OCTOSPI Low Power Timeout register, Address offset: 0x130. | |
| uint32_t | RESERVED13 [3] |
| Reserved, Address offset: 0x134-0x13C. | |
| __IO uint32_t | WPCCR |
| OCTOSPI Wrap Communication Configuration register, Address offset: 0x140. | |
| uint32_t | RESERVED14 |
| Reserved, Address offset: 0x144. | |
| __IO uint32_t | WPTCR |
| OCTOSPI Wrap Timing Configuration register, Address offset: 0x148. | |
| uint32_t | RESERVED15 |
| Reserved, Address offset: 0x14C. | |
| __IO uint32_t | WPIR |
| OCTOSPI Wrap Instruction register, Address offset: 0x150. | |
| uint32_t | RESERVED16 [3] |
| Reserved, Address offset: 0x154-0x15C. | |
| __IO uint32_t | WPABR |
| OCTOSPI Wrap Alternate Bytes register, Address offset: 0x160. | |
| uint32_t | RESERVED17 [7] |
| Reserved, Address offset: 0x164-0x17C. | |
| __IO uint32_t | WCCR |
| OCTOSPI Write Communication Configuration register, Address offset: 0x180. | |
| uint32_t | RESERVED18 |
| Reserved, Address offset: 0x184. | |
| __IO uint32_t | WTCR |
| OCTOSPI Write Timing Configuration register, Address offset: 0x188. | |
| uint32_t | RESERVED19 |
| Reserved, Address offset: 0x18C. | |
| __IO uint32_t | WIR |
| OCTOSPI Write Instruction register, Address offset: 0x190. | |
| uint32_t | RESERVED20 [3] |
| Reserved, Address offset: 0x194-0x19C. | |
| __IO uint32_t | WABR |
| OCTOSPI Write Alternate Bytes register, Address offset: 0x1A0. | |
| uint32_t | RESERVED21 [23] |
| Reserved, Address offset: 0x1A4-0x1FC. | |
| __IO uint32_t | HLCR |
| OCTOSPI Hyperbus Latency Configuration register, Address offset: 0x200. | |
| uint32_t | RESERVED22 [122] |
| Reserved, Address offset: 0x204-0x3EC. | |
| __IO uint32_t | HWCFGR |
| OCTOSPI HW Configuration register, Address offset: 0x3F0. | |
| __IO uint32_t | VER |
| OCTOSPI Version register, Address offset: 0x3F4. | |
| __IO uint32_t | ID |
| OCTOSPI Identification register, Address offset: 0x3F8. | |
| __IO uint32_t | MID |
| OCTOPSI HW Magic ID register, Address offset: 0x3FC. | |
OCTO Serial Peripheral Interface.
Definition at line 1886 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::ABR |
OCTOSPI Alternate Bytes register, Address offset: 0x120.
Definition at line 1916 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::AR |
OCTOSPI Address register, Address offset: 0x048.
Definition at line 1900 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::CCR |
OCTOSPI Communication Configuration register, Address offset: 0x100.
Definition at line 1910 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::CR |
OCTOSPI Control register, Address offset: 0x000.
Definition at line 1888 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::DCR1 |
OCTOSPI Device Configuration register 1, Address offset: 0x008.
Definition at line 1890 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::DCR2 |
OCTOSPI Device Configuration register 2, Address offset: 0x00C.
Definition at line 1891 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::DCR3 |
OCTOSPI Device Configuration register 3, Address offset: 0x010.
Definition at line 1892 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::DCR4 |
OCTOSPI Device Configuration register 4, Address offset: 0x014.
Definition at line 1893 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::DLR |
OCTOSPI Data Length register, Address offset: 0x040.
Definition at line 1898 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::DR |
OCTOSPI Data register, Address offset: 0x050.
Definition at line 1902 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::FCR |
OCTOSPI Flag Clear register, Address offset: 0x024.
Definition at line 1896 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::HLCR |
OCTOSPI Hyperbus Latency Configuration register, Address offset: 0x200.
Definition at line 1936 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::HWCFGR |
OCTOSPI HW Configuration register, Address offset: 0x3F0.
Definition at line 1938 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::ID |
OCTOSPI Identification register, Address offset: 0x3F8.
Definition at line 1940 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::IR |
OCTOSPI Instruction register, Address offset: 0x110.
Definition at line 1914 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::LPTR |
OCTOSPI Low Power Timeout register, Address offset: 0x130.
Definition at line 1918 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::MID |
OCTOPSI HW Magic ID register, Address offset: 0x3FC.
Definition at line 1941 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::PIR |
OCTOSPI Polling Interval register, Address offset: 0x090.
Definition at line 1908 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::PSMAR |
OCTOSPI Polling Status Match register, Address offset: 0x088.
Definition at line 1906 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::PSMKR |
OCTOSPI Polling Status Mask register, Address offset: 0x080.
Definition at line 1904 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED |
Reserved, Address offset: 0x004.
Definition at line 1889 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED1[2] |
Reserved, Address offset: 0x018-0x01C.
Definition at line 1894 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED10 |
Reserved, Address offset: 0x10C.
Definition at line 1913 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED11[3] |
Reserved, Address offset: 0x114-0x11C.
Definition at line 1915 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED12[3] |
Reserved, Address offset: 0x124-0x12C.
Definition at line 1917 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED13[3] |
Reserved, Address offset: 0x134-0x13C.
Definition at line 1919 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED14 |
Reserved, Address offset: 0x144.
Definition at line 1921 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED15 |
Reserved, Address offset: 0x14C.
Definition at line 1923 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED16[3] |
Reserved, Address offset: 0x154-0x15C.
Definition at line 1925 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED17[7] |
Reserved, Address offset: 0x164-0x17C.
Definition at line 1927 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED18 |
Reserved, Address offset: 0x184.
Definition at line 1929 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED19 |
Reserved, Address offset: 0x18C.
Definition at line 1931 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED2[6] |
Reserved, Address offset: 0x028-0x03C.
Definition at line 1897 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED20[3] |
Reserved, Address offset: 0x194-0x19C.
Definition at line 1933 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED21[23] |
Reserved, Address offset: 0x1A4-0x1FC.
Definition at line 1935 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED22[122] |
Reserved, Address offset: 0x204-0x3EC.
Definition at line 1937 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED3 |
Reserved, Address offset: 0x044.
Definition at line 1899 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED4 |
Reserved, Address offset: 0x04C.
Definition at line 1901 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED5[11] |
Reserved, Address offset: 0x054-0x07C.
Definition at line 1903 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED6 |
Reserved, Address offset: 0x084.
Definition at line 1905 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED7 |
Reserved, Address offset: 0x08C.
Definition at line 1907 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED8[27] |
Reserved, Address offset: 0x094-0x0FC.
Definition at line 1909 of file stm32h723xx.h.
| uint32_t OCTOSPI_TypeDef::RESERVED9 |
Reserved, Address offset: 0x104.
Definition at line 1911 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::SR |
OCTOSPI Status register, Address offset: 0x020.
Definition at line 1895 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::TCR |
OCTOSPI Timing Configuration register, Address offset: 0x108.
Definition at line 1912 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::VER |
OCTOSPI Version register, Address offset: 0x3F4.
Definition at line 1939 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::WABR |
OCTOSPI Write Alternate Bytes register, Address offset: 0x1A0.
Definition at line 1934 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::WCCR |
OCTOSPI Write Communication Configuration register, Address offset: 0x180.
Definition at line 1928 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::WIR |
OCTOSPI Write Instruction register, Address offset: 0x190.
Definition at line 1932 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::WPABR |
OCTOSPI Wrap Alternate Bytes register, Address offset: 0x160.
Definition at line 1926 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::WPCCR |
OCTOSPI Wrap Communication Configuration register, Address offset: 0x140.
Definition at line 1920 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::WPIR |
OCTOSPI Wrap Instruction register, Address offset: 0x150.
Definition at line 1924 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::WPTCR |
OCTOSPI Wrap Timing Configuration register, Address offset: 0x148.
Definition at line 1922 of file stm32h723xx.h.
| __IO uint32_t OCTOSPI_TypeDef::WTCR |
OCTOSPI Write Timing Configuration register, Address offset: 0x188.
Definition at line 1930 of file stm32h723xx.h.