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PSSI_TypeDef Struct Reference

PSSI. More...

#include <stm32h723xx.h>

Public Attributes

__IO uint32_t CR
 PSSI control register 1, Address offset: 0x000.
__IO uint32_t SR
 PSSI status register, Address offset: 0x004.
__IO uint32_t RIS
 PSSI raw interrupt status register, Address offset: 0x008.
__IO uint32_t IER
 PSSI interrupt enable register, Address offset: 0x00C.
__IO uint32_t MIS
 PSSI masked interrupt status register, Address offset: 0x010.
__IO uint32_t ICR
 PSSI interrupt clear register, Address offset: 0x014.
__IO uint32_t RESERVED1 [4]
 Reserved, 0x018 - 0x024.
__IO uint32_t DR
 PSSI data register, Address offset: 0x028.
__IO uint32_t RESERVED2 [241]
 Reserved, 0x02C - 0x3EC.
__IO uint32_t HWCFGR
 PSSI IP HW configuration register, Address offset: 0x3F0.
__IO uint32_t VERR
 PSSI IP version register, Address offset: 0x3F4.
__IO uint32_t IPIDR
 PSSI IP ID register, Address offset: 0x3F8.
__IO uint32_t SIDR
 PSSI SIZE ID register, Address offset: 0x3FC.

Detailed Description

PSSI.

Definition at line 579 of file stm32h723xx.h.

Member Data Documentation

◆ CR

__IO uint32_t PSSI_TypeDef::CR

PSSI control register 1, Address offset: 0x000.

Definition at line 581 of file stm32h723xx.h.

◆ DR

__IO uint32_t PSSI_TypeDef::DR

PSSI data register, Address offset: 0x028.

Definition at line 588 of file stm32h723xx.h.

◆ HWCFGR

__IO uint32_t PSSI_TypeDef::HWCFGR

PSSI IP HW configuration register, Address offset: 0x3F0.

Definition at line 590 of file stm32h723xx.h.

◆ ICR

__IO uint32_t PSSI_TypeDef::ICR

PSSI interrupt clear register, Address offset: 0x014.

Definition at line 586 of file stm32h723xx.h.

◆ IER

__IO uint32_t PSSI_TypeDef::IER

PSSI interrupt enable register, Address offset: 0x00C.

Definition at line 584 of file stm32h723xx.h.

◆ IPIDR

__IO uint32_t PSSI_TypeDef::IPIDR

PSSI IP ID register, Address offset: 0x3F8.

Definition at line 592 of file stm32h723xx.h.

◆ MIS

__IO uint32_t PSSI_TypeDef::MIS

PSSI masked interrupt status register, Address offset: 0x010.

Definition at line 585 of file stm32h723xx.h.

◆ RESERVED1

__IO uint32_t PSSI_TypeDef::RESERVED1[4]

Reserved, 0x018 - 0x024.

Definition at line 587 of file stm32h723xx.h.

◆ RESERVED2

__IO uint32_t PSSI_TypeDef::RESERVED2[241]

Reserved, 0x02C - 0x3EC.

Definition at line 589 of file stm32h723xx.h.

◆ RIS

__IO uint32_t PSSI_TypeDef::RIS

PSSI raw interrupt status register, Address offset: 0x008.

Definition at line 583 of file stm32h723xx.h.

◆ SIDR

__IO uint32_t PSSI_TypeDef::SIDR

PSSI SIZE ID register, Address offset: 0x3FC.

Definition at line 593 of file stm32h723xx.h.

◆ SR

__IO uint32_t PSSI_TypeDef::SR

PSSI status register, Address offset: 0x004.

Definition at line 582 of file stm32h723xx.h.

◆ VERR

__IO uint32_t PSSI_TypeDef::VERR

PSSI IP version register, Address offset: 0x3F4.

Definition at line 591 of file stm32h723xx.h.


The documentation for this struct was generated from the following file:
  • firmware/Flight_Computer/Drivers/CMSIS/Device/ST/STM32H7xx/Include/stm32h723xx.h