11 begin(chip_select, &SPI);
126 REGISTER.ADC2MUX.bit.MUXP = pos_pin;
135 uint8_t buff[10] = {0};
152 if(
REGISTER.INTERFACE.bit.STATUS) i++;
154 if(
REGISTER.INTERFACE.bit.CRC > 0) i++;
164 ADC_BYTES.bit.DATA1 = buff[j++];
165 ADC_BYTES.bit.DATA2 = buff[j++];
166 ADC_BYTES.bit.DATA3 = buff[j++];
167 ADC_BYTES.bit.DATA4 = buff[j++];
171 bool checksumValid =
true;
173 uint8_t checkbyte = buff[j];
177 uint8_t checkbyte = buff[j];
182 ADS126X::ADCReading
result;
183 result.value =
static_cast<int32_t
>(ADC_BYTES.reg);
184 result.checksumValid = checksumValid;
197 uint8_t buff[10] = {0};
214 if(
REGISTER.INTERFACE.bit.STATUS) i++;
217 if(
REGISTER.INTERFACE.bit.CRC>0) i++;
229 ADC_BYTES.bit.DATA1 = buff[j]; j++;
230 ADC_BYTES.bit.DATA2 = buff[j]; j++;
231 ADC_BYTES.bit.DATA3 = buff[j]; j++;
234 bool checksumValid =
true;
236 uint8_t checkbyte = buff[j];
240 uint8_t checkbyte = buff[j];
248 result.value =
static_cast<int32_t
>(ADC_BYTES.reg);
249 result.checksumValid = checksumValid;
263 uint8_t buff[1] = {command};
274 uint8_t buff[50] = {0};
276 start_reg = start_reg & 0x1F;
282 for(uint8_t i = 0; i < num; i++) {
298 uint8_t buff[50] = {0};
300 start_reg = start_reg & 0x1F;
308 for(uint8_t i = 0; i < num; i++) {
346 uint8_t
diff = sum - checksum;
356 while( (num & fin) ^ num ) {
362 return ((num ^
CRC) == 0);
370 while(val >>= 1) pos++;
412 REGISTER.MODE1.bit.SBPOL = polarity;
505 REGISTER.IDACMUX.bit.ADS_MUX1 = pin;
514 REGISTER.IDACMUX.bit.ADS_MUX2 = pin;
524 REGISTER.IDACMAG.bit.MAG2 = magnitude;
530 _spi->beginTransaction( SPISettings(2000000, MSBFIRST,
SPI_MODE1) );
532 for(uint8_t i=0;i<len;i++) {
533 buff[i] =
_spi->transfer(buff[i]);
536 _spi->endTransaction();
void digitalWrite(int, int)
#define ADS126X_PGA_ENABLE
#define ADS126X_CHECK_CRC
#define ADS126X_CHECK_BYTE
#define ADS126X_CONV_PULSE
#define ADS126X_PGA_BYPASS
#define ADS126X_CONV_CONT
static void enable(board_bringup_t *b, uint16_t device_id)
void setIDAC2Pin(uint8_t pin)
void setBiasMagnitude(uint8_t mag)
MODE2 register.
void setInputMux(uint8_t pos, uint8_t neg)
__IO unsigned char * REGISTER_ARRAY
void setADC2Mux(uint8_t pos_pin, uint8_t neg_pin)
ADS126X_REGISTER_Type REGISTER
uint8_t msb_pos(uint64_t val)
MODE0 register.
void setOutputTDACN(uint8_t on)
void setBiasADC(uint8_t adc)
void writeRegisters(uint8_t start_reg, uint8_t num)
void spi_rw(uint8_t buff[], uint8_t len)
uint8_t readRegister(uint8_t reg)
SPI Communication Commands.
void setRate(uint8_t rate)
void readRegisters(uint8_t start_reg, uint8_t num)
ads126x_reading readADC1()
ADS126X(void)
< Initial ADC Setup
void writeRegister(uint8_t reg)
void setIDAC2Mag(uint8_t mag)
void setOutputmagnitudeTDACN(uint8_t mag)
IDAC functionality.
ADS126X_STATUS_Type STATUS
void setContinuousMode(void)
void setIDAC1Pin(uint8_t pin)
void setDelay(uint8_t del)
MODE1 register.
bool check_checksum(uint32_t val, uint8_t byt)
void setGain(uint8_t gain)
void setFilter(uint8_t filter)
void setBiasPolarity(uint8_t pol)
void setReference(uint8_t neg, uint8_t pos)
TDAC Registers.
void setIDAC1Mag(uint8_t mag)
void setChopMode(uint8_t mode)
bool check_crc(uint32_t val, uint8_t byt)
void sendCommand(uint8_t command)
void setOutputTDACP(uint8_t on)
void setOutputmagnitudeTDACP(uint8_t mag)
__IO ADS126X_MODE2_Type MODE2
Offset: 0x05 (R/W 8) Mode2.
__IO ADS126X_REFMUX_Type REFMUX
Offset: 0x0F (R/W 8) Reference Multiplexer.
__IO ADS126X_INPMUX_Type INPMUX
Offset: 0x06 (R/W 8) Input Multiplexer.
__IO ADS126X_MODE1_Type MODE1
Offset: 0x04 (R/W 8) Mode1.
__IO ADS126X_IDACMAG_Type IDACMAG
Offset: 0x0E (R/W 8) IDAC Magnitude.
__IO ADS126X_TDACN_Type TDACN
Offset: 0x11 (R/W 8) TDACN Negative Output.
__IO ADS126X_TDACP_Type TDACP
Offset: 0x10 (R/W 8) TDACP Output.
static int32_t diff(uint32_t a, uint32_t b)
struct ADS126X_IDACMAG_Type::@353202372365344174342272011233344036156024036201 bit
struct ADS126X_INPMUX_Type::@276355074023256147213077305335246170160306344016 bit
struct ADS126X_MODE1_Type::@146370014303124046124161220200075144230057366052 bit
uint8_t SBADC
bit: 4 Sensor Bias ADC Connection
uint8_t BYPASS
bit: 7 PGA Bypass Mode
struct ADS126X_MODE2_Type::@374226322312305146344122106072274053065142352262 bit
struct ADS126X_REFMUX_Type::@222230233150137302323333152365263246000363132324 bit
struct ADS126X_TDACN_Type::@317360277033272274106333105076057224307330123376 bit
struct ADS126X_TDACP_Type::@350072060036023132022230077113021320333252136175 bit