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Header file of DMA HAL module. More...
#include "stm32h7xx_hal_def.h"Go to the source code of this file.
Classes | |
| struct | MDMA_InitTypeDef |
| MDMA Configuration Structure definition. More... | |
| struct | MDMA_LinkNodeTypeDef |
| HAL MDMA linked list node structure definition. More... | |
| struct | MDMA_LinkNodeConfTypeDef |
| HAL MDMA linked list node configuration structure definition. More... | |
| struct | __MDMA_HandleTypeDef |
| MDMA handle Structure definition. More... | |
Macros | |
| #define | HAL_MDMA_ERROR_NONE ((uint32_t)0x00000000U) |
| No error. | |
| #define | HAL_MDMA_ERROR_READ_XFER ((uint32_t)0x00000001U) |
| Read Transfer error. | |
| #define | HAL_MDMA_ERROR_WRITE_XFER ((uint32_t)0x00000002U) |
| Write Transfer error. | |
| #define | HAL_MDMA_ERROR_MASK_DATA ((uint32_t)0x00000004U) |
| Error Mask Data error. | |
| #define | HAL_MDMA_ERROR_LINKED_LIST ((uint32_t)0x00000008U) |
| Linked list Data error. | |
| #define | HAL_MDMA_ERROR_ALIGNMENT ((uint32_t)0x00000010U) |
| Address/Size alignment error. | |
| #define | HAL_MDMA_ERROR_BLOCK_SIZE ((uint32_t)0x00000020U) |
| Block Size error. | |
| #define | HAL_MDMA_ERROR_TIMEOUT ((uint32_t)0x00000040U) |
| Timeout error. | |
| #define | HAL_MDMA_ERROR_NO_XFER ((uint32_t)0x00000080U) |
| Abort or SW trigger requested with no Xfer ongoing. | |
| #define | HAL_MDMA_ERROR_BUSY ((uint32_t)0x00000100U) |
| DeInit or SW trigger requested with Xfer ongoing. | |
| #define | MDMA_REQUEST_DMA1_Stream0_TC ((uint32_t)0x00000000U) |
| MDMA HW request is DMA1 Stream 0 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA1_Stream1_TC ((uint32_t)0x00000001U) |
| MDMA HW request is DMA1 Stream 1 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA1_Stream2_TC ((uint32_t)0x00000002U) |
| MDMA HW request is DMA1 Stream 2 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA1_Stream3_TC ((uint32_t)0x00000003U) |
| MDMA HW request is DMA1 Stream 3 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA1_Stream4_TC ((uint32_t)0x00000004U) |
| MDMA HW request is DMA1 Stream 4 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA1_Stream5_TC ((uint32_t)0x00000005U) |
| MDMA HW request is DMA1 Stream 5 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA1_Stream6_TC ((uint32_t)0x00000006U) |
| MDMA HW request is DMA1 Stream 6 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA1_Stream7_TC ((uint32_t)0x00000007U) |
| MDMA HW request is DMA1 Stream 7 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA2_Stream0_TC ((uint32_t)0x00000008U) |
| MDMA HW request is DMA2 Stream 0 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA2_Stream1_TC ((uint32_t)0x00000009U) |
| MDMA HW request is DMA2 Stream 1 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA2_Stream2_TC ((uint32_t)0x0000000AU) |
| MDMA HW request is DMA2 Stream 2 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA2_Stream3_TC ((uint32_t)0x0000000BU) |
| MDMA HW request is DMA2 Stream 3 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA2_Stream4_TC ((uint32_t)0x0000000CU) |
| MDMA HW request is DMA2 Stream 4 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA2_Stream5_TC ((uint32_t)0x0000000DU) |
| MDMA HW request is DMA2 Stream 5 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA2_Stream6_TC ((uint32_t)0x0000000EU) |
| MDMA HW request is DMA2 Stream 6 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA2_Stream7_TC ((uint32_t)0x0000000FU) |
| MDMA HW request is DMA2 Stream 7 Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA2D_CLUT_TC ((uint32_t)0x00000018U) |
| MDMA HW request is DMA2D CLUT Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA2D_TC ((uint32_t)0x00000019U) |
| MDMA HW request is DMA2D Transfer Complete Flag. | |
| #define | MDMA_REQUEST_DMA2D_TW ((uint32_t)0x0000001AU) |
| MDMA HW request is DMA2D Transfer Watermark Flag. | |
| #define | MDMA_REQUEST_SDMMC1_END_DATA ((uint32_t)0x0000001DU) |
| MDMA HW request is SDMMC1 End of Data Flag. | |
| #define | MDMA_REQUEST_SDMMC1_DMA_ENDBUFFER ((uint32_t)0x0000001EU) |
| MDMA HW request is SDMMC1 Internal DMA buffer End Flag. | |
| #define | MDMA_REQUEST_SDMMC1_COMMAND_END ((uint32_t)0x0000001FU) |
| MDMA HW request is SDMMC1 Command End Flag. | |
| #define | MDMA_REQUEST_SW ((uint32_t)0x40000000U) |
| MDMA SW request. | |
| #define | MDMA_BUFFER_TRANSFER ((uint32_t)0x00000000U) |
| Each MDMA request (SW or HW) triggers a buffer transfer. | |
| #define | MDMA_BLOCK_TRANSFER ((uint32_t)MDMA_CTCR_TRGM_0) |
| Each MDMA request (SW or HW) triggers a block transfer. | |
| #define | MDMA_REPEAT_BLOCK_TRANSFER ((uint32_t)MDMA_CTCR_TRGM_1) |
| Each MDMA request (SW or HW) triggers a repeated block transfer. | |
| #define | MDMA_FULL_TRANSFER ((uint32_t)MDMA_CTCR_TRGM) |
| Each MDMA request (SW or HW) triggers a Full transfer or a linked list transfer if any. | |
| #define | MDMA_PRIORITY_LOW ((uint32_t)0x00000000U) |
| Priority level: Low. | |
| #define | MDMA_PRIORITY_MEDIUM ((uint32_t)MDMA_CCR_PL_0) |
| Priority level: Medium. | |
| #define | MDMA_PRIORITY_HIGH ((uint32_t)MDMA_CCR_PL_1) |
| Priority level: High. | |
| #define | MDMA_PRIORITY_VERY_HIGH ((uint32_t)MDMA_CCR_PL) |
| Priority level: Very High. | |
| #define | MDMA_LITTLE_ENDIANNESS_PRESERVE ((uint32_t)0x00000000U) |
| little endianness preserve | |
| #define | MDMA_LITTLE_BYTE_ENDIANNESS_EXCHANGE ((uint32_t)MDMA_CCR_BEX) |
| BYTEs endianness exchange when destination data size is > Byte. | |
| #define | MDMA_LITTLE_HALFWORD_ENDIANNESS_EXCHANGE ((uint32_t)MDMA_CCR_HEX) |
| HALF WORDs endianness exchange when destination data size is > HALF WORD. | |
| #define | MDMA_LITTLE_WORD_ENDIANNESS_EXCHANGE ((uint32_t)MDMA_CCR_WEX) |
| WORDs endianness exchange when destination data size is > DOUBLE WORD. | |
| #define | MDMA_SRC_INC_DISABLE ((uint32_t)0x00000000U) |
| Source address pointer is fixed. | |
| #define | MDMA_SRC_INC_BYTE ((uint32_t)MDMA_CTCR_SINC_1) |
| Source address pointer is incremented by a BYTE (8 bits). | |
| #define | MDMA_SRC_INC_HALFWORD ((uint32_t)MDMA_CTCR_SINC_1 | (uint32_t)MDMA_CTCR_SINCOS_0) |
| Source address pointer is incremented by a half Word (16 bits). | |
| #define | MDMA_SRC_INC_WORD ((uint32_t)MDMA_CTCR_SINC_1 | (uint32_t)MDMA_CTCR_SINCOS_1) |
| Source address pointer is incremented by a Word (32 bits). | |
| #define | MDMA_SRC_INC_DOUBLEWORD ((uint32_t)MDMA_CTCR_SINC_1 | (uint32_t)MDMA_CTCR_SINCOS) |
| Source address pointer is incremented by a double Word (64 bits)). | |
| #define | MDMA_SRC_DEC_BYTE ((uint32_t)MDMA_CTCR_SINC) |
| Source address pointer is decremented by a BYTE (8 bits). | |
| #define | MDMA_SRC_DEC_HALFWORD ((uint32_t)MDMA_CTCR_SINC | (uint32_t)MDMA_CTCR_SINCOS_0) |
| Source address pointer is decremented by a half Word (16 bits). | |
| #define | MDMA_SRC_DEC_WORD ((uint32_t)MDMA_CTCR_SINC | (uint32_t)MDMA_CTCR_SINCOS_1) |
| Source address pointer is decremented by a Word (32 bits). | |
| #define | MDMA_SRC_DEC_DOUBLEWORD ((uint32_t)MDMA_CTCR_SINC | (uint32_t)MDMA_CTCR_SINCOS) |
| Source address pointer is decremented by a double Word (64 bits)). | |
| #define | MDMA_DEST_INC_DISABLE ((uint32_t)0x00000000U) |
| Source address pointer is fixed. | |
| #define | MDMA_DEST_INC_BYTE ((uint32_t)MDMA_CTCR_DINC_1) |
| Source address pointer is incremented by a BYTE (8 bits). | |
| #define | MDMA_DEST_INC_HALFWORD ((uint32_t)MDMA_CTCR_DINC_1 | (uint32_t)MDMA_CTCR_DINCOS_0) |
| Source address pointer is incremented by a half Word (16 bits). | |
| #define | MDMA_DEST_INC_WORD ((uint32_t)MDMA_CTCR_DINC_1 | (uint32_t)MDMA_CTCR_DINCOS_1) |
| Source address pointer is incremented by a Word (32 bits). | |
| #define | MDMA_DEST_INC_DOUBLEWORD ((uint32_t)MDMA_CTCR_DINC_1 | (uint32_t)MDMA_CTCR_DINCOS) |
| Source address pointer is incremented by a double Word (64 bits)). | |
| #define | MDMA_DEST_DEC_BYTE ((uint32_t)MDMA_CTCR_DINC) |
| Source address pointer is decremented by a BYTE (8 bits). | |
| #define | MDMA_DEST_DEC_HALFWORD ((uint32_t)MDMA_CTCR_DINC | (uint32_t)MDMA_CTCR_DINCOS_0) |
| Source address pointer is decremented by a half Word (16 bits). | |
| #define | MDMA_DEST_DEC_WORD ((uint32_t)MDMA_CTCR_DINC | (uint32_t)MDMA_CTCR_DINCOS_1) |
| Source address pointer is decremented by a Word (32 bits). | |
| #define | MDMA_DEST_DEC_DOUBLEWORD ((uint32_t)MDMA_CTCR_DINC | (uint32_t)MDMA_CTCR_DINCOS) |
| Source address pointer is decremented by a double Word (64 bits)). | |
| #define | MDMA_SRC_DATASIZE_BYTE ((uint32_t)0x00000000U) |
| Source data size is Byte. | |
| #define | MDMA_SRC_DATASIZE_HALFWORD ((uint32_t)MDMA_CTCR_SSIZE_0) |
| Source data size is half word. | |
| #define | MDMA_SRC_DATASIZE_WORD ((uint32_t)MDMA_CTCR_SSIZE_1) |
| Source data size is word. | |
| #define | MDMA_SRC_DATASIZE_DOUBLEWORD ((uint32_t)MDMA_CTCR_SSIZE) |
| Source data size is double word. | |
| #define | MDMA_DEST_DATASIZE_BYTE ((uint32_t)0x00000000U) |
| Destination data size is Byte. | |
| #define | MDMA_DEST_DATASIZE_HALFWORD ((uint32_t)MDMA_CTCR_DSIZE_0) |
| Destination data size is half word. | |
| #define | MDMA_DEST_DATASIZE_WORD ((uint32_t)MDMA_CTCR_DSIZE_1) |
| Destination data size is word. | |
| #define | MDMA_DEST_DATASIZE_DOUBLEWORD ((uint32_t)MDMA_CTCR_DSIZE) |
| Destination data size is double word. | |
| #define | MDMA_DATAALIGN_PACKENABLE ((uint32_t)MDMA_CTCR_PKE) |
| The source data is packed/un-packed into the destination data size All data are right aligned, in Little Endien mode. | |
| #define | MDMA_DATAALIGN_RIGHT ((uint32_t)0x00000000U) |
| Right Aligned, padded w/ 0s (default). | |
| #define | MDMA_DATAALIGN_RIGHT_SIGNED ((uint32_t)MDMA_CTCR_PAM_0) |
| Right Aligned, Sign extended , Note : this mode is allowed only if the Source data size is smaller than Destination data size. | |
| #define | MDMA_DATAALIGN_LEFT ((uint32_t)MDMA_CTCR_PAM_1) |
| Left Aligned (padded with 0s). | |
| #define | MDMA_SOURCE_BURST_SINGLE ((uint32_t)0x00000000U) |
| single transfer | |
| #define | MDMA_SOURCE_BURST_2BEATS ((uint32_t)MDMA_CTCR_SBURST_0) |
| Burst 2 beats. | |
| #define | MDMA_SOURCE_BURST_4BEATS ((uint32_t)MDMA_CTCR_SBURST_1) |
| Burst 4 beats. | |
| #define | MDMA_SOURCE_BURST_8BEATS ((uint32_t)MDMA_CTCR_SBURST_0 | (uint32_t)MDMA_CTCR_SBURST_1) |
| Burst 8 beats. | |
| #define | MDMA_SOURCE_BURST_16BEATS ((uint32_t)MDMA_CTCR_SBURST_2) |
| Burst 16 beats. | |
| #define | MDMA_SOURCE_BURST_32BEATS ((uint32_t)MDMA_CTCR_SBURST_0 | (uint32_t)MDMA_CTCR_SBURST_2) |
| Burst 32 beats. | |
| #define | MDMA_SOURCE_BURST_64BEATS ((uint32_t)MDMA_CTCR_SBURST_1 | (uint32_t)MDMA_CTCR_SBURST_2) |
| Burst 64 beats. | |
| #define | MDMA_SOURCE_BURST_128BEATS ((uint32_t)MDMA_CTCR_SBURST) |
| Burst 128 beats. | |
| #define | MDMA_DEST_BURST_SINGLE ((uint32_t)0x00000000U) |
| single transfer | |
| #define | MDMA_DEST_BURST_2BEATS ((uint32_t)MDMA_CTCR_DBURST_0) |
| Burst 2 beats. | |
| #define | MDMA_DEST_BURST_4BEATS ((uint32_t)MDMA_CTCR_DBURST_1) |
| Burst 4 beats. | |
| #define | MDMA_DEST_BURST_8BEATS ((uint32_t)MDMA_CTCR_DBURST_0 | (uint32_t)MDMA_CTCR_DBURST_1) |
| Burst 8 beats. | |
| #define | MDMA_DEST_BURST_16BEATS ((uint32_t)MDMA_CTCR_DBURST_2) |
| Burst 16 beats. | |
| #define | MDMA_DEST_BURST_32BEATS ((uint32_t)MDMA_CTCR_DBURST_0 | (uint32_t)MDMA_CTCR_DBURST_2) |
| Burst 32 beats. | |
| #define | MDMA_DEST_BURST_64BEATS ((uint32_t)MDMA_CTCR_DBURST_1 | (uint32_t)MDMA_CTCR_DBURST_2) |
| Burst 64 beats. | |
| #define | MDMA_DEST_BURST_128BEATS ((uint32_t)MDMA_CTCR_DBURST) |
| Burst 128 beats. | |
| #define | MDMA_IT_TE ((uint32_t)MDMA_CCR_TEIE) |
| Transfer Error interrupt. | |
| #define | MDMA_IT_CTC ((uint32_t)MDMA_CCR_CTCIE) |
| Channel Transfer Complete interrupt. | |
| #define | MDMA_IT_BRT ((uint32_t)MDMA_CCR_BRTIE) |
| Block Repeat Transfer interrupt. | |
| #define | MDMA_IT_BT ((uint32_t)MDMA_CCR_BTIE) |
| Block Transfer interrupt. | |
| #define | MDMA_IT_BFTC ((uint32_t)MDMA_CCR_TCIE) |
| Buffer Transfer Complete interrupt. | |
| #define | MDMA_FLAG_TE ((uint32_t)MDMA_CISR_TEIF) |
| Transfer Error flag. | |
| #define | MDMA_FLAG_CTC ((uint32_t)MDMA_CISR_CTCIF) |
| Channel Transfer Complete flag. | |
| #define | MDMA_FLAG_BRT ((uint32_t)MDMA_CISR_BRTIF) |
| Block Repeat Transfer complete flag. | |
| #define | MDMA_FLAG_BT ((uint32_t)MDMA_CISR_BTIF) |
| Block Transfer complete flag. | |
| #define | MDMA_FLAG_BFTC ((uint32_t)MDMA_CISR_TCIF) |
| BuFfer Transfer complete flag. | |
| #define | MDMA_FLAG_CRQA ((uint32_t)MDMA_CISR_CRQA) |
| Channel request Active flag. | |
| #define | __HAL_MDMA_ENABLE(__HANDLE__) |
| Enable the specified MDMA Channel. | |
| #define | __HAL_MDMA_DISABLE(__HANDLE__) |
| Disable the specified MDMA Channel. | |
| #define | __HAL_MDMA_GET_FLAG(__HANDLE__, __FLAG__) |
| Get the MDMA Channel pending flags. | |
| #define | __HAL_MDMA_CLEAR_FLAG(__HANDLE__, __FLAG__) |
| Clear the MDMA Stream pending flags. | |
| #define | __HAL_MDMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) |
| Enables the specified MDMA Channel interrupts. | |
| #define | __HAL_MDMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) |
| Disables the specified MDMA Channel interrupts. | |
| #define | __HAL_MDMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) |
| Checks whether the specified MDMA Channel interrupt is enabled or not. | |
| #define | __HAL_MDMA_SET_COUNTER(__HANDLE__, __COUNTER__) |
| Writes the number of data in bytes to be transferred on the MDMA Channelx. | |
| #define | __HAL_MDMA_GET_COUNTER(__HANDLE__) |
| Returns the number of remaining data in bytes in the current MDMA Channelx transfer. | |
| #define | IS_MDMA_LEVEL_COMPLETE(__LEVEL__) |
| #define | IS_MDMA_PRIORITY(__PRIORITY__) |
| #define | IS_MDMA_ENDIANNESS_MODE(__ENDIANNESS__) |
| #define | IS_MDMA_REQUEST(__REQUEST__) |
| #define | IS_MDMA_SOURCE_INC(__INC__) |
| #define | IS_MDMA_DESTINATION_INC(__INC__) |
| #define | IS_MDMA_SOURCE_DATASIZE(__SIZE__) |
| #define | IS_MDMA_DESTINATION_DATASIZE(__SIZE__) |
| #define | IS_MDMA_DATA_ALIGNMENT(__ALIGNMENT__) |
| #define | IS_MDMA_SOURCE_BURST(__BURST__) |
| #define | IS_MDMA_DESTINATION_BURST(__BURST__) |
| #define | IS_MDMA_TRANSFER_TRIGGER_MODE(__MODE__) |
| #define | IS_MDMA_BUFFER_TRANSFER_LENGTH(__LENGTH__) |
| #define | IS_MDMA_BLOCK_COUNT(__COUNT__) |
| #define | IS_MDMA_TRANSFER_LENGTH(SIZE) |
| #define | IS_MDMA_BLOCK_ADDR_OFFSET(__BLOCK_ADD_OFFSET__) |
Typedefs | |
| typedef struct __MDMA_HandleTypeDef | MDMA_HandleTypeDef |
| MDMA handle Structure definition. | |
Enumerations | |
| enum | HAL_MDMA_StateTypeDef { HAL_MDMA_STATE_RESET = 0x00U , HAL_MDMA_STATE_READY = 0x01U , HAL_MDMA_STATE_BUSY = 0x02U , HAL_MDMA_STATE_ERROR = 0x03U , HAL_MDMA_STATE_ABORT = 0x04U } |
| HAL MDMA State structure definition. More... | |
| enum | HAL_MDMA_LevelCompleteTypeDef { HAL_MDMA_FULL_TRANSFER = 0x00U , HAL_MDMA_BUFFER_TRANSFER = 0x01U , HAL_MDMA_BLOCK_TRANSFER = 0x02U , HAL_MDMA_REPEAT_BLOCK_TRANSFER = 0x03U } |
| HAL MDMA Level Complete structure definition. More... | |
| enum | HAL_MDMA_CallbackIDTypeDef { HAL_MDMA_XFER_CPLT_CB_ID = 0x00U , HAL_MDMA_XFER_BUFFERCPLT_CB_ID = 0x01U , HAL_MDMA_XFER_BLOCKCPLT_CB_ID = 0x02U , HAL_MDMA_XFER_REPBLOCKCPLT_CB_ID = 0x03U , HAL_MDMA_XFER_ERROR_CB_ID = 0x04U , HAL_MDMA_XFER_ABORT_CB_ID = 0x05U , HAL_MDMA_XFER_ALL_CB_ID = 0x06U } |
| HAL MDMA Callbacks IDs structure definition. More... | |
Header file of DMA HAL module.
Copyright (c) 2017 STMicroelectronics. All rights reserved.
This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.
Definition in file stm32h7xx_hal_mdma.h.