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stm32h7xx_hal_mdma.h
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1/**
2 ******************************************************************************
3 * @file stm32h7xx_hal_mdma.h
4 * @author MCD Application Team
5 * @brief Header file of DMA HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19/* Define to prevent recursive inclusion -------------------------------------*/
20#ifndef STM32H7xx_HAL_MDMA_H
21#define STM32H7xx_HAL_MDMA_H
22
23#ifdef __cplusplus
24 extern "C" {
25#endif
26
27/* Includes ------------------------------------------------------------------*/
28#include "stm32h7xx_hal_def.h"
29
30/** @addtogroup STM32H7xx_HAL_Driver
31 * @{
32 */
33
34/** @addtogroup MDMA
35 * @{
36 */
37
38/* Exported types ------------------------------------------------------------*/
39
40/** @defgroup MDMA_Exported_Types MDMA Exported Types
41 * @brief MDMA Exported Types
42 * @{
43 */
44
45/**
46 * @brief MDMA Configuration Structure definition
47 */
48typedef struct
49{
50
51 uint32_t Request; /*!< Specifies the MDMA request.
52 This parameter can be a value of @ref MDMA_Request_selection*/
53
54 uint32_t TransferTriggerMode; /*!< Specifies the Trigger Transfer mode : each request triggers a :
55 a buffer transfer, a block transfer, a repeated block transfer or a linked list transfer
56 This parameter can be a value of @ref MDMA_Transfer_TriggerMode */
57
58 uint32_t Priority; /*!< Specifies the software priority for the MDMAy channelx.
59 This parameter can be a value of @ref MDMA_Priority_level */
60
61 uint32_t Endianness; /*!< Specifies if the MDMA transactions preserve the Little endianness.
62 This parameter can be a value of @ref MDMA_Endianness */
63
64 uint32_t SourceInc; /*!< Specifies if the Source increment mode .
65 This parameter can be a value of @ref MDMA_Source_increment_mode */
66
67 uint32_t DestinationInc; /*!< Specifies if the Destination increment mode .
68 This parameter can be a value of @ref MDMA_Destination_increment_mode */
69
70 uint32_t SourceDataSize; /*!< Specifies the source data size.
71 This parameter can be a value of @ref MDMA_Source_data_size */
72
73 uint32_t DestDataSize; /*!< Specifies the destination data size.
74 This parameter can be a value of @ref MDMA_Destination_data_size */
75
76
77 uint32_t DataAlignment; /*!< Specifies the source to destination Memory data packing/padding mode.
78 This parameter can be a value of @ref MDMA_data_Alignment */
79
80 uint32_t BufferTransferLength; /*!< Specifies the buffer Transfer Length (number of bytes),
81 this is the number of bytes to be transferred in a single transfer (1 byte to 128 bytes)*/
82
83 uint32_t SourceBurst; /*!< Specifies the Burst transfer configuration for the source memory transfers.
84 It specifies the amount of data to be transferred in a single non interruptible
85 transaction.
86 This parameter can be a value of @ref MDMA_Source_burst
87 @note : the burst may be FIXED/INCR based on SourceInc value ,
88 the BURST must be programmed as to ensure that the burst size will be lower than than
89 BufferTransferLength */
90
91 uint32_t DestBurst; /*!< Specifies the Burst transfer configuration for the destination memory transfers.
92 It specifies the amount of data to be transferred in a single non interruptible
93 transaction.
94 This parameter can be a value of @ref MDMA_Destination_burst
95 @note : the burst may be FIXED/INCR based on DestinationInc value ,
96 the BURST must be programmed as to ensure that the burst size will be lower than than
97 BufferTransferLength */
98
99 int32_t SourceBlockAddressOffset; /*!< this field specifies the Next block source address offset
100 signed value : if > 0 then increment the next block source Address by offset from where the last block ends
101 if < 0 then decrement the next block source Address by offset from where the last block ends
102 if == 0, the next block source address starts from where the last block ends
103 */
104
105
106 int32_t DestBlockAddressOffset; /*!< this field specifies the Next block destination address offset
107 signed value : if > 0 then increment the next block destination Address by offset from where the last block ends
108 if < 0 then decrement the next block destination Address by offset from where the last block ends
109 if == 0, the next block destination address starts from where the last block ends
110 */
111
113
114/**
115 * @brief HAL MDMA linked list node structure definition
116 * @note The Linked list node allows to define a new MDMA configuration
117 * (CTCR ,CBNDTR ,CSAR ,CDAR ,CBRUR, CLAR, CTBR, CMAR and CMDR registers).
118 * When CLAR register is configured to a non NULL value , each time a transfer ends,
119 * a new configuration (linked list node) is automatically loaded from the address given in CLAR register.
120 */
121typedef struct
122{
123 __IO uint32_t CTCR; /*!< New CTCR register configuration for the given MDMA linked list node */
124 __IO uint32_t CBNDTR; /*!< New CBNDTR register configuration for the given MDMA linked list node */
125 __IO uint32_t CSAR; /*!< New CSAR register configuration for the given MDMA linked list node */
126 __IO uint32_t CDAR; /*!< New CDAR register configuration for the given MDMA linked list node */
127 __IO uint32_t CBRUR; /*!< New CBRUR register configuration for the given MDMA linked list node */
128 __IO uint32_t CLAR; /*!< New CLAR register configuration for the given MDMA linked list node */
129 __IO uint32_t CTBR; /*!< New CTBR register configuration for the given MDMA linked list node */
130 __IO uint32_t Reserved; /*!< Reserved register */
131 __IO uint32_t CMAR; /*!< New CMAR register configuration for the given MDMA linked list node */
132 __IO uint32_t CMDR; /*!< New CMDR register configuration for the given MDMA linked list node */
133
135
136/**
137 * @brief HAL MDMA linked list node configuration structure definition
138 * @note used with HAL_MDMA_LinkedList_CreateNode function
139 */
140typedef struct
141{
142 MDMA_InitTypeDef Init; /*!< configuration of the specified MDMA Linked List Node */
143 uint32_t SrcAddress; /*!< The source memory address for the Linked list Node */
144 uint32_t DstAddress; /*!< The destination memory address for the Linked list Node */
145 uint32_t BlockDataLength; /*!< The data length of a block in bytes */
146 uint32_t BlockCount; /*!< The number of blocks to be transferred */
147
148 uint32_t PostRequestMaskAddress; /*!< specifies the address to be updated (written) with PostRequestMaskData after a request is served.
149 PostRequestMaskAddress and PostRequestMaskData could be used to automatically clear a peripheral flag when the request is served */
150
151 uint32_t PostRequestMaskData; /*!< specifies the value to be written to PostRequestMaskAddress after a request is served.
152 PostRequestMaskAddress and PostRequestMaskData could be used to automatically clear a peripheral flag when the request is served */
153
154
156
157
158/**
159 * @brief HAL MDMA State structure definition
160 */
161typedef enum
162{
163 HAL_MDMA_STATE_RESET = 0x00U, /*!< MDMA not yet initialized or disabled */
164 HAL_MDMA_STATE_READY = 0x01U, /*!< MDMA initialized and ready for use */
165 HAL_MDMA_STATE_BUSY = 0x02U, /*!< MDMA process is ongoing */
166 HAL_MDMA_STATE_ERROR = 0x03U, /*!< MDMA error state */
167 HAL_MDMA_STATE_ABORT = 0x04U, /*!< MDMA Abort state */
168
170
171/**
172 * @brief HAL MDMA Level Complete structure definition
173 */
174typedef enum
175{
176 HAL_MDMA_FULL_TRANSFER = 0x00U, /*!< Full transfer */
177 HAL_MDMA_BUFFER_TRANSFER = 0x01U, /*!< Buffer Transfer */
178 HAL_MDMA_BLOCK_TRANSFER = 0x02U, /*!< Block Transfer */
179 HAL_MDMA_REPEAT_BLOCK_TRANSFER = 0x03U /*!< repeat block Transfer */
180
182
183/**
184 * @brief HAL MDMA Callbacks IDs structure definition
185 */
186typedef enum
187{
188 HAL_MDMA_XFER_CPLT_CB_ID = 0x00U, /*!< Full transfer */
189 HAL_MDMA_XFER_BUFFERCPLT_CB_ID = 0x01U, /*!< Buffer Transfer */
190 HAL_MDMA_XFER_BLOCKCPLT_CB_ID = 0x02U, /*!< Block Transfer */
191 HAL_MDMA_XFER_REPBLOCKCPLT_CB_ID = 0x03U, /*!< Repeated Block Transfer */
192 HAL_MDMA_XFER_ERROR_CB_ID = 0x04U, /*!< Error */
193 HAL_MDMA_XFER_ABORT_CB_ID = 0x05U, /*!< Abort */
194 HAL_MDMA_XFER_ALL_CB_ID = 0x06U /*!< All */
195
197
198
199/**
200 * @brief MDMA handle Structure definition
201 */
203{
204 MDMA_Channel_TypeDef *Instance; /*!< Register base address */
205
206 MDMA_InitTypeDef Init; /*!< MDMA communication parameters */
207
208 HAL_LockTypeDef Lock; /*!< MDMA locking object */
209
210 __IO HAL_MDMA_StateTypeDef State; /*!< MDMA transfer state */
211
212 void *Parent; /*!< Parent object state */
213
214 void (* XferCpltCallback)( struct __MDMA_HandleTypeDef * hmdma); /*!< MDMA transfer complete callback */
215
216 void (* XferBufferCpltCallback)( struct __MDMA_HandleTypeDef * hmdma); /*!< MDMA buffer transfer complete callback */
217
218 void (* XferBlockCpltCallback)( struct __MDMA_HandleTypeDef * hmdma); /*!< MDMA block transfer complete callback */
219
220 void (* XferRepeatBlockCpltCallback)( struct __MDMA_HandleTypeDef * hmdma); /*!< MDMA block transfer repeat callback */
221
222 void (* XferErrorCallback)( struct __MDMA_HandleTypeDef * hmdma); /*!< MDMA transfer error callback */
223
224 void (* XferAbortCallback)( struct __MDMA_HandleTypeDef * hmdma); /*!< MDMA transfer Abort callback */
225
226
227 MDMA_LinkNodeTypeDef *FirstLinkedListNodeAddress; /*!< specifies the first node address of the transfer list
228 (after the initial node defined by the Init struct)
229 this parameter is used internally by the MDMA driver
230 to construct the linked list node
231 */
232
233 MDMA_LinkNodeTypeDef *LastLinkedListNodeAddress; /*!< specifies the last node address of the transfer list
234 this parameter is used internally by the MDMA driver
235 to construct the linked list node
236 */
237 uint32_t LinkedListNodeCounter; /*!< Number of nodes in the MDMA linked list */
238
239 __IO uint32_t ErrorCode; /*!< MDMA Error code */
240
242
243/**
244 * @}
245 */
246
247/* Exported constants --------------------------------------------------------*/
248
249/** @defgroup MDMA_Exported_Constants MDMA Exported Constants
250 * @brief MDMA Exported constants
251 * @{
252 */
253
254/** @defgroup MDMA_Error_Codes MDMA Error Codes
255 * @brief MDMA Error Codes
256 * @{
257 */
258#define HAL_MDMA_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
259#define HAL_MDMA_ERROR_READ_XFER ((uint32_t)0x00000001U) /*!< Read Transfer error */
260#define HAL_MDMA_ERROR_WRITE_XFER ((uint32_t)0x00000002U) /*!< Write Transfer error */
261#define HAL_MDMA_ERROR_MASK_DATA ((uint32_t)0x00000004U) /*!< Error Mask Data error */
262#define HAL_MDMA_ERROR_LINKED_LIST ((uint32_t)0x00000008U) /*!< Linked list Data error */
263#define HAL_MDMA_ERROR_ALIGNMENT ((uint32_t)0x00000010U) /*!< Address/Size alignment error */
264#define HAL_MDMA_ERROR_BLOCK_SIZE ((uint32_t)0x00000020U) /*!< Block Size error */
265#define HAL_MDMA_ERROR_TIMEOUT ((uint32_t)0x00000040U) /*!< Timeout error */
266#define HAL_MDMA_ERROR_NO_XFER ((uint32_t)0x00000080U) /*!< Abort or SW trigger requested with no Xfer ongoing */
267#define HAL_MDMA_ERROR_BUSY ((uint32_t)0x00000100U) /*!< DeInit or SW trigger requested with Xfer ongoing */
268
269/**
270 * @}
271 */
272
273/** @defgroup MDMA_Request_selection MDMA Request selection
274 * @brief MDMA_Request_selection
275 * @{
276 */
277
278#define MDMA_REQUEST_DMA1_Stream0_TC ((uint32_t)0x00000000U) /*!< MDMA HW request is DMA1 Stream 0 Transfer Complete Flag */
279#define MDMA_REQUEST_DMA1_Stream1_TC ((uint32_t)0x00000001U) /*!< MDMA HW request is DMA1 Stream 1 Transfer Complete Flag */
280#define MDMA_REQUEST_DMA1_Stream2_TC ((uint32_t)0x00000002U) /*!< MDMA HW request is DMA1 Stream 2 Transfer Complete Flag */
281#define MDMA_REQUEST_DMA1_Stream3_TC ((uint32_t)0x00000003U) /*!< MDMA HW request is DMA1 Stream 3 Transfer Complete Flag */
282#define MDMA_REQUEST_DMA1_Stream4_TC ((uint32_t)0x00000004U) /*!< MDMA HW request is DMA1 Stream 4 Transfer Complete Flag */
283#define MDMA_REQUEST_DMA1_Stream5_TC ((uint32_t)0x00000005U) /*!< MDMA HW request is DMA1 Stream 5 Transfer Complete Flag */
284#define MDMA_REQUEST_DMA1_Stream6_TC ((uint32_t)0x00000006U) /*!< MDMA HW request is DMA1 Stream 6 Transfer Complete Flag */
285#define MDMA_REQUEST_DMA1_Stream7_TC ((uint32_t)0x00000007U) /*!< MDMA HW request is DMA1 Stream 7 Transfer Complete Flag */
286#define MDMA_REQUEST_DMA2_Stream0_TC ((uint32_t)0x00000008U) /*!< MDMA HW request is DMA2 Stream 0 Transfer Complete Flag */
287#define MDMA_REQUEST_DMA2_Stream1_TC ((uint32_t)0x00000009U) /*!< MDMA HW request is DMA2 Stream 1 Transfer Complete Flag */
288#define MDMA_REQUEST_DMA2_Stream2_TC ((uint32_t)0x0000000AU) /*!< MDMA HW request is DMA2 Stream 2 Transfer Complete Flag */
289#define MDMA_REQUEST_DMA2_Stream3_TC ((uint32_t)0x0000000BU) /*!< MDMA HW request is DMA2 Stream 3 Transfer Complete Flag */
290#define MDMA_REQUEST_DMA2_Stream4_TC ((uint32_t)0x0000000CU) /*!< MDMA HW request is DMA2 Stream 4 Transfer Complete Flag */
291#define MDMA_REQUEST_DMA2_Stream5_TC ((uint32_t)0x0000000DU) /*!< MDMA HW request is DMA2 Stream 5 Transfer Complete Flag */
292#define MDMA_REQUEST_DMA2_Stream6_TC ((uint32_t)0x0000000EU) /*!< MDMA HW request is DMA2 Stream 6 Transfer Complete Flag */
293#define MDMA_REQUEST_DMA2_Stream7_TC ((uint32_t)0x0000000FU) /*!< MDMA HW request is DMA2 Stream 7 Transfer Complete Flag */
294#if defined (LTDC)
295#define MDMA_REQUEST_LTDC_LINE_IT ((uint32_t)0x00000010U) /*!< MDMA HW request is LTDC Line interrupt Flag */
296#endif /* LTDC */
297#if defined (JPEG)
298#define MDMA_REQUEST_JPEG_INFIFO_TH ((uint32_t)0x00000011U) /*!< MDMA HW request is JPEG Input FIFO threshold Flag */
299#define MDMA_REQUEST_JPEG_INFIFO_NF ((uint32_t)0x00000012U) /*!< MDMA HW request is JPEG Input FIFO not full Flag */
300#define MDMA_REQUEST_JPEG_OUTFIFO_TH ((uint32_t)0x00000013U) /*!< MDMA HW request is JPEG Output FIFO threshold Flag */
301#define MDMA_REQUEST_JPEG_OUTFIFO_NE ((uint32_t)0x00000014U) /*!< MDMA HW request is JPEG Output FIFO not empty Flag */
302#define MDMA_REQUEST_JPEG_END_CONVERSION ((uint32_t)0x00000015U) /*!< MDMA HW request is JPEG End of conversion Flag */
303#endif /* JPEG */
304#if defined (OCTOSPI1)
305#define MDMA_REQUEST_OCTOSPI1_FIFO_TH ((uint32_t)0x00000016U) /*!< MDMA HW request is OCTOSPI1 FIFO threshold Flag */
306#define MDMA_REQUEST_OCTOSPI1_TC ((uint32_t)0x00000017U) /*!< MDMA HW request is OCTOSPI1 Transfer complete Flag */
307#endif /* OCTOSPI1 */
308#if defined (QUADSPI)
309#define MDMA_REQUEST_QUADSPI_FIFO_TH ((uint32_t)0x00000016U) /*!< MDMA HW request is QSPI FIFO threshold Flag */
310#define MDMA_REQUEST_QUADSPI_TC ((uint32_t)0x00000017U) /*!< MDMA HW request is QSPI Transfer complete Flag */
311#endif /* QUADSPI */
312#define MDMA_REQUEST_DMA2D_CLUT_TC ((uint32_t)0x00000018U) /*!< MDMA HW request is DMA2D CLUT Transfer Complete Flag */
313#define MDMA_REQUEST_DMA2D_TC ((uint32_t)0x00000019U) /*!< MDMA HW request is DMA2D Transfer Complete Flag */
314#define MDMA_REQUEST_DMA2D_TW ((uint32_t)0x0000001AU) /*!< MDMA HW request is DMA2D Transfer Watermark Flag */
315
316#if defined (DSI)
317#define MDMA_REQUEST_DSI_TEARING_EFFECT ((uint32_t)0x0000001BU) /*!< MDMA HW request is DSI Tearing Effect Flag */
318#define MDMA_REQUEST_DSI_END_REFRESH ((uint32_t)0x0000001CU) /*!< MDMA HW request is DSI End of refresh Flag */
319#endif /* DSI */
320
321#define MDMA_REQUEST_SDMMC1_END_DATA ((uint32_t)0x0000001DU) /*!< MDMA HW request is SDMMC1 End of Data Flag */
322
323#define MDMA_REQUEST_SDMMC1_DMA_ENDBUFFER ((uint32_t)0x0000001EU) /*!< MDMA HW request is SDMMC1 Internal DMA buffer End Flag */
324#define MDMA_REQUEST_SDMMC1_COMMAND_END ((uint32_t)0x0000001FU) /*!< MDMA HW request is SDMMC1 Command End Flag */
325
326#if defined (OCTOSPI2)
327#define MDMA_REQUEST_OCTOSPI2_FIFO_TH ((uint32_t)0x00000020U) /*!< MDMA HW request is OCTOSPI2 FIFO threshold Flag */
328#define MDMA_REQUEST_OCTOSPI2_TC ((uint32_t)0x00000021U) /*!< MDMA HW request is OCTOSPI2 Transfer complete Flag */
329#endif /* OCTOSPI2 */
330
331#define MDMA_REQUEST_SW ((uint32_t)0x40000000U) /*!< MDMA SW request */
332
333/**
334 * @}
335 */
336
337/** @defgroup MDMA_Transfer_TriggerMode MDMA Transfer Trigger Mode
338 * @brief MDMA Transfer Trigger Mode
339 * @{
340 */
341#define MDMA_BUFFER_TRANSFER ((uint32_t)0x00000000U) /*!< Each MDMA request (SW or HW) triggers a buffer transfer */
342#define MDMA_BLOCK_TRANSFER ((uint32_t)MDMA_CTCR_TRGM_0) /*!< Each MDMA request (SW or HW) triggers a block transfer */
343#define MDMA_REPEAT_BLOCK_TRANSFER ((uint32_t)MDMA_CTCR_TRGM_1) /*!< Each MDMA request (SW or HW) triggers a repeated block transfer */
344#define MDMA_FULL_TRANSFER ((uint32_t)MDMA_CTCR_TRGM) /*!< Each MDMA request (SW or HW) triggers a Full transfer or a linked list transfer if any */
345
346/**
347 * @}
348 */
349
350/** @defgroup MDMA_Priority_level MDMA Priority level
351 * @brief MDMA Priority level
352 * @{
353 */
354#define MDMA_PRIORITY_LOW ((uint32_t)0x00000000U) /*!< Priority level: Low */
355#define MDMA_PRIORITY_MEDIUM ((uint32_t)MDMA_CCR_PL_0) /*!< Priority level: Medium */
356#define MDMA_PRIORITY_HIGH ((uint32_t)MDMA_CCR_PL_1) /*!< Priority level: High */
357#define MDMA_PRIORITY_VERY_HIGH ((uint32_t)MDMA_CCR_PL) /*!< Priority level: Very High */
358
359/**
360 * @}
361 */
362
363
364/** @defgroup MDMA_Endianness MDMA Endianness
365 * @brief MDMA Endianness
366 * @{
367 */
368#define MDMA_LITTLE_ENDIANNESS_PRESERVE ((uint32_t)0x00000000U) /*!< little endianness preserve */
369#define MDMA_LITTLE_BYTE_ENDIANNESS_EXCHANGE ((uint32_t)MDMA_CCR_BEX) /*!< BYTEs endianness exchange when destination data size is > Byte */
370#define MDMA_LITTLE_HALFWORD_ENDIANNESS_EXCHANGE ((uint32_t)MDMA_CCR_HEX) /*!< HALF WORDs endianness exchange when destination data size is > HALF WORD */
371#define MDMA_LITTLE_WORD_ENDIANNESS_EXCHANGE ((uint32_t)MDMA_CCR_WEX) /*!< WORDs endianness exchange when destination data size is > DOUBLE WORD */
372
373/**
374 * @}
375 */
376
377/** @defgroup MDMA_Source_increment_mode MDMA Source increment mode
378 * @brief MDMA Source increment mode
379 * @{
380 */
381#define MDMA_SRC_INC_DISABLE ((uint32_t)0x00000000U) /*!< Source address pointer is fixed */
382#define MDMA_SRC_INC_BYTE ((uint32_t)MDMA_CTCR_SINC_1) /*!< Source address pointer is incremented by a BYTE (8 bits) */
383#define MDMA_SRC_INC_HALFWORD ((uint32_t)MDMA_CTCR_SINC_1 | (uint32_t)MDMA_CTCR_SINCOS_0) /*!< Source address pointer is incremented by a half Word (16 bits) */
384#define MDMA_SRC_INC_WORD ((uint32_t)MDMA_CTCR_SINC_1 | (uint32_t)MDMA_CTCR_SINCOS_1) /*!< Source address pointer is incremented by a Word (32 bits) */
385#define MDMA_SRC_INC_DOUBLEWORD ((uint32_t)MDMA_CTCR_SINC_1 | (uint32_t)MDMA_CTCR_SINCOS) /*!< Source address pointer is incremented by a double Word (64 bits)) */
386#define MDMA_SRC_DEC_BYTE ((uint32_t)MDMA_CTCR_SINC) /*!< Source address pointer is decremented by a BYTE (8 bits) */
387#define MDMA_SRC_DEC_HALFWORD ((uint32_t)MDMA_CTCR_SINC | (uint32_t)MDMA_CTCR_SINCOS_0) /*!< Source address pointer is decremented by a half Word (16 bits) */
388#define MDMA_SRC_DEC_WORD ((uint32_t)MDMA_CTCR_SINC | (uint32_t)MDMA_CTCR_SINCOS_1) /*!< Source address pointer is decremented by a Word (32 bits) */
389#define MDMA_SRC_DEC_DOUBLEWORD ((uint32_t)MDMA_CTCR_SINC | (uint32_t)MDMA_CTCR_SINCOS) /*!< Source address pointer is decremented by a double Word (64 bits)) */
390
391/**
392 * @}
393 */
394
395/** @defgroup MDMA_Destination_increment_mode MDMA Destination increment mode
396 * @brief MDMA Destination increment mode
397 * @{
398 */
399#define MDMA_DEST_INC_DISABLE ((uint32_t)0x00000000U) /*!< Source address pointer is fixed */
400#define MDMA_DEST_INC_BYTE ((uint32_t)MDMA_CTCR_DINC_1) /*!< Source address pointer is incremented by a BYTE (8 bits) */
401#define MDMA_DEST_INC_HALFWORD ((uint32_t)MDMA_CTCR_DINC_1 | (uint32_t)MDMA_CTCR_DINCOS_0) /*!< Source address pointer is incremented by a half Word (16 bits) */
402#define MDMA_DEST_INC_WORD ((uint32_t)MDMA_CTCR_DINC_1 | (uint32_t)MDMA_CTCR_DINCOS_1) /*!< Source address pointer is incremented by a Word (32 bits) */
403#define MDMA_DEST_INC_DOUBLEWORD ((uint32_t)MDMA_CTCR_DINC_1 | (uint32_t)MDMA_CTCR_DINCOS) /*!< Source address pointer is incremented by a double Word (64 bits)) */
404#define MDMA_DEST_DEC_BYTE ((uint32_t)MDMA_CTCR_DINC) /*!< Source address pointer is decremented by a BYTE (8 bits) */
405#define MDMA_DEST_DEC_HALFWORD ((uint32_t)MDMA_CTCR_DINC | (uint32_t)MDMA_CTCR_DINCOS_0) /*!< Source address pointer is decremented by a half Word (16 bits) */
406#define MDMA_DEST_DEC_WORD ((uint32_t)MDMA_CTCR_DINC | (uint32_t)MDMA_CTCR_DINCOS_1) /*!< Source address pointer is decremented by a Word (32 bits) */
407#define MDMA_DEST_DEC_DOUBLEWORD ((uint32_t)MDMA_CTCR_DINC | (uint32_t)MDMA_CTCR_DINCOS) /*!< Source address pointer is decremented by a double Word (64 bits)) */
408
409/**
410 * @}
411 */
412
413/** @defgroup MDMA_Source_data_size MDMA Source data size
414 * @brief MDMA Source data size
415 * @{
416 */
417#define MDMA_SRC_DATASIZE_BYTE ((uint32_t)0x00000000U) /*!< Source data size is Byte */
418#define MDMA_SRC_DATASIZE_HALFWORD ((uint32_t)MDMA_CTCR_SSIZE_0) /*!< Source data size is half word */
419#define MDMA_SRC_DATASIZE_WORD ((uint32_t)MDMA_CTCR_SSIZE_1) /*!< Source data size is word */
420#define MDMA_SRC_DATASIZE_DOUBLEWORD ((uint32_t)MDMA_CTCR_SSIZE) /*!< Source data size is double word */
421
422/**
423 * @}
424 */
425
426/** @defgroup MDMA_Destination_data_size MDMA Destination data size
427 * @brief MDMA Destination data size
428 * @{
429 */
430#define MDMA_DEST_DATASIZE_BYTE ((uint32_t)0x00000000U) /*!< Destination data size is Byte */
431#define MDMA_DEST_DATASIZE_HALFWORD ((uint32_t)MDMA_CTCR_DSIZE_0) /*!< Destination data size is half word */
432#define MDMA_DEST_DATASIZE_WORD ((uint32_t)MDMA_CTCR_DSIZE_1) /*!< Destination data size is word */
433#define MDMA_DEST_DATASIZE_DOUBLEWORD ((uint32_t)MDMA_CTCR_DSIZE) /*!< Destination data size is double word */
434
435/**
436 * @}
437 */
438
439/** @defgroup MDMA_data_Alignment MDMA data alignment
440 * @brief MDMA data alignment
441 * @{
442 */
443#define MDMA_DATAALIGN_PACKENABLE ((uint32_t)MDMA_CTCR_PKE) /*!< The source data is packed/un-packed into the destination data size
444 All data are right aligned, in Little Endien mode. */
445#define MDMA_DATAALIGN_RIGHT ((uint32_t)0x00000000U) /*!< Right Aligned, padded w/ 0s (default) */
446#define MDMA_DATAALIGN_RIGHT_SIGNED ((uint32_t)MDMA_CTCR_PAM_0) /*!< Right Aligned, Sign extended ,
447 Note : this mode is allowed only if the Source data size is smaller than Destination data size */
448#define MDMA_DATAALIGN_LEFT ((uint32_t)MDMA_CTCR_PAM_1) /*!< Left Aligned (padded with 0s) */
449
450/**
451 * @}
452 */
453
454/** @defgroup MDMA_Source_burst MDMA Source burst
455 * @brief MDMA Source burst
456 * @{
457 */
458#define MDMA_SOURCE_BURST_SINGLE ((uint32_t)0x00000000U) /*!< single transfer */
459#define MDMA_SOURCE_BURST_2BEATS ((uint32_t)MDMA_CTCR_SBURST_0) /*!< Burst 2 beats */
460#define MDMA_SOURCE_BURST_4BEATS ((uint32_t)MDMA_CTCR_SBURST_1) /*!< Burst 4 beats */
461#define MDMA_SOURCE_BURST_8BEATS ((uint32_t)MDMA_CTCR_SBURST_0 | (uint32_t)MDMA_CTCR_SBURST_1) /*!< Burst 8 beats */
462#define MDMA_SOURCE_BURST_16BEATS ((uint32_t)MDMA_CTCR_SBURST_2) /*!< Burst 16 beats */
463#define MDMA_SOURCE_BURST_32BEATS ((uint32_t)MDMA_CTCR_SBURST_0 | (uint32_t)MDMA_CTCR_SBURST_2) /*!< Burst 32 beats */
464#define MDMA_SOURCE_BURST_64BEATS ((uint32_t)MDMA_CTCR_SBURST_1 | (uint32_t)MDMA_CTCR_SBURST_2) /*!< Burst 64 beats */
465#define MDMA_SOURCE_BURST_128BEATS ((uint32_t)MDMA_CTCR_SBURST) /*!< Burst 128 beats */
466
467/**
468 * @}
469 */
470
471/** @defgroup MDMA_Destination_burst MDMA Destination burst
472 * @brief MDMA Destination burst
473 * @{
474 */
475#define MDMA_DEST_BURST_SINGLE ((uint32_t)0x00000000U) /*!< single transfer */
476#define MDMA_DEST_BURST_2BEATS ((uint32_t)MDMA_CTCR_DBURST_0) /*!< Burst 2 beats */
477#define MDMA_DEST_BURST_4BEATS ((uint32_t)MDMA_CTCR_DBURST_1) /*!< Burst 4 beats */
478#define MDMA_DEST_BURST_8BEATS ((uint32_t)MDMA_CTCR_DBURST_0 | (uint32_t)MDMA_CTCR_DBURST_1) /*!< Burst 8 beats */
479#define MDMA_DEST_BURST_16BEATS ((uint32_t)MDMA_CTCR_DBURST_2) /*!< Burst 16 beats */
480#define MDMA_DEST_BURST_32BEATS ((uint32_t)MDMA_CTCR_DBURST_0 | (uint32_t)MDMA_CTCR_DBURST_2) /*!< Burst 32 beats */
481#define MDMA_DEST_BURST_64BEATS ((uint32_t)MDMA_CTCR_DBURST_1 | (uint32_t)MDMA_CTCR_DBURST_2) /*!< Burst 64 beats */
482#define MDMA_DEST_BURST_128BEATS ((uint32_t)MDMA_CTCR_DBURST) /*!< Burst 128 beats */
483
484/**
485 * @}
486 */
487
488/** @defgroup MDMA_interrupt_enable_definitions MDMA interrupt enable definitions
489 * @brief MDMA interrupt enable definitions
490 * @{
491 */
492#define MDMA_IT_TE ((uint32_t)MDMA_CCR_TEIE) /*!< Transfer Error interrupt */
493#define MDMA_IT_CTC ((uint32_t)MDMA_CCR_CTCIE) /*!< Channel Transfer Complete interrupt */
494#define MDMA_IT_BRT ((uint32_t)MDMA_CCR_BRTIE) /*!< Block Repeat Transfer interrupt */
495#define MDMA_IT_BT ((uint32_t)MDMA_CCR_BTIE) /*!< Block Transfer interrupt */
496#define MDMA_IT_BFTC ((uint32_t)MDMA_CCR_TCIE) /*!< Buffer Transfer Complete interrupt */
497
498/**
499 * @}
500 */
501
502/** @defgroup MDMA_flag_definitions MDMA flag definitions
503 * @brief MDMA flag definitions
504 * @{
505 */
506#define MDMA_FLAG_TE ((uint32_t)MDMA_CISR_TEIF) /*!< Transfer Error flag */
507#define MDMA_FLAG_CTC ((uint32_t)MDMA_CISR_CTCIF) /*!< Channel Transfer Complete flag */
508#define MDMA_FLAG_BRT ((uint32_t)MDMA_CISR_BRTIF) /*!< Block Repeat Transfer complete flag */
509#define MDMA_FLAG_BT ((uint32_t)MDMA_CISR_BTIF) /*!< Block Transfer complete flag */
510#define MDMA_FLAG_BFTC ((uint32_t)MDMA_CISR_TCIF) /*!< BuFfer Transfer complete flag */
511#define MDMA_FLAG_CRQA ((uint32_t)MDMA_CISR_CRQA) /*!< Channel request Active flag */
512
513/**
514 * @}
515 */
516
517/**
518 * @}
519 */
520
521/* Exported macro ------------------------------------------------------------*/
522
523/** @defgroup MDMA_Exported_Macros MDMA Exported Macros
524 * @{
525 */
526
527/**
528 * @brief Enable the specified MDMA Channel.
529 * @param __HANDLE__: MDMA handle
530 * @retval None
531 */
532#define __HAL_MDMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= MDMA_CCR_EN)
533
534/**
535 * @brief Disable the specified MDMA Channel.
536 * @param __HANDLE__: MDMA handle
537 * @retval None
538 */
539#define __HAL_MDMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~MDMA_CCR_EN)
540
541/**
542 * @brief Get the MDMA Channel pending flags.
543 * @param __HANDLE__: MDMA handle
544 * @param __FLAG__: Get the specified flag.
545 * This parameter can be any combination of the following values:
546 * @arg MDMA_FLAG_TE : Transfer Error flag.
547 * @arg MDMA_FLAG_CTC : Channel Transfer Complete flag.
548 * @arg MDMA_FLAG_BRT : Block Repeat Transfer flag.
549 * @arg MDMA_FLAG_BT : Block Transfer complete flag.
550 * @arg MDMA_FLAG_BFTC : BuFfer Transfer Complete flag.
551 * @arg MDMA_FLAG_CRQA : Channel request Active flag.
552 * @retval The state of FLAG (SET or RESET).
553 */
554#define __HAL_MDMA_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CISR & (__FLAG__))
555
556/**
557 * @brief Clear the MDMA Stream pending flags.
558 * @param __HANDLE__: MDMA handle
559 * @param __FLAG__: specifies the flag to clear.
560 * This parameter can be any combination of the following values:
561 * @arg MDMA_FLAG_TE : Transfer Error flag.
562 * @arg MDMA_FLAG_CTC : Channel Transfer Complete flag.
563 * @arg MDMA_FLAG_BRT : Block Repeat Transfer flag.
564 * @arg MDMA_FLAG_BT : Block Transfer complete flag.
565 * @arg MDMA_FLAG_BFTC : BuFfer Transfer Complete flag.
566 * @retval None
567 */
568#define __HAL_MDMA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CIFCR = (__FLAG__))
569
570/**
571 * @brief Enables the specified MDMA Channel interrupts.
572 * @param __HANDLE__: MDMA handle
573 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
574 * This parameter can be any combination of the following values:
575 * @arg MDMA_IT_TE : Transfer Error interrupt mask
576 * @arg MDMA_IT_CTC : Channel Transfer Complete interrupt mask
577 * @arg MDMA_IT_BRT : Block Repeat Transfer interrupt mask
578 * @arg MDMA_IT_BT : Block Transfer interrupt mask
579 * @arg MDMA_IT_BFTC : BuFfer Transfer Complete interrupt mask
580 * @retval None
581 */
582#define __HAL_MDMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__))
583
584/**
585 * @brief Disables the specified MDMA Channel interrupts.
586 * @param __HANDLE__: MDMA handle
587 * @param __INTERRUPT__: specifies the MDMA interrupt sources to be enabled or disabled.
588 * This parameter can be any combination of the following values:
589 * @arg MDMA_IT_TE : Transfer Error interrupt mask
590 * @arg MDMA_IT_CTC : Channel Transfer Complete interrupt mask
591 * @arg MDMA_IT_BRT : Block Repeat Transfer interrupt mask
592 * @arg MDMA_IT_BT : Block Transfer interrupt mask
593 * @arg MDMA_IT_BFTC : BuFfer Transfer Complete interrupt mask
594 * @retval None
595 */
596#define __HAL_MDMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__))
597
598/**
599 * @brief Checks whether the specified MDMA Channel interrupt is enabled or not.
600 * @param __HANDLE__: MDMA handle
601 * @param __INTERRUPT__: specifies the MDMA interrupt source to check.
602 * @arg MDMA_IT_TE : Transfer Error interrupt mask
603 * @arg MDMA_IT_CTC : Channel Transfer Complete interrupt mask
604 * @arg MDMA_IT_BRT : Block Repeat Transfer interrupt mask
605 * @arg MDMA_IT_BT : Block Transfer interrupt mask
606 * @arg MDMA_IT_BFTC : BuFfer Transfer Complete interrupt mask
607 * @retval The state of MDMA_IT (SET or RESET).
608 */
609#define __HAL_MDMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CCR & (__INTERRUPT__)))
610
611/**
612 * @brief Writes the number of data in bytes to be transferred on the MDMA Channelx.
613 * @param __HANDLE__ : MDMA handle
614 * @param __COUNTER__: Number of data in bytes to be transferred.
615 * @retval None
616 */
617#define __HAL_MDMA_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CBNDTR |= ((__COUNTER__) & MDMA_CBNDTR_BNDT))
618
619/**
620 * @brief Returns the number of remaining data in bytes in the current MDMA Channelx transfer.
621 * @param __HANDLE__ : MDMA handle
622 * @retval The number of remaining data in bytes in the current MDMA Channelx transfer.
623 */
624#define __HAL_MDMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CBNDTR & MDMA_CBNDTR_BNDT)
625
626/**
627 * @}
628 */
629
630/* Exported functions --------------------------------------------------------*/
631/** @defgroup MDMA_Exported_Functions MDMA Exported Functions
632 * @{
633 */
634
635/* Initialization and de-initialization functions *****************************/
636/** @defgroup MDMA_Exported_Functions_Group1 Initialization and de-initialization functions
637 * @brief Initialization and de-initialization functions
638 * @{
639 */
642HAL_StatusTypeDef HAL_MDMA_ConfigPostRequestMask(MDMA_HandleTypeDef *hmdma, uint32_t MaskAddress, uint32_t MaskData);
643
646
647/**
648 * @}
649 */
650
651/* Linked list operation functions ********************************************/
652/** @defgroup MDMA_Exported_Functions_Group2 Linked List operation functions
653 * @brief Linked list operation functions
654 * @{
655 */
656
662
663
664/**
665 * @}
666 */
667
668/* IO operation functions *****************************************************/
669/** @defgroup MDMA_Exported_Functions_Group3 I/O operation functions
670 * @brief I/O operation functions
671 * @{
672 */
673HAL_StatusTypeDef HAL_MDMA_Start (MDMA_HandleTypeDef *hmdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t BlockDataLength, uint32_t BlockCount);
674HAL_StatusTypeDef HAL_MDMA_Start_IT(MDMA_HandleTypeDef *hmdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t BlockDataLength, uint32_t BlockCount);
680
681/**
682 * @}
683 */
684
685/* Peripheral State and Error functions ***************************************/
686/** @defgroup MDMA_Exported_Functions_Group4 Peripheral State functions
687 * @brief Peripheral State functions
688 * @{
689 */
692
693/**
694 * @}
695 */
696
697/**
698 * @}
699 */
700
701/* Private types -------------------------------------------------------------*/
702/** @defgroup MDMA_Private_Types MDMA Private Types
703 * @{
704 */
705
706/**
707 * @}
708 */
709
710/* Private defines -----------------------------------------------------------*/
711/** @defgroup MDMA_Private_Defines MDMA Private Defines
712 * @{
713 */
714
715/**
716 * @}
717 */
718
719/* Private variables ---------------------------------------------------------*/
720/** @defgroup MDMA_Private_Variables MDMA Private Variables
721 * @{
722 */
723
724/**
725 * @}
726 */
727
728/* Private constants ---------------------------------------------------------*/
729/** @defgroup MDMA_Private_Constants MDMA Private Constants
730 * @{
731 */
732
733/**
734 * @}
735 */
736
737/* Private macros ------------------------------------------------------------*/
738/** @defgroup MDMA_Private_Macros MDMA Private Macros
739 * @{
740 */
741
742#define IS_MDMA_LEVEL_COMPLETE(__LEVEL__) (((__LEVEL__) == HAL_MDMA_FULL_TRANSFER ) || \
743 ((__LEVEL__) == HAL_MDMA_BUFFER_TRANSFER )|| \
744 ((__LEVEL__) == HAL_MDMA_BLOCK_TRANSFER ) || \
745 ((__LEVEL__) == HAL_MDMA_REPEAT_BLOCK_TRANSFER ))
746
747
748#define IS_MDMA_PRIORITY(__PRIORITY__) (((__PRIORITY__) == MDMA_PRIORITY_LOW ) || \
749 ((__PRIORITY__) == MDMA_PRIORITY_MEDIUM) || \
750 ((__PRIORITY__) == MDMA_PRIORITY_HIGH) || \
751 ((__PRIORITY__) == MDMA_PRIORITY_VERY_HIGH))
752
753#define IS_MDMA_ENDIANNESS_MODE(__ENDIANNESS__) (((__ENDIANNESS__) == MDMA_LITTLE_ENDIANNESS_PRESERVE ) || \
754 ((__ENDIANNESS__) == MDMA_LITTLE_BYTE_ENDIANNESS_EXCHANGE) || \
755 ((__ENDIANNESS__) == MDMA_LITTLE_HALFWORD_ENDIANNESS_EXCHANGE) || \
756 ((__ENDIANNESS__) == MDMA_LITTLE_WORD_ENDIANNESS_EXCHANGE))
757
758
759#if defined (OCTOSPI2)
760#define IS_MDMA_REQUEST(__REQUEST__) (((__REQUEST__) == MDMA_REQUEST_SW ) || ((__REQUEST__) <= MDMA_REQUEST_OCTOSPI2_TC))
761#else
762#define IS_MDMA_REQUEST(__REQUEST__) (((__REQUEST__) == MDMA_REQUEST_SW ) || ((__REQUEST__) <= MDMA_REQUEST_SDMMC1_COMMAND_END))
763#endif /* OCTOSPI2 */
764
765#define IS_MDMA_SOURCE_INC(__INC__) (((__INC__) == MDMA_SRC_INC_DISABLE ) || \
766 ((__INC__) == MDMA_SRC_INC_BYTE ) || \
767 ((__INC__) == MDMA_SRC_INC_HALFWORD ) || \
768 ((__INC__) == MDMA_SRC_INC_WORD ) || \
769 ((__INC__) == MDMA_SRC_INC_DOUBLEWORD) || \
770 ((__INC__) == MDMA_SRC_DEC_BYTE) || \
771 ((__INC__) == MDMA_SRC_DEC_HALFWORD) || \
772 ((__INC__) == MDMA_SRC_DEC_WORD) || \
773 ((__INC__) == MDMA_SRC_DEC_DOUBLEWORD))
774
775#define IS_MDMA_DESTINATION_INC(__INC__) (((__INC__) == MDMA_DEST_INC_DISABLE ) || \
776 ((__INC__) == MDMA_DEST_INC_BYTE ) || \
777 ((__INC__) == MDMA_DEST_INC_HALFWORD ) || \
778 ((__INC__) == MDMA_DEST_INC_WORD ) || \
779 ((__INC__) == MDMA_DEST_INC_DOUBLEWORD) || \
780 ((__INC__) == MDMA_DEST_DEC_BYTE) || \
781 ((__INC__) == MDMA_DEST_DEC_HALFWORD) || \
782 ((__INC__) == MDMA_DEST_DEC_WORD) || \
783 ((__INC__) == MDMA_DEST_DEC_DOUBLEWORD))
784
785#define IS_MDMA_SOURCE_DATASIZE(__SIZE__) (((__SIZE__) == MDMA_SRC_DATASIZE_BYTE ) || \
786 ((__SIZE__) == MDMA_SRC_DATASIZE_HALFWORD ) || \
787 ((__SIZE__) == MDMA_SRC_DATASIZE_WORD ) || \
788 ((__SIZE__) == MDMA_SRC_DATASIZE_DOUBLEWORD))
789
790#define IS_MDMA_DESTINATION_DATASIZE(__SIZE__) (((__SIZE__) == MDMA_DEST_DATASIZE_BYTE ) || \
791 ((__SIZE__) == MDMA_DEST_DATASIZE_HALFWORD ) || \
792 ((__SIZE__) == MDMA_DEST_DATASIZE_WORD ) || \
793 ((__SIZE__) == MDMA_DEST_DATASIZE_DOUBLEWORD))
794
795#define IS_MDMA_DATA_ALIGNMENT(__ALIGNMENT__) (((__ALIGNMENT__) == MDMA_DATAALIGN_PACKENABLE ) || \
796 ((__ALIGNMENT__) == MDMA_DATAALIGN_RIGHT ) || \
797 ((__ALIGNMENT__) == MDMA_DATAALIGN_RIGHT_SIGNED ) || \
798 ((__ALIGNMENT__) == MDMA_DATAALIGN_LEFT))
799
800
801#define IS_MDMA_SOURCE_BURST(__BURST__) (((__BURST__) == MDMA_SOURCE_BURST_SINGLE ) || \
802 ((__BURST__) == MDMA_SOURCE_BURST_2BEATS ) || \
803 ((__BURST__) == MDMA_SOURCE_BURST_4BEATS ) || \
804 ((__BURST__) == MDMA_SOURCE_BURST_8BEATS) || \
805 ((__BURST__) == MDMA_SOURCE_BURST_16BEATS) || \
806 ((__BURST__) == MDMA_SOURCE_BURST_32BEATS) || \
807 ((__BURST__) == MDMA_SOURCE_BURST_64BEATS) || \
808 ((__BURST__) == MDMA_SOURCE_BURST_128BEATS))
809
810
811#define IS_MDMA_DESTINATION_BURST(__BURST__) (((__BURST__) == MDMA_DEST_BURST_SINGLE ) || \
812 ((__BURST__) == MDMA_DEST_BURST_2BEATS ) || \
813 ((__BURST__) == MDMA_DEST_BURST_4BEATS ) || \
814 ((__BURST__) == MDMA_DEST_BURST_8BEATS) || \
815 ((__BURST__) == MDMA_DEST_BURST_16BEATS) || \
816 ((__BURST__) == MDMA_DEST_BURST_32BEATS) || \
817 ((__BURST__) == MDMA_DEST_BURST_64BEATS) || \
818 ((__BURST__) == MDMA_DEST_BURST_128BEATS))
819
820 #define IS_MDMA_TRANSFER_TRIGGER_MODE(__MODE__) (((__MODE__) == MDMA_BUFFER_TRANSFER ) || \
821 ((__MODE__) == MDMA_BLOCK_TRANSFER ) || \
822 ((__MODE__) == MDMA_REPEAT_BLOCK_TRANSFER ) || \
823 ((__MODE__) == MDMA_FULL_TRANSFER))
824
825#define IS_MDMA_BUFFER_TRANSFER_LENGTH(__LENGTH__) (((__LENGTH__) >= 0x00000001U) && ((__LENGTH__) < 0x000000FFU))
826
827#define IS_MDMA_BLOCK_COUNT(__COUNT__) (((__COUNT__) > 0U ) && ((__COUNT__) <= 4096U))
828
829#define IS_MDMA_TRANSFER_LENGTH(SIZE) (((SIZE) > 0U) && ((SIZE) <= 65536U))
830
831#define IS_MDMA_BLOCK_ADDR_OFFSET(__BLOCK_ADD_OFFSET__) (((__BLOCK_ADD_OFFSET__) > (-65536)) && ((__BLOCK_ADD_OFFSET__) < 65536))
832
833/**
834 * @}
835 */
836
837/* Private functions prototypes ----------------------------------------------*/
838/** @defgroup MDMA_Private_Functions_Prototypes MDMA Private Functions Prototypes
839 * @{
840 */
841
842/**
843 * @}
844 */
845
846/* Private functions ---------------------------------------------------------*/
847/** @defgroup MDMA_Private_Functions MDMA Private Functions
848 * @{
849 */
850
851/**
852 * @}
853 */
854
855/**
856 * @}
857 */
858
859/**
860 * @}
861 */
862
863#ifdef __cplusplus
864}
865#endif
866
867#endif /* STM32H7xx_HAL_MDMA_H */
868
#define __IO
Defines 'read / write' permissions.
HAL_StatusTypeDef HAL_MDMA_ConfigPostRequestMask(MDMA_HandleTypeDef *hmdma, uint32_t MaskAddress, uint32_t MaskData)
HAL_StatusTypeDef HAL_MDMA_Init(MDMA_HandleTypeDef *hmdma)
HAL_StatusTypeDef HAL_MDMA_RegisterCallback(MDMA_HandleTypeDef *hmdma, HAL_MDMA_CallbackIDTypeDef CallbackID, void(*pCallback)(MDMA_HandleTypeDef *_hmdma))
HAL_StatusTypeDef HAL_MDMA_DeInit(MDMA_HandleTypeDef *hmdma)
HAL_StatusTypeDef HAL_MDMA_UnRegisterCallback(MDMA_HandleTypeDef *hmdma, HAL_MDMA_CallbackIDTypeDef CallbackID)
HAL_StatusTypeDef HAL_MDMA_LinkedList_CreateNode(MDMA_LinkNodeTypeDef *pNode, MDMA_LinkNodeConfTypeDef *pNodeConfig)
HAL_StatusTypeDef HAL_MDMA_LinkedList_EnableCircularMode(MDMA_HandleTypeDef *hmdma)
HAL_StatusTypeDef HAL_MDMA_LinkedList_AddNode(MDMA_HandleTypeDef *hmdma, MDMA_LinkNodeTypeDef *pNewNode, const MDMA_LinkNodeTypeDef *pPrevNode)
HAL_StatusTypeDef HAL_MDMA_LinkedList_RemoveNode(MDMA_HandleTypeDef *hmdma, MDMA_LinkNodeTypeDef *pNode)
HAL_StatusTypeDef HAL_MDMA_LinkedList_DisableCircularMode(MDMA_HandleTypeDef *hmdma)
HAL_StatusTypeDef HAL_MDMA_Abort_IT(MDMA_HandleTypeDef *hmdma)
HAL_StatusTypeDef HAL_MDMA_Abort(MDMA_HandleTypeDef *hmdma)
HAL_StatusTypeDef HAL_MDMA_Start_IT(MDMA_HandleTypeDef *hmdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t BlockDataLength, uint32_t BlockCount)
HAL_StatusTypeDef HAL_MDMA_PollForTransfer(MDMA_HandleTypeDef *hmdma, HAL_MDMA_LevelCompleteTypeDef CompleteLevel, uint32_t Timeout)
HAL_StatusTypeDef HAL_MDMA_GenerateSWRequest(MDMA_HandleTypeDef *hmdma)
HAL_StatusTypeDef HAL_MDMA_Start(MDMA_HandleTypeDef *hmdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t BlockDataLength, uint32_t BlockCount)
void HAL_MDMA_IRQHandler(MDMA_HandleTypeDef *hmdma)
HAL_MDMA_StateTypeDef HAL_MDMA_GetState(const MDMA_HandleTypeDef *hmdma)
uint32_t HAL_MDMA_GetError(const MDMA_HandleTypeDef *hmdma)
HAL_MDMA_StateTypeDef
HAL MDMA State structure definition.
HAL_MDMA_LevelCompleteTypeDef
HAL MDMA Level Complete structure definition.
HAL_MDMA_CallbackIDTypeDef
HAL MDMA Callbacks IDs structure definition.
struct __MDMA_HandleTypeDef MDMA_HandleTypeDef
MDMA handle Structure definition.
@ HAL_MDMA_STATE_RESET
MDMA not yet initialized or disabled.
@ HAL_MDMA_STATE_BUSY
MDMA process is ongoing.
@ HAL_MDMA_STATE_ABORT
MDMA Abort state.
@ HAL_MDMA_STATE_READY
MDMA initialized and ready for use.
@ HAL_MDMA_STATE_ERROR
MDMA error state.
@ HAL_MDMA_FULL_TRANSFER
Full transfer.
@ HAL_MDMA_BUFFER_TRANSFER
Buffer Transfer.
@ HAL_MDMA_BLOCK_TRANSFER
Block Transfer.
@ HAL_MDMA_REPEAT_BLOCK_TRANSFER
repeat block Transfer
@ HAL_MDMA_XFER_CPLT_CB_ID
Full transfer.
@ HAL_MDMA_XFER_ABORT_CB_ID
Abort.
@ HAL_MDMA_XFER_REPBLOCKCPLT_CB_ID
Repeated Block Transfer.
@ HAL_MDMA_XFER_BUFFERCPLT_CB_ID
Buffer Transfer.
@ HAL_MDMA_XFER_ERROR_CB_ID
Error.
@ HAL_MDMA_XFER_ALL_CB_ID
All.
@ HAL_MDMA_XFER_BLOCKCPLT_CB_ID
Block Transfer.
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_StatusTypeDef
HAL Status structures definition.
HAL_LockTypeDef
HAL Lock structures definition.
MDMA Configuration Structure definition.
int32_t SourceBlockAddressOffset
this field specifies the Next block source address offset signed value : if > 0 then increment the ne...
uint32_t TransferTriggerMode
Specifies the Trigger Transfer mode : each request triggers a : a buffer transfer,...
uint32_t DestinationInc
Specifies if the Destination increment mode .
uint32_t DestBurst
Specifies the Burst transfer configuration for the destination memory transfers.
uint32_t SourceInc
Specifies if the Source increment mode .
uint32_t SourceBurst
Specifies the Burst transfer configuration for the source memory transfers.
uint32_t Priority
Specifies the software priority for the MDMAy channelx.
uint32_t SourceDataSize
Specifies the source data size.
uint32_t BufferTransferLength
Specifies the buffer Transfer Length (number of bytes), this is the number of bytes to be transferred...
uint32_t Endianness
Specifies if the MDMA transactions preserve the Little endianness.
uint32_t Request
Specifies the MDMA request.
uint32_t DataAlignment
Specifies the source to destination Memory data packing/padding mode.
int32_t DestBlockAddressOffset
this field specifies the Next block destination address offset signed value : if > 0 then increment t...
uint32_t DestDataSize
Specifies the destination data size.
HAL MDMA linked list node configuration structure definition.
uint32_t PostRequestMaskData
specifies the value to be written to PostRequestMaskAddress after a request is served.
uint32_t PostRequestMaskAddress
specifies the address to be updated (written) with PostRequestMaskData after a request is served.
MDMA_InitTypeDef Init
configuration of the specified MDMA Linked List Node
uint32_t BlockDataLength
The data length of a block in bytes.
uint32_t DstAddress
The destination memory address for the Linked list Node.
uint32_t BlockCount
The number of blocks to be transferred.
uint32_t SrcAddress
The source memory address for the Linked list Node.
HAL MDMA linked list node structure definition.
__IO uint32_t CDAR
New CDAR register configuration for the given MDMA linked list node.
__IO uint32_t CTCR
New CTCR register configuration for the given MDMA linked list node.
__IO uint32_t CBRUR
New CBRUR register configuration for the given MDMA linked list node.
__IO uint32_t Reserved
Reserved register.
__IO uint32_t CLAR
New CLAR register configuration for the given MDMA linked list node.
__IO uint32_t CMDR
New CMDR register configuration for the given MDMA linked list node.
__IO uint32_t CBNDTR
New CBNDTR register configuration for the given MDMA linked list node.
__IO uint32_t CMAR
New CMAR register configuration for the given MDMA linked list node.
__IO uint32_t CTBR
New CTBR register configuration for the given MDMA linked list node.
__IO uint32_t CSAR
New CSAR register configuration for the given MDMA linked list node.
MDMA handle Structure definition.
__IO uint32_t ErrorCode
MDMA Error code.
void(* XferBufferCpltCallback)(struct __MDMA_HandleTypeDef *hmdma)
MDMA buffer transfer complete callback.
MDMA_LinkNodeTypeDef * FirstLinkedListNodeAddress
specifies the first node address of the transfer list (after the initial node defined by the Init str...
MDMA_LinkNodeTypeDef * LastLinkedListNodeAddress
specifies the last node address of the transfer list this parameter is used internally by the MDMA dr...
void * Parent
Parent object state.
void(* XferCpltCallback)(struct __MDMA_HandleTypeDef *hmdma)
MDMA transfer complete callback.
void(* XferBlockCpltCallback)(struct __MDMA_HandleTypeDef *hmdma)
MDMA block transfer complete callback.
void(* XferRepeatBlockCpltCallback)(struct __MDMA_HandleTypeDef *hmdma)
MDMA block transfer repeat callback.
uint32_t LinkedListNodeCounter
Number of nodes in the MDMA linked list.
HAL_LockTypeDef Lock
MDMA locking object.
MDMA_Channel_TypeDef * Instance
Register base address.
__IO HAL_MDMA_StateTypeDef State
MDMA transfer state.
MDMA_InitTypeDef Init
MDMA communication parameters.
void(* XferErrorCallback)(struct __MDMA_HandleTypeDef *hmdma)
MDMA transfer error callback.
void(* XferAbortCallback)(struct __MDMA_HandleTypeDef *hmdma)
MDMA transfer Abort callback.