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stm32h7xx_hal_spi_ex.c
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1/**
2 ******************************************************************************
3 * @file stm32h7xx_hal_spi_ex.c
4 * @author MCD Application Team
5 * @brief Extended SPI HAL module driver.
6 * This file provides firmware functions to manage the following
7 * SPI peripheral extended functionalities :
8 * + IO operation functions
9 * + Peripheral Control functions
10 *
11 ******************************************************************************
12 * @attention
13 *
14 * Copyright (c) 2017 STMicroelectronics.
15 * All rights reserved.
16 *
17 * This software is licensed under terms that can be found in the LICENSE file
18 * in the root directory of this software component.
19 * If no LICENSE file comes with this software, it is provided AS-IS.
20 *
21 ******************************************************************************
22 */
23
24/* Includes ------------------------------------------------------------------*/
25#include "stm32h7xx_hal.h"
26
27/** @addtogroup STM32H7xx_HAL_Driver
28 * @{
29 */
30
31/** @defgroup SPIEx SPIEx
32 * @brief SPI Extended HAL module driver
33 * @{
34 */
35#ifdef HAL_SPI_MODULE_ENABLED
36
37/* Private typedef -----------------------------------------------------------*/
38/* Private defines -----------------------------------------------------------*/
39/* Private macros ------------------------------------------------------------*/
40/* Private variables ---------------------------------------------------------*/
41/* Private function prototypes -----------------------------------------------*/
42/* Exported functions --------------------------------------------------------*/
43
44/** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions
45 * @{
46 */
47
48/** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions
49 * @brief Data transfers functions
50 *
51@verbatim
52 ==============================================================================
53 ##### IO operation functions #####
54 ===============================================================================
55 [..]
56 This subsection provides a set of extended functions to manage the SPI
57 data transfers.
58
59 (#) SPIEx function:
60 (++) HAL_SPIEx_FlushRxFifo()
61 (++) HAL_SPIEx_EnableLockConfiguration()
62 (++) HAL_SPIEx_ConfigureUnderrun()
63
64@endverbatim
65 * @{
66 */
67
68/**
69 * @brief Flush the RX fifo.
70 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
71 * the configuration information for the specified SPI module.
72 * @retval HAL status
73 */
75{
76 uint8_t count = 0;
77 uint32_t itflag = hspi->Instance->SR;
78 __IO uint32_t tmpreg;
79
80 while (((hspi->Instance->SR & SPI_FLAG_FRLVL) != SPI_RX_FIFO_0PACKET) || ((itflag & SPI_FLAG_RXWNE) != 0UL))
81 {
82 count += (uint8_t)4UL;
83 tmpreg = hspi->Instance->RXDR;
84 UNUSED(tmpreg); /* To avoid GCC warning */
85
87 {
89 {
90 return HAL_TIMEOUT;
91 }
92 }
93 else
94 {
96 {
97 return HAL_TIMEOUT;
98 }
99 }
100 }
101 return HAL_OK;
102}
103
104
105/**
106 * @brief Enable the Lock for the AF configuration of associated IOs
107 * and write protect the Content of Configuration register 2
108 * when SPI is enabled
109 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
110 * the configuration information for SPI module.
111 * @retval None
112 */
114{
115 HAL_StatusTypeDef errorcode = HAL_OK;
116
117 /* Process Locked */
118 __HAL_LOCK(hspi);
119
120 if (hspi->State != HAL_SPI_STATE_READY)
121 {
122 errorcode = HAL_BUSY;
124 /* Process Unlocked */
125 __HAL_UNLOCK(hspi);
126 return errorcode;
127 }
128
129 /* Check if the SPI is disabled to edit IOLOCK bit */
130 if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
131 {
133 }
134 else
135 {
136 /* Disable SPI peripheral */
137 __HAL_SPI_DISABLE(hspi);
138
140
141 /* Enable SPI peripheral */
142 __HAL_SPI_ENABLE(hspi);
143 }
144
146 /* Process Unlocked */
147 __HAL_UNLOCK(hspi);
148 return errorcode;
149}
150
151/**
152 * @brief Configure the UNDERRUN condition and behavior of slave transmitter.
153 * @param hspi: pointer to a SPI_HandleTypeDef structure that contains
154 * the configuration information for SPI module.
155 * @param UnderrunDetection : Detection of underrun condition at slave transmitter
156 * This parameter can be a value of @ref SPI_Underrun_Detection.
157 * @param UnderrunBehaviour : Behavior of slave transmitter at underrun condition
158 * This parameter can be a value of @ref SPI_Underrun_Behaviour.
159 * @retval None
160 */
161HAL_StatusTypeDef HAL_SPIEx_ConfigureUnderrun(SPI_HandleTypeDef *hspi, uint32_t UnderrunDetection,
162 uint32_t UnderrunBehaviour)
163{
164 HAL_StatusTypeDef errorcode = HAL_OK;
165
166 /* Process Locked */
167 __HAL_LOCK(hspi);
168
169 /* Check State and Insure that Underrun configuration is managed only by Salve */
170 if ((hspi->State != HAL_SPI_STATE_READY) || (hspi->Init.Mode != SPI_MODE_SLAVE))
171 {
172 errorcode = HAL_BUSY;
174 /* Process Unlocked */
175 __HAL_UNLOCK(hspi);
176 return errorcode;
177 }
178
179 /* Check the parameters */
180 assert_param(IS_SPI_UNDERRUN_DETECTION(UnderrunDetection));
181 assert_param(IS_SPI_UNDERRUN_BEHAVIOUR(UnderrunBehaviour));
182
183 /* Check if the SPI is disabled to edit CFG1 register */
184 if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
185 {
186 /* Configure Underrun fields */
187 MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRDET, UnderrunDetection);
188 MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRCFG, UnderrunBehaviour);
189 }
190 else
191 {
192 /* Disable SPI peripheral */
193 __HAL_SPI_DISABLE(hspi);
194
195 /* Configure Underrun fields */
196 MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRDET, UnderrunDetection);
197 MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRCFG, UnderrunBehaviour);
198
199 /* Enable SPI peripheral */
200 __HAL_SPI_ENABLE(hspi);
201 }
202
203
205 /* Process Unlocked */
206 __HAL_UNLOCK(hspi);
207 return errorcode;
208}
209
210/**
211 * @}
212 */
213
214/**
215 * @}
216 */
217
218#endif /* HAL_SPI_MODULE_ENABLED */
219
220/**
221 * @}
222 */
223
224/**
225 * @}
226 */
#define __IO
Defines 'read / write' permissions.
#define SET_BIT(REG, BIT)
Definition stm32h7xx.h:207
#define MODIFY_REG(REG, CLEARMASK, SETMASK)
Definition stm32h7xx.h:219
#define IS_SPI_HIGHEND_INSTANCE(INSTANCE)
#define SPI_CR1_IOLOCK
Locking the AF configuration of associated IOs.
#define SPI_CFG1_UDRDET
UDRDET[1:0]: Detection of underrun condition.
#define SPI_CR1_SPE
Serial Peripheral Enable.
#define SPI_CFG1_UDRCFG
UDRCFG[1:0]: Behavior of transmitter at underrun.
HAL_StatusTypeDef HAL_SPIEx_ConfigureUnderrun(SPI_HandleTypeDef *hspi, uint32_t UnderrunDetection, uint32_t UnderrunBehaviour)
HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi)
HAL_StatusTypeDef HAL_SPIEx_EnableLockConfiguration(SPI_HandleTypeDef *hspi)
#define __HAL_SPI_ENABLE(__HANDLE__)
Enable the SPI peripheral.
#define __HAL_SPI_DISABLE(__HANDLE__)
Disable the SPI peripheral.
struct __SPI_HandleTypeDef SPI_HandleTypeDef
SPI handle Structure definition.
@ HAL_SPI_STATE_READY
Peripheral Initialized and ready for use.
#define SPI_HIGHEND_FIFO_SIZE
#define SPI_LOWEND_FIFO_SIZE
#define SPI_FLAG_FRLVL
#define SPI_FLAG_RXWNE
#define SPI_MODE_SLAVE
#define IS_SPI_UNDERRUN_DETECTION(MODE)
#define IS_SPI_UNDERRUN_BEHAVIOUR(MODE)
#define SPI_RX_FIFO_0PACKET
size_type count(const key_type &key) const
Definition json.hpp:19264
This file contains all the functions prototypes for the HAL module driver.
#define assert_param(expr)
Uncomment the line below to expanse the "assert_param" macro in the HAL drivers code.
HAL_StatusTypeDef
HAL Status structures definition.
@ HAL_TIMEOUT
@ HAL_OK
@ HAL_BUSY
#define __HAL_UNLOCK(__HANDLE__)
#define UNUSED(x)
#define __HAL_LOCK(__HANDLE__)
uint32_t Mode
Specifies the SPI operating mode.
__IO uint32_t RXDR
SPI/I2S Receive data register, Address offset: 0x30.
__IO uint32_t CFG1
SPI Configuration register 1, Address offset: 0x08.
__IO uint32_t SR
SPI/I2S Status register, Address offset: 0x14.
__IO uint32_t CR1
SPI/I2S Control register 1, Address offset: 0x00.
SPI_InitTypeDef Init
SPI communication parameters.
SPI_TypeDef * Instance
SPI registers base address.
__IO HAL_SPI_StateTypeDef State
SPI communication state.