STAR
Cal STAR — firmware, DAQ server, and engine design
Loading...
Searching...
No Matches
sfe_ism330dhcx_defs.h File Reference
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Macros

#define ISM_2g   0
#define ISM_16g   1
#define ISM_4g   2
#define ISM_8g   3
#define ISM_125dps   2
#define ISM_250dps   0
#define ISM_500dps   4
#define ISM_1000dps   8
#define ISM_2000dps   12
#define ISM_4000dps   1
#define ISM_XL_ODR_OFF   0
#define ISM_XL_ODR_12Hz5   1
#define ISM_XL_ODR_26Hz   2
#define ISM_XL_ODR_52Hz   3
#define ISM_XL_ODR_104Hz   4
#define ISM_XL_ODR_208Hz   5
#define ISM_XL_ODR_416Hz   6
#define ISM_XL_ODR_833Hz   7
#define ISM_XL_ODR_1666Hz   8
#define ISM_XL_ODR_3332Hz   9
#define ISM_XL_ODR_6667Hz   10
#define ISM_XL_ODR_1Hz6   11
#define ISM_GY_ODR_OFF   0
#define ISM_GY_ODR_12Hz   1
#define ISM_GY_ODR_26Hz   2
#define ISM_GY_ODR_52Hz   3
#define ISM_GY_ODR_104Hz   4
#define ISM_GY_ODR_208Hz   5
#define ISM_GY_ODR_416Hz   6
#define ISM_GY_ODR_833Hz   7
#define ISM_GY_ODR_1666Hz   8
#define ISM_GY_ODR_3332Hz   9
#define ISM_GY_ODR_6667Hz   10
#define ISM_ULTRA_LIGHT   0
#define ISM_VERY_LIGHT   1
#define ISM_LIGHT   2
#define ISM_MEDIUM   3
#define ISM_STRONG   4
#define ISM_VERY_STRONG   5
#define ISM_AGGRESSIVE   6
#define ISM_XTREME   7
#define ISM_HP_FILTER_NONE   0x00
#define ISM_HP_FILTER_16mHz   0x80
#define ISM_HP_FILTER_65mHz   0x81
#define ISM_HP_FILTER_260mHz   0x82
#define ISM_HP_FILTER_1Hz04   0x83
#define ISM_HP_PATH_DISABLE_ON_OUT   0x00
#define ISM_SLOPE_ODR_DIV_4   0x10
#define ISM_HP_ODR_DIV_10   0x11
#define ISM_HP_ODR_DIV_20   0x12
#define ISM_HP_ODR_DIV_45   0x13
#define ISM_HP_ODR_DIV_100   0x14
#define ISM_HP_ODR_DIV_200   0x15
#define ISM_HP_ODR_DIV_400   0x16
#define ISM_HP_ODR_DIV_800   0x17
#define ISM_HP_REF_MD_ODR_DIV_10   0x31
#define ISM_HP_REF_MD_ODR_DIV_20   0x32
#define ISM_HP_REF_MD_ODR_DIV_45   0x33
#define ISM_HP_REF_MD_ODR_DIV_100   0x34
#define ISM_HP_REF_MD_ODR_DIV_200   0x35
#define ISM_HP_REF_MD_ODR_DIV_400   0x36
#define ISM_HP_REF_MD_ODR_DIV_800   0x37
#define ISM_LP_ODR_DIV_10   0x01
#define ISM_LP_ODR_DIV_20   0x02
#define ISM_LP_ODR_DIV_45   0x03
#define ISM_LP_ODR_DIV_100   0x04
#define ISM_LP_ODR_DIV_200   0x05
#define ISM_LP_ODR_DIV_400   0x06
#define ISM_LP_ODR_DIV_800   0x07
#define ISM_BYPASS_MODE   0x00
#define ISM_FIFO_MODE   0x01
#define ISM_STREAM_TO_FIFO_MODE   0x03
#define ISM_BYPASS_TO_STREAM_MODE   0x04
#define ISM_STREAM_MODE   0x06
#define ISM_BYPASS_TO_FIFO_MODE   0x07
#define ISM_XL_NOT_BATCHED   0x00
#define ISM_XL_BATCH_AT_12Hz5   0x01
#define ISM_XL_BATCH_AT_26Hz   0x02
#define ISM_XL_BATCH_AT_52Hz   0x03
#define ISM_XL_BATCH_AT_104Hz   0x04
#define ISM_XL_BATCH_AT_208Hz   0x05
#define ISM_XL_BATCH_AT_417Hz   0x06
#define ISM_XL_BATCH_AT_833Hz   0x07
#define ISM_XL_BATCH_AT_1667Hz   0x08
#define ISM_XL_BATCH_AT_3333Hz   0x09
#define ISM_XL_BATCH_AT_6667Hz   0x010
#define ISM_XL_BATCH_6Hz5   0x011
#define ISM_GY_NOT_BATCHED   0x00
#define ISM_GY_BATCH_AT_12Hz5   0x01
#define ISM_GY_BATCH_AT_26Hz   0x02
#define ISM_GY_BATCH_AT_52Hz   0x03
#define ISM_GY_BATCH_AT_104Hz   0x04
#define ISM_GY_BATCH_AT_208Hz   0x05
#define ISM_GY_BATCH_AT_417Hz   0x06
#define ISM_GY_BATCH_AT_833Hz   0x07
#define ISM_GY_BATCH_AT_1667Hz   0x08
#define ISM_GY_BATCH_AT_3333Hz   0x09
#define ISM_GY_BATCH_AT_6667Hz   0x010
#define ISM_GY_BATCH_6Hz5   0x011
#define ISM_NO_DECIMATION   0x00
#define ISM_DEC_1   0x01
#define ISM_DEC_8   0x02
#define ISM_DEC_32   0x03
#define ISM_ALL_INT_PULSED   0x00
#define ISM_BASE_LATCHED_EMB_PULSED   0x01
#define ISM_BASE_PULSED_EMB_LATCHED   0x02
#define ISM_ALL_INT_LATCHED   0x03
#define ISM_SH_ODR_104Hz   0x00
#define ISM_SH_ODR_52Hz   0x01
#define ISM_SH_ODR_26Hz   0x02
#define ISM_SH_ODR_13Hz   0x03

Macro Definition Documentation

◆ ISM_1000dps

#define ISM_1000dps   8

Definition at line 11 of file sfe_ism330dhcx_defs.h.

◆ ISM_125dps

#define ISM_125dps   2

Definition at line 8 of file sfe_ism330dhcx_defs.h.

◆ ISM_16g

#define ISM_16g   1

Definition at line 3 of file sfe_ism330dhcx_defs.h.

◆ ISM_2000dps

#define ISM_2000dps   12

Definition at line 12 of file sfe_ism330dhcx_defs.h.

◆ ISM_250dps

#define ISM_250dps   0

Definition at line 9 of file sfe_ism330dhcx_defs.h.

Referenced by QwDevISM330DHCX::configureSensor(), and setup().

◆ ISM_2g

#define ISM_2g   0

Definition at line 2 of file sfe_ism330dhcx_defs.h.

Referenced by QwDevISM330DHCX::configureSensor().

◆ ISM_4000dps

#define ISM_4000dps   1

Definition at line 13 of file sfe_ism330dhcx_defs.h.

◆ ISM_4g

#define ISM_4g   2

Definition at line 4 of file sfe_ism330dhcx_defs.h.

Referenced by setup().

◆ ISM_500dps

#define ISM_500dps   4

Definition at line 10 of file sfe_ism330dhcx_defs.h.

Referenced by setup().

◆ ISM_8g

#define ISM_8g   3

Definition at line 5 of file sfe_ism330dhcx_defs.h.

◆ ISM_AGGRESSIVE

#define ISM_AGGRESSIVE   6

Definition at line 49 of file sfe_ism330dhcx_defs.h.

◆ ISM_ALL_INT_LATCHED

#define ISM_ALL_INT_LATCHED   0x03

Definition at line 130 of file sfe_ism330dhcx_defs.h.

◆ ISM_ALL_INT_PULSED

#define ISM_ALL_INT_PULSED   0x00

Definition at line 127 of file sfe_ism330dhcx_defs.h.

◆ ISM_BASE_LATCHED_EMB_PULSED

#define ISM_BASE_LATCHED_EMB_PULSED   0x01

Definition at line 128 of file sfe_ism330dhcx_defs.h.

◆ ISM_BASE_PULSED_EMB_LATCHED

#define ISM_BASE_PULSED_EMB_LATCHED   0x02

Definition at line 129 of file sfe_ism330dhcx_defs.h.

◆ ISM_BYPASS_MODE

#define ISM_BYPASS_MODE   0x00

Definition at line 85 of file sfe_ism330dhcx_defs.h.

◆ ISM_BYPASS_TO_FIFO_MODE

#define ISM_BYPASS_TO_FIFO_MODE   0x07

Definition at line 90 of file sfe_ism330dhcx_defs.h.

◆ ISM_BYPASS_TO_STREAM_MODE

#define ISM_BYPASS_TO_STREAM_MODE   0x04

Definition at line 88 of file sfe_ism330dhcx_defs.h.

◆ ISM_DEC_1

#define ISM_DEC_1   0x01

Definition at line 122 of file sfe_ism330dhcx_defs.h.

◆ ISM_DEC_32

#define ISM_DEC_32   0x03

Definition at line 124 of file sfe_ism330dhcx_defs.h.

◆ ISM_DEC_8

#define ISM_DEC_8   0x02

Definition at line 123 of file sfe_ism330dhcx_defs.h.

◆ ISM_FIFO_MODE

#define ISM_FIFO_MODE   0x01

Definition at line 86 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_BATCH_6Hz5

#define ISM_GY_BATCH_6Hz5   0x011

Definition at line 118 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_BATCH_AT_104Hz

#define ISM_GY_BATCH_AT_104Hz   0x04

Definition at line 111 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_BATCH_AT_12Hz5

#define ISM_GY_BATCH_AT_12Hz5   0x01

Definition at line 108 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_BATCH_AT_1667Hz

#define ISM_GY_BATCH_AT_1667Hz   0x08

Definition at line 115 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_BATCH_AT_208Hz

#define ISM_GY_BATCH_AT_208Hz   0x05

Definition at line 112 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_BATCH_AT_26Hz

#define ISM_GY_BATCH_AT_26Hz   0x02

Definition at line 109 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_BATCH_AT_3333Hz

#define ISM_GY_BATCH_AT_3333Hz   0x09

Definition at line 116 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_BATCH_AT_417Hz

#define ISM_GY_BATCH_AT_417Hz   0x06

Definition at line 113 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_BATCH_AT_52Hz

#define ISM_GY_BATCH_AT_52Hz   0x03

Definition at line 110 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_BATCH_AT_6667Hz

#define ISM_GY_BATCH_AT_6667Hz   0x010

Definition at line 117 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_BATCH_AT_833Hz

#define ISM_GY_BATCH_AT_833Hz   0x07

Definition at line 114 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_NOT_BATCHED

#define ISM_GY_NOT_BATCHED   0x00

Definition at line 107 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_ODR_104Hz

#define ISM_GY_ODR_104Hz   4

Definition at line 34 of file sfe_ism330dhcx_defs.h.

Referenced by QwDevISM330DHCX::configureSensor(), loop(), and setup().

◆ ISM_GY_ODR_12Hz

#define ISM_GY_ODR_12Hz   1

Definition at line 31 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_ODR_1666Hz

#define ISM_GY_ODR_1666Hz   8

Definition at line 38 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_ODR_208Hz

#define ISM_GY_ODR_208Hz   5

Definition at line 35 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_ODR_26Hz

#define ISM_GY_ODR_26Hz   2

Definition at line 32 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_ODR_3332Hz

#define ISM_GY_ODR_3332Hz   9

Definition at line 39 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_ODR_416Hz

#define ISM_GY_ODR_416Hz   6

Definition at line 36 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_ODR_52Hz

#define ISM_GY_ODR_52Hz   3

Definition at line 33 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_ODR_6667Hz

#define ISM_GY_ODR_6667Hz   10

Definition at line 40 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_ODR_833Hz

#define ISM_GY_ODR_833Hz   7

Definition at line 37 of file sfe_ism330dhcx_defs.h.

◆ ISM_GY_ODR_OFF

#define ISM_GY_ODR_OFF   0

Definition at line 30 of file sfe_ism330dhcx_defs.h.

Referenced by writeControlBit().

◆ ISM_HP_FILTER_16mHz

#define ISM_HP_FILTER_16mHz   0x80

Definition at line 54 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_FILTER_1Hz04

#define ISM_HP_FILTER_1Hz04   0x83

Definition at line 57 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_FILTER_260mHz

#define ISM_HP_FILTER_260mHz   0x82

Definition at line 56 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_FILTER_65mHz

#define ISM_HP_FILTER_65mHz   0x81

Definition at line 55 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_FILTER_NONE

#define ISM_HP_FILTER_NONE   0x00

Definition at line 53 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_ODR_DIV_10

#define ISM_HP_ODR_DIV_10   0x11

Definition at line 62 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_ODR_DIV_100

#define ISM_HP_ODR_DIV_100   0x14

Definition at line 65 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_ODR_DIV_20

#define ISM_HP_ODR_DIV_20   0x12

Definition at line 63 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_ODR_DIV_200

#define ISM_HP_ODR_DIV_200   0x15

Definition at line 66 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_ODR_DIV_400

#define ISM_HP_ODR_DIV_400   0x16

Definition at line 67 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_ODR_DIV_45

#define ISM_HP_ODR_DIV_45   0x13

Definition at line 64 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_ODR_DIV_800

#define ISM_HP_ODR_DIV_800   0x17

Definition at line 68 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_PATH_DISABLE_ON_OUT

#define ISM_HP_PATH_DISABLE_ON_OUT   0x00

Definition at line 60 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_REF_MD_ODR_DIV_10

#define ISM_HP_REF_MD_ODR_DIV_10   0x31

Definition at line 69 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_REF_MD_ODR_DIV_100

#define ISM_HP_REF_MD_ODR_DIV_100   0x34

Definition at line 72 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_REF_MD_ODR_DIV_20

#define ISM_HP_REF_MD_ODR_DIV_20   0x32

Definition at line 70 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_REF_MD_ODR_DIV_200

#define ISM_HP_REF_MD_ODR_DIV_200   0x35

Definition at line 73 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_REF_MD_ODR_DIV_400

#define ISM_HP_REF_MD_ODR_DIV_400   0x36

Definition at line 74 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_REF_MD_ODR_DIV_45

#define ISM_HP_REF_MD_ODR_DIV_45   0x33

Definition at line 71 of file sfe_ism330dhcx_defs.h.

◆ ISM_HP_REF_MD_ODR_DIV_800

#define ISM_HP_REF_MD_ODR_DIV_800   0x37

Definition at line 75 of file sfe_ism330dhcx_defs.h.

◆ ISM_LIGHT

#define ISM_LIGHT   2

Definition at line 45 of file sfe_ism330dhcx_defs.h.

◆ ISM_LP_ODR_DIV_10

#define ISM_LP_ODR_DIV_10   0x01

Definition at line 76 of file sfe_ism330dhcx_defs.h.

◆ ISM_LP_ODR_DIV_100

#define ISM_LP_ODR_DIV_100   0x04

Definition at line 79 of file sfe_ism330dhcx_defs.h.

Referenced by setup().

◆ ISM_LP_ODR_DIV_20

#define ISM_LP_ODR_DIV_20   0x02

Definition at line 77 of file sfe_ism330dhcx_defs.h.

◆ ISM_LP_ODR_DIV_200

#define ISM_LP_ODR_DIV_200   0x05

Definition at line 80 of file sfe_ism330dhcx_defs.h.

◆ ISM_LP_ODR_DIV_400

#define ISM_LP_ODR_DIV_400   0x06

Definition at line 81 of file sfe_ism330dhcx_defs.h.

◆ ISM_LP_ODR_DIV_45

#define ISM_LP_ODR_DIV_45   0x03

Definition at line 78 of file sfe_ism330dhcx_defs.h.

◆ ISM_LP_ODR_DIV_800

#define ISM_LP_ODR_DIV_800   0x07

Definition at line 82 of file sfe_ism330dhcx_defs.h.

◆ ISM_MEDIUM

#define ISM_MEDIUM   3

Definition at line 46 of file sfe_ism330dhcx_defs.h.

Referenced by setup().

◆ ISM_NO_DECIMATION

#define ISM_NO_DECIMATION   0x00

Definition at line 121 of file sfe_ism330dhcx_defs.h.

◆ ISM_SH_ODR_104Hz

#define ISM_SH_ODR_104Hz   0x00

Definition at line 132 of file sfe_ism330dhcx_defs.h.

Referenced by setup().

◆ ISM_SH_ODR_13Hz

#define ISM_SH_ODR_13Hz   0x03

Definition at line 135 of file sfe_ism330dhcx_defs.h.

◆ ISM_SH_ODR_26Hz

#define ISM_SH_ODR_26Hz   0x02

Definition at line 134 of file sfe_ism330dhcx_defs.h.

◆ ISM_SH_ODR_52Hz

#define ISM_SH_ODR_52Hz   0x01

Definition at line 133 of file sfe_ism330dhcx_defs.h.

◆ ISM_SLOPE_ODR_DIV_4

#define ISM_SLOPE_ODR_DIV_4   0x10

Definition at line 61 of file sfe_ism330dhcx_defs.h.

◆ ISM_STREAM_MODE

#define ISM_STREAM_MODE   0x06

Definition at line 89 of file sfe_ism330dhcx_defs.h.

◆ ISM_STREAM_TO_FIFO_MODE

#define ISM_STREAM_TO_FIFO_MODE   0x03

Definition at line 87 of file sfe_ism330dhcx_defs.h.

◆ ISM_STRONG

#define ISM_STRONG   4

Definition at line 47 of file sfe_ism330dhcx_defs.h.

◆ ISM_ULTRA_LIGHT

#define ISM_ULTRA_LIGHT   0

Definition at line 43 of file sfe_ism330dhcx_defs.h.

◆ ISM_VERY_LIGHT

#define ISM_VERY_LIGHT   1

Definition at line 44 of file sfe_ism330dhcx_defs.h.

◆ ISM_VERY_STRONG

#define ISM_VERY_STRONG   5

Definition at line 48 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_BATCH_6Hz5

#define ISM_XL_BATCH_6Hz5   0x011

Definition at line 104 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_BATCH_AT_104Hz

#define ISM_XL_BATCH_AT_104Hz   0x04

Definition at line 97 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_BATCH_AT_12Hz5

#define ISM_XL_BATCH_AT_12Hz5   0x01

Definition at line 94 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_BATCH_AT_1667Hz

#define ISM_XL_BATCH_AT_1667Hz   0x08

Definition at line 101 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_BATCH_AT_208Hz

#define ISM_XL_BATCH_AT_208Hz   0x05

Definition at line 98 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_BATCH_AT_26Hz

#define ISM_XL_BATCH_AT_26Hz   0x02

Definition at line 95 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_BATCH_AT_3333Hz

#define ISM_XL_BATCH_AT_3333Hz   0x09

Definition at line 102 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_BATCH_AT_417Hz

#define ISM_XL_BATCH_AT_417Hz   0x06

Definition at line 99 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_BATCH_AT_52Hz

#define ISM_XL_BATCH_AT_52Hz   0x03

Definition at line 96 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_BATCH_AT_6667Hz

#define ISM_XL_BATCH_AT_6667Hz   0x010

Definition at line 103 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_BATCH_AT_833Hz

#define ISM_XL_BATCH_AT_833Hz   0x07

Definition at line 100 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_NOT_BATCHED

#define ISM_XL_NOT_BATCHED   0x00

Definition at line 93 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_ODR_104Hz

#define ISM_XL_ODR_104Hz   4

Definition at line 20 of file sfe_ism330dhcx_defs.h.

Referenced by QwDevISM330DHCX::configureSensor(), loop(), setup(), and writeControlBit().

◆ ISM_XL_ODR_12Hz5

#define ISM_XL_ODR_12Hz5   1

Definition at line 17 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_ODR_1666Hz

#define ISM_XL_ODR_1666Hz   8

Definition at line 24 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_ODR_1Hz6

#define ISM_XL_ODR_1Hz6   11

Definition at line 27 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_ODR_208Hz

#define ISM_XL_ODR_208Hz   5

Definition at line 21 of file sfe_ism330dhcx_defs.h.

Referenced by setup().

◆ ISM_XL_ODR_26Hz

#define ISM_XL_ODR_26Hz   2

Definition at line 18 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_ODR_3332Hz

#define ISM_XL_ODR_3332Hz   9

Definition at line 25 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_ODR_416Hz

#define ISM_XL_ODR_416Hz   6

Definition at line 22 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_ODR_52Hz

#define ISM_XL_ODR_52Hz   3

Definition at line 19 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_ODR_6667Hz

#define ISM_XL_ODR_6667Hz   10

Definition at line 26 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_ODR_833Hz

#define ISM_XL_ODR_833Hz   7

Definition at line 23 of file sfe_ism330dhcx_defs.h.

◆ ISM_XL_ODR_OFF

#define ISM_XL_ODR_OFF   0

Definition at line 16 of file sfe_ism330dhcx_defs.h.

Referenced by writeControlBit().

◆ ISM_XTREME

#define ISM_XTREME   7

Definition at line 50 of file sfe_ism330dhcx_defs.h.