Type definitions for the Power Mode Control Registers (PWRMODCTL). More...

Collaboration diagram for Power Mode Control Registers:

Topics
	External Wakeup Interrupt Controller Registers
	Type definitions for the External Wakeup Interrupt Controller Registers (EWIC).

Classes
struct	PwrModCtl_Type
	Structure type to access the Power Mode Control Registers (PWRMODCTL). More...
#define	PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos 8U
	PWRMODCTL CPDLPSTATE: RLPSTATE Position.
#define	PWRMODCTL_CPDLPSTATE_RLPSTATE_Msk (0x3UL << PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos)
	PWRMODCTL CPDLPSTATE: RLPSTATE Mask.
#define	PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos 4U
	PWRMODCTL CPDLPSTATE: ELPSTATE Position.
#define	PWRMODCTL_CPDLPSTATE_ELPSTATE_Msk (0x3UL << PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos)
	PWRMODCTL CPDLPSTATE: ELPSTATE Mask.
#define	PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos 0U
	PWRMODCTL CPDLPSTATE: CLPSTATE Position.
#define	PWRMODCTL_CPDLPSTATE_CLPSTATE_Msk (0x3UL /<< PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos/)
	PWRMODCTL CPDLPSTATE: CLPSTATE Mask.
#define	PWRMODCTL_DPDLPSTATE_DLPSTATE_Pos 0U
	PWRMODCTL DPDLPSTATE: DLPSTATE Position.
#define	PWRMODCTL_DPDLPSTATE_DLPSTATE_Msk (0x3UL /<< PWRMODCTL_DPDLPSTATE_DLPSTATE_Pos/)
	PWRMODCTL DPDLPSTATE: DLPSTATE Mask.
#define	PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos 8U
	PWRMODCTL CPDLPSTATE: RLPSTATE Position.
#define	PWRMODCTL_CPDLPSTATE_RLPSTATE_Msk (0x3UL << PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos)
	PWRMODCTL CPDLPSTATE: RLPSTATE Mask.
#define	PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos 4U
	PWRMODCTL CPDLPSTATE: ELPSTATE Position.
#define	PWRMODCTL_CPDLPSTATE_ELPSTATE_Msk (0x3UL << PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos)
	PWRMODCTL CPDLPSTATE: ELPSTATE Mask.
#define	PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos 0U
	PWRMODCTL CPDLPSTATE: CLPSTATE Position.
#define	PWRMODCTL_CPDLPSTATE_CLPSTATE_Msk (0x3UL /<< PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos/)
	PWRMODCTL CPDLPSTATE: CLPSTATE Mask.
#define	PWRMODCTL_DPDLPSTATE_DLPSTATE_Pos 0U
	PWRMODCTL DPDLPSTATE: DLPSTATE Position.
#define	PWRMODCTL_DPDLPSTATE_DLPSTATE_Msk (0x3UL /<< PWRMODCTL_DPDLPSTATE_DLPSTATE_Pos/)
	PWRMODCTL DPDLPSTATE: DLPSTATE Mask.

Detailed Description

Type definitions for the Power Mode Control Registers (PWRMODCTL).

Macro Definition Documentation

◆ PWRMODCTL_CPDLPSTATE_CLPSTATE_Msk [1/2]

#define PWRMODCTL_CPDLPSTATE_CLPSTATE_Msk (0x3UL /*<< PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos*/)

PWRMODCTL CPDLPSTATE: CLPSTATE Mask.

Definition at line 1551 of file core_cm55.h.

◆ PWRMODCTL_CPDLPSTATE_CLPSTATE_Msk [2/2]

#define PWRMODCTL_CPDLPSTATE_CLPSTATE_Msk (0x3UL /*<< PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos*/)

PWRMODCTL CPDLPSTATE: CLPSTATE Mask.

Definition at line 1538 of file core_cm85.h.

◆ PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos [1/2]

#define PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos 0U

PWRMODCTL CPDLPSTATE: CLPSTATE Position.

Definition at line 1550 of file core_cm55.h.

◆ PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos [2/2]

#define PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos 0U

PWRMODCTL CPDLPSTATE: CLPSTATE Position.

Definition at line 1537 of file core_cm85.h.

◆ PWRMODCTL_CPDLPSTATE_ELPSTATE_Msk [1/2]

#define PWRMODCTL_CPDLPSTATE_ELPSTATE_Msk (0x3UL << PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos)

PWRMODCTL CPDLPSTATE: ELPSTATE Mask.

Definition at line 1548 of file core_cm55.h.

◆ PWRMODCTL_CPDLPSTATE_ELPSTATE_Msk [2/2]

#define PWRMODCTL_CPDLPSTATE_ELPSTATE_Msk (0x3UL << PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos)

PWRMODCTL CPDLPSTATE: ELPSTATE Mask.

Definition at line 1535 of file core_cm85.h.

◆ PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos [1/2]

#define PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos 4U

PWRMODCTL CPDLPSTATE: ELPSTATE Position.

Definition at line 1547 of file core_cm55.h.

◆ PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos [2/2]

#define PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos 4U

PWRMODCTL CPDLPSTATE: ELPSTATE Position.

Definition at line 1534 of file core_cm85.h.

◆ PWRMODCTL_CPDLPSTATE_RLPSTATE_Msk [1/2]

#define PWRMODCTL_CPDLPSTATE_RLPSTATE_Msk (0x3UL << PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos)

PWRMODCTL CPDLPSTATE: RLPSTATE Mask.

Definition at line 1545 of file core_cm55.h.

◆ PWRMODCTL_CPDLPSTATE_RLPSTATE_Msk [2/2]

#define PWRMODCTL_CPDLPSTATE_RLPSTATE_Msk (0x3UL << PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos)

PWRMODCTL CPDLPSTATE: RLPSTATE Mask.

Definition at line 1532 of file core_cm85.h.

◆ PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos [1/2]

#define PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos 8U

PWRMODCTL CPDLPSTATE: RLPSTATE Position.

Definition at line 1544 of file core_cm55.h.

◆ PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos [2/2]

#define PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos 8U

PWRMODCTL CPDLPSTATE: RLPSTATE Position.

Definition at line 1531 of file core_cm85.h.

◆ PWRMODCTL_DPDLPSTATE_DLPSTATE_Msk [1/2]

#define PWRMODCTL_DPDLPSTATE_DLPSTATE_Msk (0x3UL /*<< PWRMODCTL_DPDLPSTATE_DLPSTATE_Pos*/)

PWRMODCTL DPDLPSTATE: DLPSTATE Mask.

Definition at line 1555 of file core_cm55.h.

◆ PWRMODCTL_DPDLPSTATE_DLPSTATE_Msk [2/2]