STAR
Cal STAR — firmware, DAQ server, and engine design
Loading...
Searching...
No Matches
PwrModCtl_Type Struct Reference
Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » System Controls not in SCB (SCnSCB) | Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » Implementation Control Block register (ICB) » System Tick Timer (SysTick) » Instrumentation Trace Macrocell (ITM) » Data Watchpoint and Trace (DWT) » Memory System Control Registers (IMPLEMENTATION DEFINED) » Power Mode Control Registers

Structure type to access the Power Mode Control Registers (PWRMODCTL). More...

#include <core_cm55.h>

Public Attributes

__IOM uint32_t CPDLPSTATE
 Offset: 0x000 (R/W) Core Power Domain Low Power State Register.
__IOM uint32_t DPDLPSTATE
 Offset: 0x004 (R/W) Debug Power Domain Low Power State Register.

Detailed Description

Structure type to access the Power Mode Control Registers (PWRMODCTL).

Definition at line 1537 of file core_cm55.h.

The documentation for this struct was generated from the following files:
  • firmware/Flight_Computer/Drivers/CMSIS/Include/core_cm55.h
  • firmware/Flight_Computer/Drivers/CMSIS/Include/core_cm85.h