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TIM Private Macros
STM32H7xx_HAL_Driver » TIM
Collaboration diagram for TIM Private Macros:

Macros

#define IS_TIM_CLEARINPUT_SOURCE(__MODE__)
#define IS_TIM_DMA_BASE(__BASE__)
#define IS_TIM_EVENT_SOURCE(__SOURCE__)
#define IS_TIM_COUNTER_MODE(__MODE__)
#define IS_TIM_UIFREMAP_MODE(__MODE__)
#define IS_TIM_CLOCKDIVISION_DIV(__DIV__)
#define IS_TIM_AUTORELOAD_PRELOAD(PRELOAD)
#define IS_TIM_FAST_STATE(__STATE__)
#define IS_TIM_OC_POLARITY(__POLARITY__)
#define IS_TIM_OCN_POLARITY(__POLARITY__)
#define IS_TIM_OCIDLE_STATE(__STATE__)
#define IS_TIM_OCNIDLE_STATE(__STATE__)
#define IS_TIM_ENCODERINPUT_POLARITY(__POLARITY__)
#define IS_TIM_IC_POLARITY(__POLARITY__)
#define IS_TIM_IC_SELECTION(__SELECTION__)
#define IS_TIM_IC_PRESCALER(__PRESCALER__)
#define IS_TIM_CCX_CHANNEL(__INSTANCE__, __CHANNEL__)
#define IS_TIM_OPM_MODE(__MODE__)
#define IS_TIM_ENCODER_MODE(__MODE__)
#define IS_TIM_DMA_SOURCE(__SOURCE__)
#define IS_TIM_CHANNELS(__CHANNEL__)
#define IS_TIM_OPM_CHANNELS(__CHANNEL__)
#define IS_TIM_PERIOD(__HANDLE__, __PERIOD__)
#define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__)
#define IS_TIM_CLOCKSOURCE(__CLOCK__)
#define IS_TIM_CLOCKPOLARITY(__POLARITY__)
#define IS_TIM_CLOCKPRESCALER(__PRESCALER__)
#define IS_TIM_CLOCKFILTER(__ICFILTER__)
#define IS_TIM_CLEARINPUT_POLARITY(__POLARITY__)
#define IS_TIM_CLEARINPUT_PRESCALER(__PRESCALER__)
#define IS_TIM_CLEARINPUT_FILTER(__ICFILTER__)
#define IS_TIM_OSSR_STATE(__STATE__)
#define IS_TIM_OSSI_STATE(__STATE__)
#define IS_TIM_LOCK_LEVEL(__LEVEL__)
#define IS_TIM_BREAK_FILTER(__BRKFILTER__)
#define IS_TIM_BREAK_STATE(__STATE__)
#define IS_TIM_BREAK_POLARITY(__POLARITY__)
#define IS_TIM_BREAK2_STATE(__STATE__)
#define IS_TIM_BREAK2_POLARITY(__POLARITY__)
#define IS_TIM_AUTOMATIC_OUTPUT_STATE(__STATE__)
#define IS_TIM_GROUPCH5(__OCREF__)
#define IS_TIM_TRGO_SOURCE(__SOURCE__)
#define IS_TIM_TRGO2_SOURCE(__SOURCE__)
#define IS_TIM_MSM_STATE(__STATE__)
#define IS_TIM_SLAVE_MODE(__MODE__)
#define IS_TIM_PWM_MODE(__MODE__)
#define IS_TIM_OC_MODE(__MODE__)
#define IS_TIM_TRIGGER_SELECTION(__SELECTION__)
#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__)
#define IS_TIM_TRIGGERPOLARITY(__POLARITY__)
#define IS_TIM_TRIGGERPRESCALER(__PRESCALER__)
#define IS_TIM_TRIGGERFILTER(__ICFILTER__)
#define IS_TIM_TI1SELECTION(__TI1SELECTION__)
#define IS_TIM_DMA_LENGTH(__LENGTH__)
#define IS_TIM_DMA_DATA_LENGTH(LENGTH)
#define IS_TIM_IC_FILTER(__ICFILTER__)
#define IS_TIM_DEADTIME(__DEADTIME__)
#define IS_TIM_BREAK_SYSTEM(__CONFIG__)
#define IS_TIM_SLAVEMODE_TRIGGER_ENABLED(__TRIGGER__)
#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__)
#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__)
#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__)
#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__)
#define TIM_CHANNEL_STATE_GET(__HANDLE__, __CHANNEL__)
#define TIM_CHANNEL_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__)
#define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__)
#define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__)
#define TIM_CHANNEL_N_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__)
#define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__)

Detailed Description

Macro Definition Documentation

◆ IS_TIM_AUTOMATIC_OUTPUT_STATE

#define IS_TIM_AUTOMATIC_OUTPUT_STATE ( __STATE__)
Value:
(((__STATE__) == TIM_AUTOMATICOUTPUT_ENABLE) || \
((__STATE__) == TIM_AUTOMATICOUTPUT_DISABLE))
TIM_AUTOMATICOUTPUT_ENABLE
#define TIM_AUTOMATICOUTPUT_ENABLE
MOE can be set by software or automatically at the next update event (if none of the break inputs BRK...
Definition stm32h7xx_hal_tim.h:948
TIM_AUTOMATICOUTPUT_DISABLE
#define TIM_AUTOMATICOUTPUT_DISABLE
MOE can be set only by software.
Definition stm32h7xx_hal_tim.h:947

Definition at line 1970 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_AUTORELOAD_PRELOAD

#define IS_TIM_AUTORELOAD_PRELOAD ( PRELOAD)
Value:
(((PRELOAD) == TIM_AUTORELOAD_PRELOAD_DISABLE) || \
((PRELOAD) == TIM_AUTORELOAD_PRELOAD_ENABLE))
TIM_AUTORELOAD_PRELOAD_DISABLE
#define TIM_AUTORELOAD_PRELOAD_DISABLE
TIMx_ARR register is not buffered.
Definition stm32h7xx_hal_tim.h:589
TIM_AUTORELOAD_PRELOAD_ENABLE
#define TIM_AUTORELOAD_PRELOAD_ENABLE
TIMx_ARR register is buffered.
Definition stm32h7xx_hal_tim.h:590

Definition at line 1833 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_BREAK2_POLARITY

#define IS_TIM_BREAK2_POLARITY ( __POLARITY__)
Value:
(((__POLARITY__) == TIM_BREAK2POLARITY_LOW) || \
((__POLARITY__) == TIM_BREAK2POLARITY_HIGH))
TIM_BREAK2POLARITY_HIGH
#define TIM_BREAK2POLARITY_HIGH
Break input BRK2 is active high.
Definition stm32h7xx_hal_tim.h:928
TIM_BREAK2POLARITY_LOW
#define TIM_BREAK2POLARITY_LOW
Break input BRK2 is active low.
Definition stm32h7xx_hal_tim.h:927

Definition at line 1961 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_BREAK2_STATE

#define IS_TIM_BREAK2_STATE ( __STATE__)
Value:
(((__STATE__) == TIM_BREAK2_ENABLE) || \
((__STATE__) == TIM_BREAK2_DISABLE))
TIM_BREAK2_DISABLE
#define TIM_BREAK2_DISABLE
Break input BRK2 is disabled.
Definition stm32h7xx_hal_tim.h:918
TIM_BREAK2_ENABLE
#define TIM_BREAK2_ENABLE
Break input BRK2 is enabled.
Definition stm32h7xx_hal_tim.h:919

Definition at line 1958 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_BREAK_FILTER

#define IS_TIM_BREAK_FILTER ( __BRKFILTER__)
Value:
((__BRKFILTER__) <= 0xFUL)

Definition at line 1944 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_BREAK_POLARITY

#define IS_TIM_BREAK_POLARITY ( __POLARITY__)
Value:
(((__POLARITY__) == TIM_BREAKPOLARITY_LOW) || \
((__POLARITY__) == TIM_BREAKPOLARITY_HIGH))
TIM_BREAKPOLARITY_LOW
#define TIM_BREAKPOLARITY_LOW
Break input BRK is active low.
Definition stm32h7xx_hal_tim.h:898
TIM_BREAKPOLARITY_HIGH
#define TIM_BREAKPOLARITY_HIGH
Break input BRK is active high.
Definition stm32h7xx_hal_tim.h:899

Definition at line 1949 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_BREAK_STATE

#define IS_TIM_BREAK_STATE ( __STATE__)
Value:
(((__STATE__) == TIM_BREAK_ENABLE) || \
((__STATE__) == TIM_BREAK_DISABLE))
TIM_BREAK_ENABLE
#define TIM_BREAK_ENABLE
Break input BRK is enabled.
Definition stm32h7xx_hal_tim.h:889
TIM_BREAK_DISABLE
#define TIM_BREAK_DISABLE
Break input BRK is disabled.
Definition stm32h7xx_hal_tim.h:890

Definition at line 1946 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_BREAK_SYSTEM

#define IS_TIM_BREAK_SYSTEM ( __CONFIG__)
Value:
(((__CONFIG__) == TIM_BREAK_SYSTEM_ECC) || \
((__CONFIG__) == TIM_BREAK_SYSTEM_PVD) || \
((__CONFIG__) == TIM_BREAK_SYSTEM_SRAM_PARITY_ERROR) || \
((__CONFIG__) == TIM_BREAK_SYSTEM_LOCKUP))
TIM_BREAK_SYSTEM_ECC
#define TIM_BREAK_SYSTEM_ECC
Enables and locks the ECC error signal with Break Input of TIM1/8/15/16/17.
Definition stm32h7xx_hal_tim.h:1156
TIM_BREAK_SYSTEM_PVD
#define TIM_BREAK_SYSTEM_PVD
Enables and locks the PVD connection with TIM1/8/15/16/17 Break Input and also the PVDE and PLS bits ...
Definition stm32h7xx_hal_tim.h:1157
TIM_BREAK_SYSTEM_LOCKUP
#define TIM_BREAK_SYSTEM_LOCKUP
Enables and locks the LOCKUP output of CortexM4 with Break Input of TIM1/8/15/16/17.
Definition stm32h7xx_hal_tim.h:1159
TIM_BREAK_SYSTEM_SRAM_PARITY_ERROR
#define TIM_BREAK_SYSTEM_SRAM_PARITY_ERROR
Enables and locks the SRAM_PARITY error signal with Break Input of TIM1/8/15/16/17.
Definition stm32h7xx_hal_tim.h:1158

Definition at line 2098 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_CCX_CHANNEL

#define IS_TIM_CCX_CHANNEL ( __INSTANCE__,
__CHANNEL__ )
Value:
(IS_TIM_CCX_INSTANCE(__INSTANCE__, __CHANNEL__) && \
((__CHANNEL__) != (TIM_CHANNEL_5)) && \
((__CHANNEL__) != (TIM_CHANNEL_6)))
IS_TIM_CCX_INSTANCE
#define IS_TIM_CCX_INSTANCE(INSTANCE, CHANNEL)
Definition stm32h723xx.h:24000
TIM_CHANNEL_5
#define TIM_CHANNEL_5
Compare channel 5 identifier.
Definition stm32h7xx_hal_tim.h:786
TIM_CHANNEL_6
#define TIM_CHANNEL_6
Compare channel 6 identifier.
Definition stm32h7xx_hal_tim.h:787

Definition at line 1867 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_CHANNELS

#define IS_TIM_CHANNELS ( __CHANNEL__)
Value:
(((__CHANNEL__) == TIM_CHANNEL_1) || \
((__CHANNEL__) == TIM_CHANNEL_2) || \
((__CHANNEL__) == TIM_CHANNEL_3) || \
((__CHANNEL__) == TIM_CHANNEL_4) || \
((__CHANNEL__) == TIM_CHANNEL_5) || \
((__CHANNEL__) == TIM_CHANNEL_6) || \
((__CHANNEL__) == TIM_CHANNEL_ALL))
TIM_CHANNEL_2
#define TIM_CHANNEL_2
Capture/compare channel 2 identifier.
Definition stm32h7xx_hal_tim.h:783
TIM_CHANNEL_3
#define TIM_CHANNEL_3
Capture/compare channel 3 identifier.
Definition stm32h7xx_hal_tim.h:784
TIM_CHANNEL_ALL
#define TIM_CHANNEL_ALL
Global Capture/compare channel identifier.
Definition stm32h7xx_hal_tim.h:788
TIM_CHANNEL_1
#define TIM_CHANNEL_1
Capture/compare channel 1 identifier.
Definition stm32h7xx_hal_tim.h:782
TIM_CHANNEL_4
#define TIM_CHANNEL_4
Capture/compare channel 4 identifier.
Definition stm32h7xx_hal_tim.h:785

Definition at line 1880 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_CLEARINPUT_FILTER

#define IS_TIM_CLEARINPUT_FILTER ( __ICFILTER__)
Value:
((__ICFILTER__) <= 0xFU)

Definition at line 1931 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_CLEARINPUT_POLARITY

#define IS_TIM_CLEARINPUT_POLARITY ( __POLARITY__)
Value:
(((__POLARITY__) == TIM_CLEARINPUTPOLARITY_INVERTED) || \
((__POLARITY__) == TIM_CLEARINPUTPOLARITY_NONINVERTED))
TIM_CLEARINPUTPOLARITY_INVERTED
#define TIM_CLEARINPUTPOLARITY_INVERTED
Polarity for ETRx pin.
Definition stm32h7xx_hal_tim.h:841
TIM_CLEARINPUTPOLARITY_NONINVERTED
#define TIM_CLEARINPUTPOLARITY_NONINVERTED
Polarity for ETRx pin.
Definition stm32h7xx_hal_tim.h:842

Definition at line 1923 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_CLEARINPUT_PRESCALER

#define IS_TIM_CLEARINPUT_PRESCALER ( __PRESCALER__)
Value:
(((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV1) || \
((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV2) || \
((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV4) || \
((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV8))
TIM_CLEARINPUTPRESCALER_DIV8
#define TIM_CLEARINPUTPRESCALER_DIV8
Prescaler for External ETR pin: Capture performed once every 8 events.
Definition stm32h7xx_hal_tim.h:853
TIM_CLEARINPUTPRESCALER_DIV4
#define TIM_CLEARINPUTPRESCALER_DIV4
Prescaler for External ETR pin: Capture performed once every 4 events.
Definition stm32h7xx_hal_tim.h:852
TIM_CLEARINPUTPRESCALER_DIV2
#define TIM_CLEARINPUTPRESCALER_DIV2
Prescaler for External ETR pin: Capture performed once every 2 events.
Definition stm32h7xx_hal_tim.h:851
TIM_CLEARINPUTPRESCALER_DIV1
#define TIM_CLEARINPUTPRESCALER_DIV1
No prescaler is used.
Definition stm32h7xx_hal_tim.h:850

Definition at line 1926 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_CLEARINPUT_SOURCE

#define IS_TIM_CLEARINPUT_SOURCE ( __MODE__)
Value:
(((__MODE__) == TIM_CLEARINPUTSOURCE_NONE) || \
((__MODE__) == TIM_CLEARINPUTSOURCE_ETR))
TIM_CLEARINPUTSOURCE_NONE
#define TIM_CLEARINPUTSOURCE_NONE
OCREF_CLR is disabled.
Definition stm32h7xx_hal_tim.h:459
TIM_CLEARINPUTSOURCE_ETR
#define TIM_CLEARINPUTSOURCE_ETR
OCREF_CLR is connected to ETRF input.
Definition stm32h7xx_hal_tim.h:460

Definition at line 1789 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_CLOCKDIVISION_DIV

#define IS_TIM_CLOCKDIVISION_DIV ( __DIV__)
Value:
(((__DIV__) == TIM_CLOCKDIVISION_DIV1) || \
((__DIV__) == TIM_CLOCKDIVISION_DIV2) || \
((__DIV__) == TIM_CLOCKDIVISION_DIV4))
TIM_CLOCKDIVISION_DIV1
#define TIM_CLOCKDIVISION_DIV1
Clock division: tDTS=tCK_INT.
Definition stm32h7xx_hal_tim.h:570
TIM_CLOCKDIVISION_DIV4
#define TIM_CLOCKDIVISION_DIV4
Clock division: tDTS=4*tCK_INT.
Definition stm32h7xx_hal_tim.h:572
TIM_CLOCKDIVISION_DIV2
#define TIM_CLOCKDIVISION_DIV2
Clock division: tDTS=2*tCK_INT.
Definition stm32h7xx_hal_tim.h:571

Definition at line 1829 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_CLOCKFILTER

#define IS_TIM_CLOCKFILTER ( __ICFILTER__)
Value:
((__ICFILTER__) <= 0xFU)

Definition at line 1921 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_CLOCKPOLARITY

#define IS_TIM_CLOCKPOLARITY ( __POLARITY__)
Value:
(((__POLARITY__) == TIM_CLOCKPOLARITY_INVERTED) || \
((__POLARITY__) == TIM_CLOCKPOLARITY_NONINVERTED) || \
((__POLARITY__) == TIM_CLOCKPOLARITY_RISING) || \
((__POLARITY__) == TIM_CLOCKPOLARITY_FALLING) || \
((__POLARITY__) == TIM_CLOCKPOLARITY_BOTHEDGE))
TIM_CLOCKPOLARITY_RISING
#define TIM_CLOCKPOLARITY_RISING
Polarity for TIx clock sources.
Definition stm32h7xx_hal_tim.h:820
TIM_CLOCKPOLARITY_BOTHEDGE
#define TIM_CLOCKPOLARITY_BOTHEDGE
Polarity for TIx clock sources.
Definition stm32h7xx_hal_tim.h:822
TIM_CLOCKPOLARITY_FALLING
#define TIM_CLOCKPOLARITY_FALLING
Polarity for TIx clock sources.
Definition stm32h7xx_hal_tim.h:821
TIM_CLOCKPOLARITY_NONINVERTED
#define TIM_CLOCKPOLARITY_NONINVERTED
Polarity for ETRx clock sources.
Definition stm32h7xx_hal_tim.h:819
TIM_CLOCKPOLARITY_INVERTED
#define TIM_CLOCKPOLARITY_INVERTED
Polarity for ETRx clock sources.
Definition stm32h7xx_hal_tim.h:818

Definition at line 1910 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_CLOCKPRESCALER

#define IS_TIM_CLOCKPRESCALER ( __PRESCALER__)
Value:
(((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV1) || \
((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV2) || \
((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV4) || \
((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV8))
TIM_CLOCKPRESCALER_DIV4
#define TIM_CLOCKPRESCALER_DIV4
Prescaler for External ETR Clock: Capture performed once every 4 events.
Definition stm32h7xx_hal_tim.h:832
TIM_CLOCKPRESCALER_DIV1
#define TIM_CLOCKPRESCALER_DIV1
No prescaler is used.
Definition stm32h7xx_hal_tim.h:830
TIM_CLOCKPRESCALER_DIV8
#define TIM_CLOCKPRESCALER_DIV8
Prescaler for External ETR Clock: Capture performed once every 8 events.
Definition stm32h7xx_hal_tim.h:833
TIM_CLOCKPRESCALER_DIV2
#define TIM_CLOCKPRESCALER_DIV2
Prescaler for External ETR Clock: Capture performed once every 2 events.
Definition stm32h7xx_hal_tim.h:831

Definition at line 1916 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_CLOCKSOURCE

#define IS_TIM_CLOCKSOURCE ( __CLOCK__)
Value:
(((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
((__CLOCK__) == TIM_CLOCKSOURCE_ITR3))
TIM_CLOCKSOURCE_TI1
#define TIM_CLOCKSOURCE_TI1
External clock source mode 1 (TTI1FP1).
Definition stm32h7xx_hal_tim.h:800
TIM_CLOCKSOURCE_ITR3
#define TIM_CLOCKSOURCE_ITR3
External clock source mode 1 (ITR3).
Definition stm32h7xx_hal_tim.h:805
TIM_CLOCKSOURCE_ITR0
#define TIM_CLOCKSOURCE_ITR0
External clock source mode 1 (ITR0).
Definition stm32h7xx_hal_tim.h:802
TIM_CLOCKSOURCE_TI2
#define TIM_CLOCKSOURCE_TI2
External clock source mode 1 (TTI2FP2).
Definition stm32h7xx_hal_tim.h:801
TIM_CLOCKSOURCE_INTERNAL
#define TIM_CLOCKSOURCE_INTERNAL
Internal clock source.
Definition stm32h7xx_hal_tim.h:796
TIM_CLOCKSOURCE_ETRMODE1
#define TIM_CLOCKSOURCE_ETRMODE1
External clock source mode 1 (ETRF).
Definition stm32h7xx_hal_tim.h:797
TIM_CLOCKSOURCE_ETRMODE2
#define TIM_CLOCKSOURCE_ETRMODE2
External clock source mode 2.
Definition stm32h7xx_hal_tim.h:798
TIM_CLOCKSOURCE_TI1ED
#define TIM_CLOCKSOURCE_TI1ED
External clock source mode 1 (TTI1FP1 + edge detect.).
Definition stm32h7xx_hal_tim.h:799
TIM_CLOCKSOURCE_ITR1
#define TIM_CLOCKSOURCE_ITR1
External clock source mode 1 (ITR1).
Definition stm32h7xx_hal_tim.h:803
TIM_CLOCKSOURCE_ITR2
#define TIM_CLOCKSOURCE_ITR2
External clock source mode 1 (ITR2).
Definition stm32h7xx_hal_tim.h:804

Definition at line 1899 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_COMPLEMENTARY_CHANNELS

#define IS_TIM_COMPLEMENTARY_CHANNELS ( __CHANNEL__)
Value:
(((__CHANNEL__) == TIM_CHANNEL_1) || \
((__CHANNEL__) == TIM_CHANNEL_2) || \
((__CHANNEL__) == TIM_CHANNEL_3))

Definition at line 1895 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_COUNTER_MODE

#define IS_TIM_COUNTER_MODE ( __MODE__)
Value:
(((__MODE__) == TIM_COUNTERMODE_UP) || \
((__MODE__) == TIM_COUNTERMODE_DOWN) || \
((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
TIM_COUNTERMODE_CENTERALIGNED1
#define TIM_COUNTERMODE_CENTERALIGNED1
Center-aligned mode 1.
Definition stm32h7xx_hal_tim.h:551
TIM_COUNTERMODE_DOWN
#define TIM_COUNTERMODE_DOWN
Counter used as down-counter.
Definition stm32h7xx_hal_tim.h:550
TIM_COUNTERMODE_UP
#define TIM_COUNTERMODE_UP
Counter used as up-counter.
Definition stm32h7xx_hal_tim.h:549
TIM_COUNTERMODE_CENTERALIGNED2
#define TIM_COUNTERMODE_CENTERALIGNED2
Center-aligned mode 2.
Definition stm32h7xx_hal_tim.h:552
TIM_COUNTERMODE_CENTERALIGNED3
#define TIM_COUNTERMODE_CENTERALIGNED3
Center-aligned mode 3.
Definition stm32h7xx_hal_tim.h:553

Definition at line 1820 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_DEADTIME

#define IS_TIM_DEADTIME ( __DEADTIME__)
Value:
((__DEADTIME__) <= 0xFFU)

Definition at line 2096 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_DMA_BASE

#define IS_TIM_DMA_BASE ( __BASE__)
Value:
(((__BASE__) == TIM_DMABASE_CR1) || \
((__BASE__) == TIM_DMABASE_CR2) || \
((__BASE__) == TIM_DMABASE_SMCR) || \
((__BASE__) == TIM_DMABASE_DIER) || \
((__BASE__) == TIM_DMABASE_SR) || \
((__BASE__) == TIM_DMABASE_EGR) || \
((__BASE__) == TIM_DMABASE_CCMR1) || \
((__BASE__) == TIM_DMABASE_CCMR2) || \
((__BASE__) == TIM_DMABASE_CCER) || \
((__BASE__) == TIM_DMABASE_CNT) || \
((__BASE__) == TIM_DMABASE_PSC) || \
((__BASE__) == TIM_DMABASE_ARR) || \
((__BASE__) == TIM_DMABASE_RCR) || \
((__BASE__) == TIM_DMABASE_CCR1) || \
((__BASE__) == TIM_DMABASE_CCR2) || \
((__BASE__) == TIM_DMABASE_CCR3) || \
((__BASE__) == TIM_DMABASE_CCR4) || \
((__BASE__) == TIM_DMABASE_BDTR) || \
((__BASE__) == TIM_DMABASE_CCMR3) || \
((__BASE__) == TIM_DMABASE_CCR5) || \
((__BASE__) == TIM_DMABASE_CCR6) || \
((__BASE__) == TIM_DMABASE_AF1) || \
((__BASE__) == TIM_DMABASE_AF2) || \
((__BASE__) == TIM_DMABASE_TISEL))
TIM_DMABASE_CCR2
#define TIM_DMABASE_CCR2
Definition stm32h7xx_hal_tim.h:482
TIM_DMABASE_DIER
#define TIM_DMABASE_DIER
Definition stm32h7xx_hal_tim.h:471
TIM_DMABASE_SMCR
#define TIM_DMABASE_SMCR
Definition stm32h7xx_hal_tim.h:470
TIM_DMABASE_CCR5
#define TIM_DMABASE_CCR5
Definition stm32h7xx_hal_tim.h:489
TIM_DMABASE_CCR1
#define TIM_DMABASE_CCR1
Definition stm32h7xx_hal_tim.h:481
TIM_DMABASE_ARR
#define TIM_DMABASE_ARR
Definition stm32h7xx_hal_tim.h:479
TIM_DMABASE_CCMR3
#define TIM_DMABASE_CCMR3
Definition stm32h7xx_hal_tim.h:488
TIM_DMABASE_CR2
#define TIM_DMABASE_CR2
Definition stm32h7xx_hal_tim.h:469
TIM_DMABASE_CCER
#define TIM_DMABASE_CCER
Definition stm32h7xx_hal_tim.h:476
TIM_DMABASE_TISEL
#define TIM_DMABASE_TISEL
Definition stm32h7xx_hal_tim.h:495
TIM_DMABASE_BDTR
#define TIM_DMABASE_BDTR
Definition stm32h7xx_hal_tim.h:485
TIM_DMABASE_CCR6
#define TIM_DMABASE_CCR6
Definition stm32h7xx_hal_tim.h:490
TIM_DMABASE_CCMR2
#define TIM_DMABASE_CCMR2
Definition stm32h7xx_hal_tim.h:475
TIM_DMABASE_CR1
#define TIM_DMABASE_CR1
Definition stm32h7xx_hal_tim.h:468
TIM_DMABASE_RCR
#define TIM_DMABASE_RCR
Definition stm32h7xx_hal_tim.h:480
TIM_DMABASE_CCMR1
#define TIM_DMABASE_CCMR1
Definition stm32h7xx_hal_tim.h:474
TIM_DMABASE_PSC
#define TIM_DMABASE_PSC
Definition stm32h7xx_hal_tim.h:478
TIM_DMABASE_CCR3
#define TIM_DMABASE_CCR3
Definition stm32h7xx_hal_tim.h:483
TIM_DMABASE_CNT
#define TIM_DMABASE_CNT
Definition stm32h7xx_hal_tim.h:477
TIM_DMABASE_CCR4
#define TIM_DMABASE_CCR4
Definition stm32h7xx_hal_tim.h:484
TIM_DMABASE_SR
#define TIM_DMABASE_SR
Definition stm32h7xx_hal_tim.h:472
TIM_DMABASE_EGR
#define TIM_DMABASE_EGR
Definition stm32h7xx_hal_tim.h:473

Definition at line 1792 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_DMA_DATA_LENGTH

#define IS_TIM_DMA_DATA_LENGTH ( LENGTH)
Value:
(((LENGTH) >= 0x1U) && ((LENGTH) < 0x10000U))

Definition at line 2092 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_DMA_LENGTH

#define IS_TIM_DMA_LENGTH ( __LENGTH__)
Value:
(((__LENGTH__) == TIM_DMABURSTLENGTH_1TRANSFER) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_2TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_3TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_4TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_5TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_6TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_7TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_8TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_9TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_10TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_11TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_12TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_13TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_14TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_15TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_16TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_17TRANSFERS) || \
((__LENGTH__) == TIM_DMABURSTLENGTH_18TRANSFERS))
TIM_DMABURSTLENGTH_13TRANSFERS
#define TIM_DMABURSTLENGTH_13TRANSFERS
The transfer is done to 13 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1118
TIM_DMABURSTLENGTH_14TRANSFERS
#define TIM_DMABURSTLENGTH_14TRANSFERS
The transfer is done to 14 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1119
TIM_DMABURSTLENGTH_9TRANSFERS
#define TIM_DMABURSTLENGTH_9TRANSFERS
The transfer is done to 9 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1114
TIM_DMABURSTLENGTH_5TRANSFERS
#define TIM_DMABURSTLENGTH_5TRANSFERS
The transfer is done to 5 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1110
TIM_DMABURSTLENGTH_1TRANSFER
#define TIM_DMABURSTLENGTH_1TRANSFER
The transfer is done to 1 register starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1106
TIM_DMABURSTLENGTH_10TRANSFERS
#define TIM_DMABURSTLENGTH_10TRANSFERS
The transfer is done to 10 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1115
TIM_DMABURSTLENGTH_11TRANSFERS
#define TIM_DMABURSTLENGTH_11TRANSFERS
The transfer is done to 11 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1116
TIM_DMABURSTLENGTH_6TRANSFERS
#define TIM_DMABURSTLENGTH_6TRANSFERS
The transfer is done to 6 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1111
TIM_DMABURSTLENGTH_15TRANSFERS
#define TIM_DMABURSTLENGTH_15TRANSFERS
The transfer is done to 15 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1120
TIM_DMABURSTLENGTH_4TRANSFERS
#define TIM_DMABURSTLENGTH_4TRANSFERS
The transfer is done to 4 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1109
TIM_DMABURSTLENGTH_2TRANSFERS
#define TIM_DMABURSTLENGTH_2TRANSFERS
The transfer is done to 2 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1107
TIM_DMABURSTLENGTH_18TRANSFERS
#define TIM_DMABURSTLENGTH_18TRANSFERS
The transfer is done to 18 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1123
TIM_DMABURSTLENGTH_8TRANSFERS
#define TIM_DMABURSTLENGTH_8TRANSFERS
The transfer is done to 8 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1113
TIM_DMABURSTLENGTH_17TRANSFERS
#define TIM_DMABURSTLENGTH_17TRANSFERS
The transfer is done to 17 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1122
TIM_DMABURSTLENGTH_3TRANSFERS
#define TIM_DMABURSTLENGTH_3TRANSFERS
The transfer is done to 3 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1108
TIM_DMABURSTLENGTH_7TRANSFERS
#define TIM_DMABURSTLENGTH_7TRANSFERS
The transfer is done to 7 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1112
TIM_DMABURSTLENGTH_16TRANSFERS
#define TIM_DMABURSTLENGTH_16TRANSFERS
The transfer is done to 16 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1121
TIM_DMABURSTLENGTH_12TRANSFERS
#define TIM_DMABURSTLENGTH_12TRANSFERS
The transfer is done to 12 registers starting from TIMx_CR1 + TIMx_DCR.DBA.
Definition stm32h7xx_hal_tim.h:1117

Definition at line 2073 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_DMA_SOURCE

#define IS_TIM_DMA_SOURCE ( __SOURCE__)
Value:
((((__SOURCE__) & 0xFFFF80FFU) == 0x00000000U) && ((__SOURCE__) != 0x00000000U))

Definition at line 1878 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_ENCODER_MODE

#define IS_TIM_ENCODER_MODE ( __MODE__)
Value:
(((__MODE__) == TIM_ENCODERMODE_TI1) || \
((__MODE__) == TIM_ENCODERMODE_TI2) || \
((__MODE__) == TIM_ENCODERMODE_TI12))
TIM_ENCODERMODE_TI12
#define TIM_ENCODERMODE_TI12
Quadrature encoder mode 3, x4 mode, counts up/down on both TI1FP1 and TI2FP2 edges depending on the l...
Definition stm32h7xx_hal_tim.h:704
TIM_ENCODERMODE_TI2
#define TIM_ENCODERMODE_TI2
Quadrature encoder mode 2, x2 mode, counts up/down on TI2FP2 edge depending on TI1FP1 level.
Definition stm32h7xx_hal_tim.h:703
TIM_ENCODERMODE_TI1
#define TIM_ENCODERMODE_TI1
Quadrature encoder mode 1, x2 mode, counts up/down on TI1FP1 edge depending on TI2FP2 level.
Definition stm32h7xx_hal_tim.h:702

Definition at line 1874 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_ENCODERINPUT_POLARITY

#define IS_TIM_ENCODERINPUT_POLARITY ( __POLARITY__)
Value:
(((__POLARITY__) == TIM_ENCODERINPUTPOLARITY_RISING) || \
((__POLARITY__) == TIM_ENCODERINPUTPOLARITY_FALLING))
TIM_ENCODERINPUTPOLARITY_RISING
#define TIM_ENCODERINPUTPOLARITY_RISING
Encoder input with rising edge polarity.
Definition stm32h7xx_hal_tim.h:663
TIM_ENCODERINPUTPOLARITY_FALLING
#define TIM_ENCODERINPUTPOLARITY_FALLING
Encoder input with falling edge polarity.
Definition stm32h7xx_hal_tim.h:664

Definition at line 1851 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_EVENT_SOURCE

#define IS_TIM_EVENT_SOURCE ( __SOURCE__)
Value:
((((__SOURCE__) & 0xFFFFFE00U) == 0x00000000U) && ((__SOURCE__) != 0x00000000U))

Definition at line 1818 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_FAST_STATE

#define IS_TIM_FAST_STATE ( __STATE__)
Value:
(((__STATE__) == TIM_OCFAST_DISABLE) || \
((__STATE__) == TIM_OCFAST_ENABLE))
TIM_OCFAST_ENABLE
#define TIM_OCFAST_ENABLE
Output Compare fast enable.
Definition stm32h7xx_hal_tim.h:600
TIM_OCFAST_DISABLE
#define TIM_OCFAST_DISABLE
Output Compare fast disable.
Definition stm32h7xx_hal_tim.h:599

Definition at line 1836 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_GROUPCH5

#define IS_TIM_GROUPCH5 ( __OCREF__)
Value:
((((__OCREF__) & 0x1FFFFFFFU) == 0x00000000U))

Definition at line 1973 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_IC_FILTER

#define IS_TIM_IC_FILTER ( __ICFILTER__)
Value:
((__ICFILTER__) <= 0xFU)

Definition at line 2094 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_IC_POLARITY

#define IS_TIM_IC_POLARITY ( __POLARITY__)
Value:
(((__POLARITY__) == TIM_ICPOLARITY_RISING) || \
((__POLARITY__) == TIM_ICPOLARITY_FALLING) || \
((__POLARITY__) == TIM_ICPOLARITY_BOTHEDGE))
TIM_ICPOLARITY_BOTHEDGE
#define TIM_ICPOLARITY_BOTHEDGE
Capture triggered by both rising and falling edges on timer input.
Definition stm32h7xx_hal_tim.h:655
TIM_ICPOLARITY_RISING
#define TIM_ICPOLARITY_RISING
Capture triggered by rising edge on timer input.
Definition stm32h7xx_hal_tim.h:653
TIM_ICPOLARITY_FALLING
#define TIM_ICPOLARITY_FALLING
Capture triggered by falling edge on timer input.
Definition stm32h7xx_hal_tim.h:654

Definition at line 1854 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_IC_PRESCALER

#define IS_TIM_IC_PRESCALER ( __PRESCALER__)
Value:
(((__PRESCALER__) == TIM_ICPSC_DIV1) || \
((__PRESCALER__) == TIM_ICPSC_DIV2) || \
((__PRESCALER__) == TIM_ICPSC_DIV4) || \
((__PRESCALER__) == TIM_ICPSC_DIV8))
TIM_ICPSC_DIV2
#define TIM_ICPSC_DIV2
Capture performed once every 2 events.
Definition stm32h7xx_hal_tim.h:683
TIM_ICPSC_DIV8
#define TIM_ICPSC_DIV8
Capture performed once every 8 events.
Definition stm32h7xx_hal_tim.h:685
TIM_ICPSC_DIV1
#define TIM_ICPSC_DIV1
Capture performed each time an edge is detected on the capture input.
Definition stm32h7xx_hal_tim.h:682
TIM_ICPSC_DIV4
#define TIM_ICPSC_DIV4
Capture performed once every 4 events.
Definition stm32h7xx_hal_tim.h:684

Definition at line 1862 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_IC_SELECTION

#define IS_TIM_IC_SELECTION ( __SELECTION__)
Value:
(((__SELECTION__) == TIM_ICSELECTION_DIRECTTI) || \
((__SELECTION__) == TIM_ICSELECTION_INDIRECTTI) || \
((__SELECTION__) == TIM_ICSELECTION_TRC))
TIM_ICSELECTION_TRC
#define TIM_ICSELECTION_TRC
TIM Input 1, 2, 3 or 4 is selected to be connected to TRC.
Definition stm32h7xx_hal_tim.h:674
TIM_ICSELECTION_INDIRECTTI
#define TIM_ICSELECTION_INDIRECTTI
TIM Input 1, 2, 3 or 4 is selected to be connected to IC2, IC1, IC4 or IC3, respectively.
Definition stm32h7xx_hal_tim.h:673
TIM_ICSELECTION_DIRECTTI
#define TIM_ICSELECTION_DIRECTTI
TIM Input 1, 2, 3 or 4 is selected to be connected to IC1, IC2, IC3 or IC4, respectively.
Definition stm32h7xx_hal_tim.h:672

Definition at line 1858 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION

#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION ( __SELECTION__)
Value:
(((__SELECTION__) == TIM_TS_ITR0) || \
((__SELECTION__) == TIM_TS_ITR1) || \
((__SELECTION__) == TIM_TS_ITR2) || \
((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
((__SELECTION__) == TIM_TS_ITR8) || \
((__SELECTION__) == TIM_TS_ITR12) || \
((__SELECTION__) == TIM_TS_ITR13) || \
((__SELECTION__) == TIM_TS_NONE))
TIM_TS_ITR12
#define TIM_TS_ITR12
Internal Trigger 12 (ITR12).
Definition stm32h7xx_hal_tim.h:1060
TIM_TS_NONE
#define TIM_TS_NONE
No trigger selected.
Definition stm32h7xx_hal_tim.h:1066
TIM_TS_ITR6
#define TIM_TS_ITR6
Internal Trigger 6 (ITR6).
Definition stm32h7xx_hal_tim.h:1054
TIM_TS_ITR7
#define TIM_TS_ITR7
Internal Trigger 7 (ITR7).
Definition stm32h7xx_hal_tim.h:1055
TIM_TS_ITR3
#define TIM_TS_ITR3
Internal Trigger 3 (ITR3).
Definition stm32h7xx_hal_tim.h:1051
TIM_TS_ITR2
#define TIM_TS_ITR2
Internal Trigger 2 (ITR2).
Definition stm32h7xx_hal_tim.h:1050
TIM_TS_ITR4
#define TIM_TS_ITR4
Internal Trigger 4 (ITR4).
Definition stm32h7xx_hal_tim.h:1052
TIM_TS_ITR0
#define TIM_TS_ITR0
Internal Trigger 0 (ITR0).
Definition stm32h7xx_hal_tim.h:1048
TIM_TS_ITR8
#define TIM_TS_ITR8
Internal Trigger 8 (ITR8).
Definition stm32h7xx_hal_tim.h:1056
TIM_TS_ITR13
#define TIM_TS_ITR13
Internal Trigger 13 (ITR13).
Definition stm32h7xx_hal_tim.h:1061
TIM_TS_ITR5
#define TIM_TS_ITR5
Internal Trigger 5 (ITR5).
Definition stm32h7xx_hal_tim.h:1053
TIM_TS_ITR1
#define TIM_TS_ITR1
Internal Trigger 1 (ITR1).
Definition stm32h7xx_hal_tim.h:1049

Definition at line 2044 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_LOCK_LEVEL

#define IS_TIM_LOCK_LEVEL ( __LEVEL__)
Value:
(((__LEVEL__) == TIM_LOCKLEVEL_OFF) || \
((__LEVEL__) == TIM_LOCKLEVEL_1) || \
((__LEVEL__) == TIM_LOCKLEVEL_2) || \
((__LEVEL__) == TIM_LOCKLEVEL_3))
TIM_LOCKLEVEL_2
#define TIM_LOCKLEVEL_2
LOCK Level 2.
Definition stm32h7xx_hal_tim.h:880
TIM_LOCKLEVEL_OFF
#define TIM_LOCKLEVEL_OFF
LOCK OFF.
Definition stm32h7xx_hal_tim.h:878
TIM_LOCKLEVEL_1
#define TIM_LOCKLEVEL_1
LOCK Level 1.
Definition stm32h7xx_hal_tim.h:879
TIM_LOCKLEVEL_3
#define TIM_LOCKLEVEL_3
LOCK Level 3.
Definition stm32h7xx_hal_tim.h:881

Definition at line 1939 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_MSM_STATE

#define IS_TIM_MSM_STATE ( __STATE__)
Value:
(((__STATE__) == TIM_MASTERSLAVEMODE_ENABLE) || \
((__STATE__) == TIM_MASTERSLAVEMODE_DISABLE))
TIM_MASTERSLAVEMODE_DISABLE
#define TIM_MASTERSLAVEMODE_DISABLE
Master/slave mode is selected.
Definition stm32h7xx_hal_tim.h:1006
TIM_MASTERSLAVEMODE_ENABLE
#define TIM_MASTERSLAVEMODE_ENABLE
No action.
Definition stm32h7xx_hal_tim.h:1005

Definition at line 2002 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_OC_MODE

#define IS_TIM_OC_MODE ( __MODE__)
Value:
(((__MODE__) == TIM_OCMODE_TIMING) || \
((__MODE__) == TIM_OCMODE_ACTIVE) || \
((__MODE__) == TIM_OCMODE_INACTIVE) || \
((__MODE__) == TIM_OCMODE_TOGGLE) || \
((__MODE__) == TIM_OCMODE_FORCED_ACTIVE) || \
((__MODE__) == TIM_OCMODE_FORCED_INACTIVE) || \
((__MODE__) == TIM_OCMODE_RETRIGERRABLE_OPM1) || \
((__MODE__) == TIM_OCMODE_RETRIGERRABLE_OPM2))
TIM_OCMODE_FORCED_ACTIVE
#define TIM_OCMODE_FORCED_ACTIVE
Force active level.
Definition stm32h7xx_hal_tim.h:1033
TIM_OCMODE_ACTIVE
#define TIM_OCMODE_ACTIVE
Set channel to active level on match.
Definition stm32h7xx_hal_tim.h:1028
TIM_OCMODE_TOGGLE
#define TIM_OCMODE_TOGGLE
Toggle.
Definition stm32h7xx_hal_tim.h:1030
TIM_OCMODE_FORCED_INACTIVE
#define TIM_OCMODE_FORCED_INACTIVE
Force inactive level.
Definition stm32h7xx_hal_tim.h:1034
TIM_OCMODE_RETRIGERRABLE_OPM1
#define TIM_OCMODE_RETRIGERRABLE_OPM1
Retrigerrable OPM mode 1.
Definition stm32h7xx_hal_tim.h:1035
TIM_OCMODE_RETRIGERRABLE_OPM2
#define TIM_OCMODE_RETRIGERRABLE_OPM2
Retrigerrable OPM mode 2.
Definition stm32h7xx_hal_tim.h:1036
TIM_OCMODE_INACTIVE
#define TIM_OCMODE_INACTIVE
Set channel to inactive level on match.
Definition stm32h7xx_hal_tim.h:1029
TIM_OCMODE_TIMING
#define TIM_OCMODE_TIMING
Frozen.
Definition stm32h7xx_hal_tim.h:1027

Definition at line 2019 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_OC_POLARITY

#define IS_TIM_OC_POLARITY ( __POLARITY__)
Value:
(((__POLARITY__) == TIM_OCPOLARITY_HIGH) || \
((__POLARITY__) == TIM_OCPOLARITY_LOW))
TIM_OCPOLARITY_LOW
#define TIM_OCPOLARITY_LOW
Capture/Compare output polarity.
Definition stm32h7xx_hal_tim.h:618
TIM_OCPOLARITY_HIGH
#define TIM_OCPOLARITY_HIGH
Capture/Compare output polarity.
Definition stm32h7xx_hal_tim.h:617

Definition at line 1839 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_OCIDLE_STATE

#define IS_TIM_OCIDLE_STATE ( __STATE__)
Value:
(((__STATE__) == TIM_OCIDLESTATE_SET) || \
((__STATE__) == TIM_OCIDLESTATE_RESET))
TIM_OCIDLESTATE_RESET
#define TIM_OCIDLESTATE_RESET
Output Idle state: OCx=0 when MOE=0.
Definition stm32h7xx_hal_tim.h:636
TIM_OCIDLESTATE_SET
#define TIM_OCIDLESTATE_SET
Output Idle state: OCx=1 when MOE=0.
Definition stm32h7xx_hal_tim.h:635

Definition at line 1845 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_OCN_POLARITY

#define IS_TIM_OCN_POLARITY ( __POLARITY__)
Value:
(((__POLARITY__) == TIM_OCNPOLARITY_HIGH) || \
((__POLARITY__) == TIM_OCNPOLARITY_LOW))
TIM_OCNPOLARITY_HIGH
#define TIM_OCNPOLARITY_HIGH
Capture/Compare complementary output polarity.
Definition stm32h7xx_hal_tim.h:626
TIM_OCNPOLARITY_LOW
#define TIM_OCNPOLARITY_LOW
Capture/Compare complementary output polarity.
Definition stm32h7xx_hal_tim.h:627

Definition at line 1842 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_OCNIDLE_STATE

#define IS_TIM_OCNIDLE_STATE ( __STATE__)
Value:
(((__STATE__) == TIM_OCNIDLESTATE_SET) || \
((__STATE__) == TIM_OCNIDLESTATE_RESET))
TIM_OCNIDLESTATE_SET
#define TIM_OCNIDLESTATE_SET
Complementary output Idle state: OCxN=1 when MOE=0.
Definition stm32h7xx_hal_tim.h:644
TIM_OCNIDLESTATE_RESET
#define TIM_OCNIDLESTATE_RESET
Complementary output Idle state: OCxN=0 when MOE=0.
Definition stm32h7xx_hal_tim.h:645

Definition at line 1848 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_OPM_CHANNELS

#define IS_TIM_OPM_CHANNELS ( __CHANNEL__)
Value:
(((__CHANNEL__) == TIM_CHANNEL_1) || \
((__CHANNEL__) == TIM_CHANNEL_2))

Definition at line 1888 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_OPM_MODE

#define IS_TIM_OPM_MODE ( __MODE__)
Value:
(((__MODE__) == TIM_OPMODE_SINGLE) || \
((__MODE__) == TIM_OPMODE_REPETITIVE))
TIM_OPMODE_REPETITIVE
#define TIM_OPMODE_REPETITIVE
Counter is not stopped at update event.
Definition stm32h7xx_hal_tim.h:694
TIM_OPMODE_SINGLE
#define TIM_OPMODE_SINGLE
Counter stops counting at the next update event.
Definition stm32h7xx_hal_tim.h:693

Definition at line 1871 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_OSSI_STATE

#define IS_TIM_OSSI_STATE ( __STATE__)
Value:
(((__STATE__) == TIM_OSSI_ENABLE) || \
((__STATE__) == TIM_OSSI_DISABLE))
TIM_OSSI_DISABLE
#define TIM_OSSI_DISABLE
When inactive, OC/OCN outputs are disabled (not controlled any longer by the timer).
Definition stm32h7xx_hal_tim.h:871
TIM_OSSI_ENABLE
#define TIM_OSSI_ENABLE
When inactive, OC/OCN outputs are enabled (still controlled by the timer).
Definition stm32h7xx_hal_tim.h:870

Definition at line 1936 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_OSSR_STATE

#define IS_TIM_OSSR_STATE ( __STATE__)
Value:
(((__STATE__) == TIM_OSSR_ENABLE) || \
((__STATE__) == TIM_OSSR_DISABLE))
TIM_OSSR_ENABLE
#define TIM_OSSR_ENABLE
When inactive, OC/OCN outputs are enabled (still controlled by the timer).
Definition stm32h7xx_hal_tim.h:861
TIM_OSSR_DISABLE
#define TIM_OSSR_DISABLE
When inactive, OC/OCN outputs are disabled (not controlled any longer by the timer).
Definition stm32h7xx_hal_tim.h:862

Definition at line 1933 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_PERIOD

#define IS_TIM_PERIOD ( __HANDLE__,
__PERIOD__ )
Value:
((IS_TIM_32B_COUNTER_INSTANCE(((__HANDLE__)->Instance)) == 0U) ? \
(((__PERIOD__) > 0U) && ((__PERIOD__) <= 0x0000FFFFU)) : \
((__PERIOD__) > 0U))
IS_TIM_32B_COUNTER_INSTANCE
#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE)
Definition stm32h723xx.h:24206

Definition at line 1891 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_PWM_MODE

#define IS_TIM_PWM_MODE ( __MODE__)
Value:
(((__MODE__) == TIM_OCMODE_PWM1) || \
((__MODE__) == TIM_OCMODE_PWM2) || \
((__MODE__) == TIM_OCMODE_COMBINED_PWM1) || \
((__MODE__) == TIM_OCMODE_COMBINED_PWM2) || \
((__MODE__) == TIM_OCMODE_ASYMMETRIC_PWM1) || \
((__MODE__) == TIM_OCMODE_ASYMMETRIC_PWM2))
TIM_OCMODE_ASYMMETRIC_PWM2
#define TIM_OCMODE_ASYMMETRIC_PWM2
Asymmetric PWM mode 2.
Definition stm32h7xx_hal_tim.h:1040
TIM_OCMODE_PWM1
#define TIM_OCMODE_PWM1
PWM mode 1.
Definition stm32h7xx_hal_tim.h:1031
TIM_OCMODE_PWM2
#define TIM_OCMODE_PWM2
PWM mode 2.
Definition stm32h7xx_hal_tim.h:1032
TIM_OCMODE_COMBINED_PWM1
#define TIM_OCMODE_COMBINED_PWM1
Combined PWM mode 1.
Definition stm32h7xx_hal_tim.h:1037
TIM_OCMODE_ASYMMETRIC_PWM1
#define TIM_OCMODE_ASYMMETRIC_PWM1
Asymmetric PWM mode 1.
Definition stm32h7xx_hal_tim.h:1039
TIM_OCMODE_COMBINED_PWM2
#define TIM_OCMODE_COMBINED_PWM2
Combined PWM mode 2.
Definition stm32h7xx_hal_tim.h:1038

Definition at line 2012 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_SLAVE_MODE

#define IS_TIM_SLAVE_MODE ( __MODE__)
Value:
(((__MODE__) == TIM_SLAVEMODE_DISABLE) || \
((__MODE__) == TIM_SLAVEMODE_RESET) || \
((__MODE__) == TIM_SLAVEMODE_GATED) || \
((__MODE__) == TIM_SLAVEMODE_TRIGGER) || \
((__MODE__) == TIM_SLAVEMODE_EXTERNAL1) || \
((__MODE__) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER))
TIM_SLAVEMODE_TRIGGER
#define TIM_SLAVEMODE_TRIGGER
Trigger Mode.
Definition stm32h7xx_hal_tim.h:1017
TIM_SLAVEMODE_DISABLE
#define TIM_SLAVEMODE_DISABLE
Slave mode disabled.
Definition stm32h7xx_hal_tim.h:1014
TIM_SLAVEMODE_GATED
#define TIM_SLAVEMODE_GATED
Gated Mode.
Definition stm32h7xx_hal_tim.h:1016
TIM_SLAVEMODE_EXTERNAL1
#define TIM_SLAVEMODE_EXTERNAL1
External Clock Mode 1.
Definition stm32h7xx_hal_tim.h:1018
TIM_SLAVEMODE_RESET
#define TIM_SLAVEMODE_RESET
Reset Mode.
Definition stm32h7xx_hal_tim.h:1015
TIM_SLAVEMODE_COMBINED_RESETTRIGGER
#define TIM_SLAVEMODE_COMBINED_RESETTRIGGER
Combined reset + trigger mode.
Definition stm32h7xx_hal_tim.h:1019

Definition at line 2005 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_SLAVEMODE_TRIGGER_ENABLED

#define IS_TIM_SLAVEMODE_TRIGGER_ENABLED ( __TRIGGER__)
Value:
(((__TRIGGER__) == TIM_SLAVEMODE_TRIGGER) || \
((__TRIGGER__) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER))

Definition at line 2103 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_TI1SELECTION

#define IS_TIM_TI1SELECTION ( __TI1SELECTION__)
Value:
(((__TI1SELECTION__) == TIM_TI1SELECTION_CH1) || \
((__TI1SELECTION__) == TIM_TI1SELECTION_XORCOMBINATION))
TIM_TI1SELECTION_XORCOMBINATION
#define TIM_TI1SELECTION_XORCOMBINATION
The TIMx_CH1, CH2 and CH3 pins are connected to the TI1 input (XOR combination).
Definition stm32h7xx_hal_tim.h:1098
TIM_TI1SELECTION_CH1
#define TIM_TI1SELECTION_CH1
The TIMx_CH1 pin is connected to TI1 input.
Definition stm32h7xx_hal_tim.h:1097

Definition at line 2070 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_TRGO2_SOURCE

#define IS_TIM_TRGO2_SOURCE ( __SOURCE__)
Value:
(((__SOURCE__) == TIM_TRGO2_RESET) || \
((__SOURCE__) == TIM_TRGO2_ENABLE) || \
((__SOURCE__) == TIM_TRGO2_UPDATE) || \
((__SOURCE__) == TIM_TRGO2_OC1) || \
((__SOURCE__) == TIM_TRGO2_OC1REF) || \
((__SOURCE__) == TIM_TRGO2_OC2REF) || \
((__SOURCE__) == TIM_TRGO2_OC3REF) || \
((__SOURCE__) == TIM_TRGO2_OC3REF) || \
((__SOURCE__) == TIM_TRGO2_OC4REF) || \
((__SOURCE__) == TIM_TRGO2_OC5REF) || \
((__SOURCE__) == TIM_TRGO2_OC6REF) || \
((__SOURCE__) == TIM_TRGO2_OC4REF_RISINGFALLING) || \
((__SOURCE__) == TIM_TRGO2_OC6REF_RISINGFALLING) || \
((__SOURCE__) == TIM_TRGO2_OC4REF_RISING_OC6REF_RISING) || \
((__SOURCE__) == TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING) || \
((__SOURCE__) == TIM_TRGO2_OC5REF_RISING_OC6REF_RISING) || \
((__SOURCE__) == TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING))
TIM_TRGO2_OC4REF_RISINGFALLING
#define TIM_TRGO2_OC4REF_RISINGFALLING
OC4REF rising or falling edges generate pulses on TRGO2.
Definition stm32h7xx_hal_tim.h:992
TIM_TRGO2_RESET
#define TIM_TRGO2_RESET
TIMx_EGR.UG bit is used as trigger output (TRGO2).
Definition stm32h7xx_hal_tim.h:982
TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING
#define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING
OC4REF rising or OC6REF falling edges generate pulses on TRGO2.
Definition stm32h7xx_hal_tim.h:995
TIM_TRGO2_OC4REF_RISING_OC6REF_RISING
#define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING
OC4REF or OC6REF rising edges generate pulses on TRGO2.
Definition stm32h7xx_hal_tim.h:994
TIM_TRGO2_OC1
#define TIM_TRGO2_OC1
Capture or a compare match 1 is used as trigger output (TRGO2).
Definition stm32h7xx_hal_tim.h:985
TIM_TRGO2_OC3REF
#define TIM_TRGO2_OC3REF
OC3REF signal is used as trigger output (TRGO2).
Definition stm32h7xx_hal_tim.h:988
TIM_TRGO2_UPDATE
#define TIM_TRGO2_UPDATE
Update event is used as trigger output (TRGO2).
Definition stm32h7xx_hal_tim.h:984
TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING
#define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING
OC5REF or OC6REF rising edges generate pulses on TRGO2.
Definition stm32h7xx_hal_tim.h:997
TIM_TRGO2_OC5REF
#define TIM_TRGO2_OC5REF
OC5REF signal is used as trigger output (TRGO2).
Definition stm32h7xx_hal_tim.h:990
TIM_TRGO2_OC5REF_RISING_OC6REF_RISING
#define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING
OC5REF or OC6REF rising edges generate pulses on TRGO2.
Definition stm32h7xx_hal_tim.h:996
TIM_TRGO2_OC4REF
#define TIM_TRGO2_OC4REF
OC4REF signal is used as trigger output (TRGO2).
Definition stm32h7xx_hal_tim.h:989
TIM_TRGO2_OC2REF
#define TIM_TRGO2_OC2REF
OC2REF signal is used as trigger output (TRGO2).
Definition stm32h7xx_hal_tim.h:987
TIM_TRGO2_ENABLE
#define TIM_TRGO2_ENABLE
TIMx_CR1.CEN bit is used as trigger output (TRGO2).
Definition stm32h7xx_hal_tim.h:983
TIM_TRGO2_OC1REF
#define TIM_TRGO2_OC1REF
OC1REF signal is used as trigger output (TRGO2).
Definition stm32h7xx_hal_tim.h:986
TIM_TRGO2_OC6REF
#define TIM_TRGO2_OC6REF
OC6REF signal is used as trigger output (TRGO2).
Definition stm32h7xx_hal_tim.h:991
TIM_TRGO2_OC6REF_RISINGFALLING
#define TIM_TRGO2_OC6REF_RISINGFALLING
OC6REF rising or falling edges generate pulses on TRGO2.
Definition stm32h7xx_hal_tim.h:993

Definition at line 1984 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_TRGO_SOURCE

#define IS_TIM_TRGO_SOURCE ( __SOURCE__)
Value:
(((__SOURCE__) == TIM_TRGO_RESET) || \
((__SOURCE__) == TIM_TRGO_ENABLE) || \
((__SOURCE__) == TIM_TRGO_UPDATE) || \
((__SOURCE__) == TIM_TRGO_OC1) || \
((__SOURCE__) == TIM_TRGO_OC1REF) || \
((__SOURCE__) == TIM_TRGO_OC2REF) || \
((__SOURCE__) == TIM_TRGO_OC3REF) || \
((__SOURCE__) == TIM_TRGO_OC4REF))
TIM_TRGO_UPDATE
#define TIM_TRGO_UPDATE
Update event is used as trigger output (TRGO).
Definition stm32h7xx_hal_tim.h:969
TIM_TRGO_RESET
#define TIM_TRGO_RESET
TIMx_EGR.UG bit is used as trigger output (TRGO).
Definition stm32h7xx_hal_tim.h:967
TIM_TRGO_ENABLE
#define TIM_TRGO_ENABLE
TIMx_CR1.CEN bit is used as trigger output (TRGO).
Definition stm32h7xx_hal_tim.h:968
TIM_TRGO_OC3REF
#define TIM_TRGO_OC3REF
OC3REF signal is used as trigger output(TRGO).
Definition stm32h7xx_hal_tim.h:973
TIM_TRGO_OC4REF
#define TIM_TRGO_OC4REF
OC4REF signal is used as trigger output(TRGO).
Definition stm32h7xx_hal_tim.h:974
TIM_TRGO_OC1
#define TIM_TRGO_OC1
Capture or a compare match 1 is used as trigger output (TRGO).
Definition stm32h7xx_hal_tim.h:970
TIM_TRGO_OC2REF
#define TIM_TRGO_OC2REF
OC2REF signal is used as trigger output(TRGO).
Definition stm32h7xx_hal_tim.h:972
TIM_TRGO_OC1REF
#define TIM_TRGO_OC1REF
OC1REF signal is used as trigger output (TRGO).
Definition stm32h7xx_hal_tim.h:971

Definition at line 1975 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_TRIGGER_SELECTION

#define IS_TIM_TRIGGER_SELECTION ( __SELECTION__)
Value:
(((__SELECTION__) == TIM_TS_ITR0) || \
((__SELECTION__) == TIM_TS_ITR1) || \
((__SELECTION__) == TIM_TS_ITR2) || \
((__SELECTION__) == TIM_TS_ITR3) || \
((__SELECTION__) == TIM_TS_ITR4) || \
((__SELECTION__) == TIM_TS_ITR5) || \
((__SELECTION__) == TIM_TS_ITR6) || \
((__SELECTION__) == TIM_TS_ITR7) || \
((__SELECTION__) == TIM_TS_ITR8) || \
((__SELECTION__) == TIM_TS_ITR12) || \
((__SELECTION__) == TIM_TS_ITR13) || \
((__SELECTION__) == TIM_TS_TI1F_ED) || \
((__SELECTION__) == TIM_TS_TI1FP1) || \
((__SELECTION__) == TIM_TS_TI2FP2) || \
((__SELECTION__) == TIM_TS_ETRF))
TIM_TS_TI2FP2
#define TIM_TS_TI2FP2
Filtered Timer Input 2 (TI2FP2).
Definition stm32h7xx_hal_tim.h:1064
TIM_TS_TI1FP1
#define TIM_TS_TI1FP1
Filtered Timer Input 1 (TI1FP1).
Definition stm32h7xx_hal_tim.h:1063
TIM_TS_TI1F_ED
#define TIM_TS_TI1F_ED
TI1 Edge Detector (TI1F_ED).
Definition stm32h7xx_hal_tim.h:1062
TIM_TS_ETRF
#define TIM_TS_ETRF
Filtered External Trigger input (ETRF).
Definition stm32h7xx_hal_tim.h:1065

Definition at line 2028 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_TRIGGERFILTER

#define IS_TIM_TRIGGERFILTER ( __ICFILTER__)
Value:
((__ICFILTER__) <= 0xFU)

Definition at line 2068 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_TRIGGERPOLARITY

#define IS_TIM_TRIGGERPOLARITY ( __POLARITY__)
Value:
(((__POLARITY__) == TIM_TRIGGERPOLARITY_INVERTED ) || \
((__POLARITY__) == TIM_TRIGGERPOLARITY_NONINVERTED) || \
((__POLARITY__) == TIM_TRIGGERPOLARITY_RISING ) || \
((__POLARITY__) == TIM_TRIGGERPOLARITY_FALLING ) || \
((__POLARITY__) == TIM_TRIGGERPOLARITY_BOTHEDGE ))
TIM_TRIGGERPOLARITY_INVERTED
#define TIM_TRIGGERPOLARITY_INVERTED
Polarity for ETRx trigger sources.
Definition stm32h7xx_hal_tim.h:1074
TIM_TRIGGERPOLARITY_RISING
#define TIM_TRIGGERPOLARITY_RISING
Polarity for TIxFPx or TI1_ED trigger sources.
Definition stm32h7xx_hal_tim.h:1076
TIM_TRIGGERPOLARITY_FALLING
#define TIM_TRIGGERPOLARITY_FALLING
Polarity for TIxFPx or TI1_ED trigger sources.
Definition stm32h7xx_hal_tim.h:1077
TIM_TRIGGERPOLARITY_BOTHEDGE
#define TIM_TRIGGERPOLARITY_BOTHEDGE
Polarity for TIxFPx or TI1_ED trigger sources.
Definition stm32h7xx_hal_tim.h:1078
TIM_TRIGGERPOLARITY_NONINVERTED
#define TIM_TRIGGERPOLARITY_NONINVERTED
Polarity for ETRx trigger sources.
Definition stm32h7xx_hal_tim.h:1075

Definition at line 2057 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_TRIGGERPRESCALER

#define IS_TIM_TRIGGERPRESCALER ( __PRESCALER__)
Value:
(((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV1) || \
((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV2) || \
((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV4) || \
((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV8))
TIM_TRIGGERPRESCALER_DIV1
#define TIM_TRIGGERPRESCALER_DIV1
No prescaler is used.
Definition stm32h7xx_hal_tim.h:1086
TIM_TRIGGERPRESCALER_DIV2
#define TIM_TRIGGERPRESCALER_DIV2
Prescaler for External ETR Trigger: Capture performed once every 2 events.
Definition stm32h7xx_hal_tim.h:1087
TIM_TRIGGERPRESCALER_DIV4
#define TIM_TRIGGERPRESCALER_DIV4
Prescaler for External ETR Trigger: Capture performed once every 4 events.
Definition stm32h7xx_hal_tim.h:1088
TIM_TRIGGERPRESCALER_DIV8
#define TIM_TRIGGERPRESCALER_DIV8
Prescaler for External ETR Trigger: Capture performed once every 8 events.
Definition stm32h7xx_hal_tim.h:1089

Definition at line 2063 of file stm32h7xx_hal_tim.h.

◆ IS_TIM_UIFREMAP_MODE

#define IS_TIM_UIFREMAP_MODE ( __MODE__)
Value:
(((__MODE__) == TIM_UIFREMAP_DISABLE) || \
((__MODE__) == TIM_UIFREMAP_ENABLE))
TIM_UIFREMAP_ENABLE
#define TIM_UIFREMAP_ENABLE
Update interrupt flag remap enabled.
Definition stm32h7xx_hal_tim.h:562
TIM_UIFREMAP_DISABLE
#define TIM_UIFREMAP_DISABLE
Update interrupt flag remap disabled.
Definition stm32h7xx_hal_tim.h:561

Definition at line 1826 of file stm32h7xx_hal_tim.h.

◆ TIM_CHANNEL_N_STATE_GET

#define TIM_CHANNEL_N_STATE_GET ( __HANDLE__,
__CHANNEL__ )
Value:
(((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelNState[0] :\
((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelNState[1] :\
((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelNState[2] :\
(__HANDLE__)->ChannelNState[3])

Definition at line 2156 of file stm32h7xx_hal_tim.h.

◆ TIM_CHANNEL_N_STATE_SET

#define TIM_CHANNEL_N_STATE_SET ( __HANDLE__,
__CHANNEL__,
__CHANNEL_STATE__ )
Value:
(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->ChannelNState[0] = (__CHANNEL_STATE__)) :\
((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelNState[1] = (__CHANNEL_STATE__)) :\
((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__)) :\
((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__)))

Definition at line 2162 of file stm32h7xx_hal_tim.h.

◆ TIM_CHANNEL_N_STATE_SET_ALL

#define TIM_CHANNEL_N_STATE_SET_ALL ( __HANDLE__,
__CHANNEL_STATE__ )
Value:
do {\
(__HANDLE__)->ChannelNState[0] = (__CHANNEL_STATE__); \
(__HANDLE__)->ChannelNState[1] = (__CHANNEL_STATE__); \
(__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__); \
(__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__); \
} while(0)

Definition at line 2168 of file stm32h7xx_hal_tim.h.

◆ TIM_CHANNEL_STATE_GET

#define TIM_CHANNEL_STATE_GET ( __HANDLE__,
__CHANNEL__ )
Value:
(((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelState[0] :\
((__CHANNEL__) == TIM_CHANNEL_2) ? (__HANDLE__)->ChannelState[1] :\
((__CHANNEL__) == TIM_CHANNEL_3) ? (__HANDLE__)->ChannelState[2] :\
((__CHANNEL__) == TIM_CHANNEL_4) ? (__HANDLE__)->ChannelState[3] :\
((__CHANNEL__) == TIM_CHANNEL_5) ? (__HANDLE__)->ChannelState[4] :\
(__HANDLE__)->ChannelState[5])

Definition at line 2130 of file stm32h7xx_hal_tim.h.

◆ TIM_CHANNEL_STATE_SET

#define TIM_CHANNEL_STATE_SET ( __HANDLE__,
__CHANNEL__,
__CHANNEL_STATE__ )
Value:
(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__)) :\
((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__)) :\
((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__)) :\
((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__)) :\
((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->ChannelState[4] = (__CHANNEL_STATE__)) :\
((__HANDLE__)->ChannelState[5] = (__CHANNEL_STATE__)))

Definition at line 2138 of file stm32h7xx_hal_tim.h.

◆ TIM_CHANNEL_STATE_SET_ALL

#define TIM_CHANNEL_STATE_SET_ALL ( __HANDLE__,
__CHANNEL_STATE__ )
Value:
do {\
(__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__); \
(__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__); \
(__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__); \
(__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \
(__HANDLE__)->ChannelState[4] = (__CHANNEL_STATE__); \
(__HANDLE__)->ChannelState[5] = (__CHANNEL_STATE__); \
} while(0)

Definition at line 2146 of file stm32h7xx_hal_tim.h.

◆ TIM_RESET_CAPTUREPOLARITY

#define TIM_RESET_CAPTUREPOLARITY ( __HANDLE__,
__CHANNEL__ )
Value:
(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) :\
((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) :\
((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP)) :\
((__HANDLE__)->Instance->CCER &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP)))
TIM_CCER_CC1P
#define TIM_CCER_CC1P
Capture/Compare 1 output Polarity.
Definition stm32h723xx.h:19800
TIM_CCER_CC2P
#define TIM_CCER_CC2P
Capture/Compare 2 output Polarity.
Definition stm32h723xx.h:19812
TIM_CCER_CC2NP
#define TIM_CCER_CC2NP
Capture/Compare 2 Complementary output Polarity.
Definition stm32h723xx.h:19818
TIM_CCER_CC4P
#define TIM_CCER_CC4P
Capture/Compare 4 output Polarity.
Definition stm32h723xx.h:19836
TIM_CCER_CC3NP
#define TIM_CCER_CC3NP
Capture/Compare 3 Complementary output Polarity.
Definition stm32h723xx.h:19830
TIM_CCER_CC1NP
#define TIM_CCER_CC1NP
Capture/Compare 1 Complementary output Polarity.
Definition stm32h723xx.h:19806
TIM_CCER_CC4NP
#define TIM_CCER_CC4NP
Capture/Compare 4 Complementary output Polarity.
Definition stm32h723xx.h:19839
TIM_CCER_CC3P
#define TIM_CCER_CC3P
Capture/Compare 3 output Polarity.
Definition stm32h723xx.h:19824

Definition at line 2124 of file stm32h7xx_hal_tim.h.

◆ TIM_RESET_ICPRESCALERVALUE

#define TIM_RESET_ICPRESCALERVALUE ( __HANDLE__,
__CHANNEL__ )
Value:
(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC) :\
((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC) :\
((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC) :\
((__HANDLE__)->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC))
TIM_CCMR1_IC2PSC
#define TIM_CCMR1_IC2PSC
IC2PSC[1:0] bits (Input Capture 2 Prescaler).
Definition stm32h723xx.h:19701
TIM_CCMR2_IC4PSC
#define TIM_CCMR2_IC4PSC
IC4PSC[1:0] bits (Input Capture 4 Prescaler).
Definition stm32h723xx.h:19782
TIM_CCMR1_IC1PSC
#define TIM_CCMR1_IC1PSC
IC1PSC[1:0] bits (Input Capture 1 Prescaler).
Definition stm32h723xx.h:19687
TIM_CCMR2_IC3PSC
#define TIM_CCMR2_IC3PSC
IC3PSC[1:0] bits (Input Capture 3 Prescaler).
Definition stm32h723xx.h:19768

Definition at line 2112 of file stm32h7xx_hal_tim.h.

◆ TIM_SET_CAPTUREPOLARITY

#define TIM_SET_CAPTUREPOLARITY ( __HANDLE__,
__CHANNEL__,
__POLARITY__ )
Value:
(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) :\
((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4U)) :\
((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8U)) :\
((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12U))))

Definition at line 2118 of file stm32h7xx_hal_tim.h.

◆ TIM_SET_ICPRESCALERVALUE

#define TIM_SET_ICPRESCALERVALUE ( __HANDLE__,
__CHANNEL__,
__ICPSC__ )
Value:
(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) :\
((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8U)) :\
((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) :\
((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8U)))

Definition at line 2106 of file stm32h7xx_hal_tim.h.