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EWIC_Type Struct Reference
Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » System Controls not in SCB (SCnSCB) | Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » Implementation Control Block register (ICB) » System Tick Timer (SysTick) » Instrumentation Trace Macrocell (ITM) » Data Watchpoint and Trace (DWT) » Memory System Control Registers (IMPLEMENTATION DEFINED) » Power Mode Control Registers » External Wakeup Interrupt Controller Registers

Structure type to access the External Wakeup Interrupt Controller Registers (EWIC). More...

#include <core_cm55.h>

Public Attributes

__OM uint32_t EVENTSPR
 Offset: 0x000 ( /W) Event Set Pending Register.
uint32_t RESERVED0 [31U]
__IM uint32_t EVENTMASKA
 Offset: 0x080 (R/W) Event Mask A Register.
__IM uint32_t EVENTMASK [15]
 Offset: 0x084 (R/W) Event Mask Register.

Detailed Description

Structure type to access the External Wakeup Interrupt Controller Registers (EWIC).

Definition at line 1570 of file core_cm55.h.

The documentation for this struct was generated from the following files:
  • firmware/Flight_Computer/Drivers/CMSIS/Include/core_cm55.h
  • firmware/Flight_Computer/Drivers/CMSIS/Include/core_cm85.h