Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...

Public Attributes
__IOM uint32_t	ISER [16U]
	Offset: 0x000 (R/W) Interrupt Set Enable Register.
uint32_t	RESERVED0 [16U]
__IOM uint32_t	ICER [16U]
	Offset: 0x080 (R/W) Interrupt Clear Enable Register.
uint32_t	RSERVED1 [16U]
__IOM uint32_t	ISPR [16U]
	Offset: 0x100 (R/W) Interrupt Set Pending Register.
uint32_t	RESERVED2 [16U]
__IOM uint32_t	ICPR [16U]
	Offset: 0x180 (R/W) Interrupt Clear Pending Register.
uint32_t	RESERVED3 [16U]
__IOM uint32_t	IABR [16U]
	Offset: 0x200 (R/W) Interrupt Active bit Register.
uint32_t	RESERVED4 [16U]
__IOM uint32_t	ITNS [16U]
	Offset: 0x280 (R/W) Interrupt Non-Secure State Register.
uint32_t	RESERVED5 [16U]
__IOM uint8_t	IPR [496U]
	Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide).
uint32_t	RESERVED6 [580U]
__OM uint32_t	STIR
	Offset: 0xE00 ( /W) Software Trigger Interrupt Register.
__IOM uint32_t	IPR [124U]
	Offset: 0x300 (R/W) Interrupt Priority Register.
uint32_t	RESERVED1 [31U]
__IOM uint32_t	IP [8U]
	Offset: 0x300 (R/W) Interrupt Priority Register.
__IOM uint8_t	IP [240U]
	Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide).

Detailed Description

Structure type to access the Nested Vectored Interrupt Controller (NVIC).

Definition at line 475 of file core_armv81mml.h.

The documentation for this struct was generated from the following files:

Public Attributes