SysTick Functions

Functions that configure the System. More...

Collaboration diagram for SysTick Functions:

Topics
	ITM Functions
	Functions that access the ITM debug interface.

Variables
uint32_t   APSR_Type::_reserved0:28
	bit: 0..27 Reserved More...
uint32_t   APSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   APSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   APSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   APSR_Type::N:1
	bit: 31 Negative condition code flag More...
struct {
uint32_t   APSR_Type::_reserved0:28
	bit: 0..27 Reserved More...
uint32_t   APSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   APSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   APSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   APSR_Type::N:1
	bit: 31 Negative condition code flag More...
}	APSR_Type::b
	Structure used for bit access.
uint32_t   IPSR_Type::ISR:9
	bit: 0. More...
uint32_t   IPSR_Type::_reserved0:23
	bit: 9..31 Reserved More...
struct {
uint32_t   IPSR_Type::ISR:9
	bit: 0. More...
uint32_t   IPSR_Type::_reserved0:23
	bit: 9..31 Reserved More...
}	IPSR_Type::b
	Structure used for bit access.
uint32_t   xPSR_Type::ISR:9
	bit: 0. More...
uint32_t   xPSR_Type::_reserved0:15
	bit: 9..23 Reserved More...
uint32_t   xPSR_Type::T:1
	bit: 24 Thumb bit (read 0) More...
uint32_t   xPSR_Type::_reserved1:3
	bit: 25..27 Reserved More...
uint32_t   xPSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   xPSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   xPSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   xPSR_Type::N:1
	bit: 31 Negative condition code flag More...
struct {
uint32_t   xPSR_Type::ISR:9
	bit: 0. More...
uint32_t   xPSR_Type::_reserved0:15
	bit: 9..23 Reserved More...
uint32_t   xPSR_Type::T:1
	bit: 24 Thumb bit (read 0) More...
uint32_t   xPSR_Type::_reserved1:3
	bit: 25..27 Reserved More...
uint32_t   xPSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   xPSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   xPSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   xPSR_Type::N:1
	bit: 31 Negative condition code flag More...
}	xPSR_Type::b
	Structure used for bit access.
uint32_t   CONTROL_Type::nPRIV:1
	bit: 0 Execution privilege in Thread mode More...
uint32_t   CONTROL_Type::SPSEL:1
	bit: 1 Stack-pointer select More...
uint32_t   CONTROL_Type::_reserved1:30
	bit: 2..31 Reserved More...
struct {
uint32_t   CONTROL_Type::nPRIV:1
	bit: 0 Execution privilege in Thread mode More...
uint32_t   CONTROL_Type::SPSEL:1
	bit: 1 Stack-pointer select More...
uint32_t   CONTROL_Type::_reserved1:30
	bit: 2..31 Reserved More...
}	CONTROL_Type::b
	Structure used for bit access.
__IOM uint32_t	NVIC_Type::IPR [124U]
	Offset: 0x300 (R/W) Interrupt Priority Register.
uint32_t	SCB_Type::RESERVED0
uint32_t	SCB_Type::RESERVED1
__IOM uint32_t	SCB_Type::SHPR [2U]
	Offset: 0x01C (R/W) System Handlers Priority Registers.
uint32_t	DWT_Type::RESERVED0 [6U]
__IOM uint32_t   MPU_Type::MAIR [2]
__IOM uint32_t   MPU_Type::MAIR0
	Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0. More...
__IOM uint32_t   MPU_Type::MAIR1
	Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1. More...
struct {
__IOM uint32_t   MPU_Type::MAIR0
	Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0. More...
__IOM uint32_t   MPU_Type::MAIR1
	Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1. More...
}
union {
__IOM uint32_t   MPU_Type::MAIR [2]
struct {
__IOM uint32_t   MPU_Type::MAIR0
	Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0. More...
__IOM uint32_t   MPU_Type::MAIR1
	Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1. More...
}
};
uint32_t	CoreDebug_Type::RESERVED0 [1U]
uint32_t	DCB_Type::RESERVED0 [1U]
uint32_t   APSR_Type::_reserved0:28
	bit: 0..27 Reserved More...
uint32_t   APSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   APSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   APSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   APSR_Type::N:1
	bit: 31 Negative condition code flag More...
struct {
uint32_t   APSR_Type::_reserved0:28
	bit: 0..27 Reserved More...
uint32_t   APSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   APSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   APSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   APSR_Type::N:1
	bit: 31 Negative condition code flag More...
}	APSR_Type::b
	Structure used for bit access.
uint32_t   IPSR_Type::ISR:9
	bit: 0. More...
uint32_t   IPSR_Type::_reserved0:23
	bit: 9..31 Reserved More...
struct {
uint32_t   IPSR_Type::ISR:9
	bit: 0. More...
uint32_t   IPSR_Type::_reserved0:23
	bit: 9..31 Reserved More...
}	IPSR_Type::b
	Structure used for bit access.
uint32_t   xPSR_Type::ISR:9
	bit: 0. More...
uint32_t   xPSR_Type::_reserved0:15
	bit: 9..23 Reserved More...
uint32_t   xPSR_Type::T:1
	bit: 24 Thumb bit (read 0) More...
uint32_t   xPSR_Type::_reserved1:3
	bit: 25..27 Reserved More...
uint32_t   xPSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   xPSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   xPSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   xPSR_Type::N:1
	bit: 31 Negative condition code flag More...
struct {
uint32_t   xPSR_Type::ISR:9
	bit: 0. More...
uint32_t   xPSR_Type::_reserved0:15
	bit: 9..23 Reserved More...
uint32_t   xPSR_Type::T:1
	bit: 24 Thumb bit (read 0) More...
uint32_t   xPSR_Type::_reserved1:3
	bit: 25..27 Reserved More...
uint32_t   xPSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   xPSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   xPSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   xPSR_Type::N:1
	bit: 31 Negative condition code flag More...
}	xPSR_Type::b
	Structure used for bit access.
uint32_t   CONTROL_Type::_reserved0:1
	bit: 0 Reserved More...
uint32_t   CONTROL_Type::SPSEL:1
	bit: 1 Stack to be used More...
uint32_t   CONTROL_Type::_reserved1:30
	bit: 2..31 Reserved More...
struct {
uint32_t   CONTROL_Type::_reserved0:1
	bit: 0 Reserved More...
uint32_t   CONTROL_Type::SPSEL:1
	bit: 1 Stack to be used More...
uint32_t   CONTROL_Type::_reserved1:30
	bit: 2..31 Reserved More...
}	CONTROL_Type::b
	Structure used for bit access.
uint32_t	NVIC_Type::RESERVED1 [31U]
__IOM uint32_t	NVIC_Type::IP [8U]
	Offset: 0x300 (R/W) Interrupt Priority Register.
__IOM uint32_t	SCB_Type::SHP [2U]
	Offset: 0x01C (R/W) System Handlers Priority Registers.
uint32_t   APSR_Type::_reserved0:28
	bit: 0..27 Reserved More...
uint32_t   APSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   APSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   APSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   APSR_Type::N:1
	bit: 31 Negative condition code flag More...
struct {
uint32_t   APSR_Type::_reserved0:28
	bit: 0..27 Reserved More...
uint32_t   APSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   APSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   APSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   APSR_Type::N:1
	bit: 31 Negative condition code flag More...
}	APSR_Type::b
	Structure used for bit access.
uint32_t   IPSR_Type::ISR:9
	bit: 0. More...
uint32_t   IPSR_Type::_reserved0:23
	bit: 9..31 Reserved More...
struct {
uint32_t   IPSR_Type::ISR:9
	bit: 0. More...
uint32_t   IPSR_Type::_reserved0:23
	bit: 9..31 Reserved More...
}	IPSR_Type::b
	Structure used for bit access.
uint32_t   xPSR_Type::ISR:9
	bit: 0. More...
uint32_t   xPSR_Type::_reserved0:15
	bit: 9..23 Reserved More...
uint32_t   xPSR_Type::T:1
	bit: 24 Thumb bit (read 0) More...
uint32_t   xPSR_Type::_reserved1:3
	bit: 25..27 Reserved More...
uint32_t   xPSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   xPSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   xPSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   xPSR_Type::N:1
	bit: 31 Negative condition code flag More...
struct {
uint32_t   xPSR_Type::ISR:9
	bit: 0. More...
uint32_t   xPSR_Type::_reserved0:15
	bit: 9..23 Reserved More...
uint32_t   xPSR_Type::T:1
	bit: 24 Thumb bit (read 0) More...
uint32_t   xPSR_Type::_reserved1:3
	bit: 25..27 Reserved More...
uint32_t   xPSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   xPSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   xPSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   xPSR_Type::N:1
	bit: 31 Negative condition code flag More...
}	xPSR_Type::b
	Structure used for bit access.
uint32_t   CONTROL_Type::nPRIV:1
	bit: 0 Execution privilege in Thread mode More...
uint32_t   CONTROL_Type::SPSEL:1
	bit: 1 Stack to be used More...
uint32_t   CONTROL_Type::_reserved1:30
	bit: 2..31 Reserved More...
struct {
uint32_t   CONTROL_Type::nPRIV:1
	bit: 0 Execution privilege in Thread mode More...
uint32_t   CONTROL_Type::SPSEL:1
	bit: 1 Stack to be used More...
uint32_t   CONTROL_Type::_reserved1:30
	bit: 2..31 Reserved More...
}	CONTROL_Type::b
	Structure used for bit access.
__IOM uint32_t	MPU_Type::RASR
	Offset: 0x010 (R/W) MPU Region Attribute and Size Register.
uint32_t   APSR_Type::_reserved0:28
	bit: 0..27 Reserved More...
uint32_t   APSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   APSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   APSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   APSR_Type::N:1
	bit: 31 Negative condition code flag More...
struct {
uint32_t   APSR_Type::_reserved0:28
	bit: 0..27 Reserved More...
uint32_t   APSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   APSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   APSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   APSR_Type::N:1
	bit: 31 Negative condition code flag More...
}	APSR_Type::b
	Structure used for bit access.
uint32_t   IPSR_Type::ISR:9
	bit: 0. More...
uint32_t   IPSR_Type::_reserved0:23
	bit: 9..31 Reserved More...
struct {
uint32_t   IPSR_Type::ISR:9
	bit: 0. More...
uint32_t   IPSR_Type::_reserved0:23
	bit: 9..31 Reserved More...
}	IPSR_Type::b
	Structure used for bit access.
uint32_t   xPSR_Type::ISR:9
	bit: 0. More...
uint32_t   xPSR_Type::_reserved0:15
	bit: 9..23 Reserved More...
uint32_t   xPSR_Type::T:1
	bit: 24 Thumb bit (read 0) More...
uint32_t   xPSR_Type::_reserved1:3
	bit: 25..27 Reserved More...
uint32_t   xPSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   xPSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   xPSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   xPSR_Type::N:1
	bit: 31 Negative condition code flag More...
struct {
uint32_t   xPSR_Type::ISR:9
	bit: 0. More...
uint32_t   xPSR_Type::_reserved0:15
	bit: 9..23 Reserved More...
uint32_t   xPSR_Type::T:1
	bit: 24 Thumb bit (read 0) More...
uint32_t   xPSR_Type::_reserved1:3
	bit: 25..27 Reserved More...
uint32_t   xPSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   xPSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   xPSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   xPSR_Type::N:1
	bit: 31 Negative condition code flag More...
}	xPSR_Type::b
	Structure used for bit access.
uint32_t   CONTROL_Type::_reserved0:1
	bit: 0 Reserved More...
uint32_t   CONTROL_Type::SPSEL:1
	bit: 1 Stack to be used More...
uint32_t   CONTROL_Type::_reserved1:30
	bit: 2..31 Reserved More...
struct {
uint32_t   CONTROL_Type::_reserved0:1
	bit: 0 Reserved More...
uint32_t   CONTROL_Type::SPSEL:1
	bit: 1 Stack to be used More...
uint32_t   CONTROL_Type::_reserved1:30
	bit: 2..31 Reserved More...
}	CONTROL_Type::b
	Structure used for bit access.
uint32_t   APSR_Type::_reserved0:28
	bit: 0..27 Reserved More...
uint32_t   APSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   APSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   APSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   APSR_Type::N:1
	bit: 31 Negative condition code flag More...
struct {
uint32_t   APSR_Type::_reserved0:28
	bit: 0..27 Reserved More...
uint32_t   APSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   APSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   APSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   APSR_Type::N:1
	bit: 31 Negative condition code flag More...
}	APSR_Type::b
	Structure used for bit access.
uint32_t   IPSR_Type::ISR:9
	bit: 0. More...
uint32_t   IPSR_Type::_reserved0:23
	bit: 9..31 Reserved More...
struct {
uint32_t   IPSR_Type::ISR:9
	bit: 0. More...
uint32_t   IPSR_Type::_reserved0:23
	bit: 9..31 Reserved More...
}	IPSR_Type::b
	Structure used for bit access.
uint32_t   xPSR_Type::ISR:9
	bit: 0. More...
uint32_t   xPSR_Type::_reserved0:15
	bit: 9..23 Reserved More...
uint32_t   xPSR_Type::T:1
	bit: 24 Thumb bit (read 0) More...
uint32_t   xPSR_Type::_reserved1:3
	bit: 25..27 Reserved More...
uint32_t   xPSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   xPSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   xPSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   xPSR_Type::N:1
	bit: 31 Negative condition code flag More...
struct {
uint32_t   xPSR_Type::ISR:9
	bit: 0. More...
uint32_t   xPSR_Type::_reserved0:15
	bit: 9..23 Reserved More...
uint32_t   xPSR_Type::T:1
	bit: 24 Thumb bit (read 0) More...
uint32_t   xPSR_Type::_reserved1:3
	bit: 25..27 Reserved More...
uint32_t   xPSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   xPSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   xPSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   xPSR_Type::N:1
	bit: 31 Negative condition code flag More...
}	xPSR_Type::b
	Structure used for bit access.
uint32_t   CONTROL_Type::nPRIV:1
	bit: 0 Execution privilege in Thread mode More...
uint32_t   CONTROL_Type::SPSEL:1
	bit: 1 Stack-pointer select More...
uint32_t   CONTROL_Type::_reserved1:30
	bit: 2..31 Reserved More...
struct {
uint32_t   CONTROL_Type::nPRIV:1
	bit: 0 Execution privilege in Thread mode More...
uint32_t   CONTROL_Type::SPSEL:1
	bit: 1 Stack-pointer select More...
uint32_t   CONTROL_Type::_reserved1:30
	bit: 2..31 Reserved More...
}	CONTROL_Type::b
	Structure used for bit access.
__IM uint32_t	TPI_Type::TRIGGER
	Offset: 0xEE8 (R/ ) TRIGGER Register.
__IM uint32_t	TPI_Type::ITFTTD0
	Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register.
__IOM uint32_t	TPI_Type::ITATBCTR2
	Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2.
__IM uint32_t	TPI_Type::ITATBCTR0
	Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0.
__IM uint32_t	TPI_Type::ITFTTD1
	Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register.
__IOM uint32_t	TPI_Type::ITCTRL
	Offset: 0xF00 (R/W) Integration Mode Control.
uint32_t	TPI_Type::RESERVED5 [39U]
__IOM uint32_t	TPI_Type::CLAIMSET
	Offset: 0xFA0 (R/W) Claim tag set.
__IOM uint32_t	TPI_Type::CLAIMCLR
	Offset: 0xFA4 (R/W) Claim tag clear.
uint32_t	TPI_Type::RESERVED7 [8U]
__IM uint32_t	TPI_Type::DEVID
	Offset: 0xFC8 (R/ ) Device Configuration Register.
__IOM uint32_t   MPU_Type::MAIR [2]
__IOM uint32_t   MPU_Type::MAIR0
	Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0. More...
__IOM uint32_t   MPU_Type::MAIR1
	Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1. More...
struct {
__IOM uint32_t   MPU_Type::MAIR0
	Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0. More...
__IOM uint32_t   MPU_Type::MAIR1
	Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1. More...
}
union {
__IOM uint32_t   MPU_Type::MAIR [2]
struct {
__IOM uint32_t   MPU_Type::MAIR0
	Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0. More...
__IOM uint32_t   MPU_Type::MAIR1
	Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1. More...
}
};
uint32_t   APSR_Type::_reserved0:28
	bit: 0..27 Reserved More...
uint32_t   APSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   APSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   APSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   APSR_Type::N:1
	bit: 31 Negative condition code flag More...
struct {
uint32_t   APSR_Type::_reserved0:28
	bit: 0..27 Reserved More...
uint32_t   APSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   APSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   APSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   APSR_Type::N:1
	bit: 31 Negative condition code flag More...
}	APSR_Type::b
	Structure used for bit access.
uint32_t   IPSR_Type::ISR:9
	bit: 0. More...
uint32_t   IPSR_Type::_reserved0:23
	bit: 9..31 Reserved More...
struct {
uint32_t   IPSR_Type::ISR:9
	bit: 0. More...
uint32_t   IPSR_Type::_reserved0:23
	bit: 9..31 Reserved More...
}	IPSR_Type::b
	Structure used for bit access.
uint32_t   xPSR_Type::ISR:9
	bit: 0. More...
uint32_t   xPSR_Type::_reserved0:15
	bit: 9..23 Reserved More...
uint32_t   xPSR_Type::T:1
	bit: 24 Thumb bit (read 0) More...
uint32_t   xPSR_Type::_reserved1:3
	bit: 25..27 Reserved More...
uint32_t   xPSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   xPSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   xPSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   xPSR_Type::N:1
	bit: 31 Negative condition code flag More...
struct {
uint32_t   xPSR_Type::ISR:9
	bit: 0. More...
uint32_t   xPSR_Type::_reserved0:15
	bit: 9..23 Reserved More...
uint32_t   xPSR_Type::T:1
	bit: 24 Thumb bit (read 0) More...
uint32_t   xPSR_Type::_reserved1:3
	bit: 25..27 Reserved More...
uint32_t   xPSR_Type::V:1
	bit: 28 Overflow condition code flag More...
uint32_t   xPSR_Type::C:1
	bit: 29 Carry condition code flag More...
uint32_t   xPSR_Type::Z:1
	bit: 30 Zero condition code flag More...
uint32_t   xPSR_Type::N:1
	bit: 31 Negative condition code flag More...
}	xPSR_Type::b
	Structure used for bit access.
uint32_t   CONTROL_Type::_reserved0:1
	bit: 0 Reserved More...
uint32_t   CONTROL_Type::SPSEL:1
	bit: 1 Stack to be used More...
uint32_t   CONTROL_Type::_reserved1:30
	bit: 2..31 Reserved More...
struct {
uint32_t   CONTROL_Type::_reserved0:1
	bit: 0 Reserved More...
uint32_t   CONTROL_Type::SPSEL:1
	bit: 1 Stack to be used More...
uint32_t   CONTROL_Type::_reserved1:30
	bit: 2..31 Reserved More...
}	CONTROL_Type::b
	Structure used for bit access.
__IOM uint32_t	SCB_Type::SFCR
	Offset: 0x290 (R/W) Security Features Control Register.
__IOM uint8_t	SCB_Type::SHPR [12U]
	Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15).
__STATIC_INLINE uint32_t	SysTick_Config (uint32_t ticks)
	System Tick Configuration.

Detailed Description

Functions that configure the System.

Function Documentation

SysTick_Config()

__STATIC_INLINE uint32_t SysTick_Config

(

uint32_t

ticks

)

System Tick Configuration.

Initializes the System Timer and its interrupt, and starts the System Tick Timer. Counter is in free running mode to generate periodic interrupts.

Parameters

[in]

ticks

Number of ticks between two interrupts.

Returns

0 Function succeeded.

1 Function failed.

Note

When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function.

Definition at line 4091 of file core_armv81mml.h.

References __NVIC_PRIO_BITS, __STATIC_INLINE, NVIC_SetPriority, SysTick, SysTick_CTRL_CLKSOURCE_Msk, SysTick_CTRL_ENABLE_Msk, SysTick_CTRL_TICKINT_Msk, SysTick_IRQn, and SysTick_LOAD_RELOAD_Msk.

Variable Documentation

[struct]

struct { ... } MPU_Type

[union]

union { ... } MPU_Type

[struct]

struct { ... } MPU_Type

[union]

union { ... } MPU_Type

[] [1/22]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 239 of file core_armv8mbl.h.

[] [2/22]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 203 of file core_cm0.h.

[] [3/22]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 239 of file core_cm23.h.

[] [4/22]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 214 of file core_sc000.h.

[] [5/22]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 214 of file core_cm0plus.h.

[] [6/22]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 203 of file core_cm1.h.

[] [7/22]

uint32_t { ... } ::_reserved0

bit: 0 Reserved

Definition at line 301 of file core_sc000.h.

[] [8/22]

uint32_t { ... } ::_reserved0

bit: 0 Reserved

Definition at line 290 of file core_cm0.h.

[] [9/22]

uint32_t { ... } ::_reserved0

bit: 0 Reserved

Definition at line 290 of file core_cm1.h.

_reserved0 [10/22]

uint32_t CONTROL_Type::_reserved0

bit: 0 Reserved

bit: 3..31 Reserved

Definition at line 290 of file core_cm0.h.

[] [11/22]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 234 of file core_cm1.h.

[] [12/22]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 245 of file core_cm0plus.h.

[] [13/22]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 234 of file core_cm0.h.

[] [14/22]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 245 of file core_sc000.h.

[] [15/22]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 270 of file core_cm23.h.

[] [16/22]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 270 of file core_armv8mbl.h.

[] [17/22]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 288 of file core_cm23.h.

[] [18/22]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 288 of file core_armv8mbl.h.

[] [19/22]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 263 of file core_cm0plus.h.

[] [20/22]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 263 of file core_sc000.h.

[] [21/22]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 252 of file core_cm1.h.

[] [22/22]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 252 of file core_cm0.h.

[] [1/12]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 303 of file core_sc000.h.

[] [2/12]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 292 of file core_cm0.h.

[] [3/12]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 328 of file core_cm23.h.

[] [4/12]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 328 of file core_armv8mbl.h.

[] [5/12]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 303 of file core_cm0plus.h.

[] [6/12]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 292 of file core_cm1.h.

[] [7/12]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 290 of file core_cm23.h.

[] [8/12]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 290 of file core_armv8mbl.h.

[] [9/12]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 265 of file core_cm0plus.h.

[] [10/12]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 265 of file core_sc000.h.

[] [11/12]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 254 of file core_cm1.h.

[] [12/12]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 254 of file core_cm0.h.

[struct] [1/24]

struct { ... } APSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [2/24]

struct { ... } APSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [3/24]

struct { ... } APSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [4/24]

struct { ... } APSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [5/24]

struct { ... } APSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [6/24]

struct { ... } APSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [7/24]

struct { ... } CONTROL_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [8/24]

struct { ... } CONTROL_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [9/24]

struct { ... } CONTROL_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [10/24]

struct { ... } CONTROL_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [11/24]

struct { ... } CONTROL_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [12/24]

struct { ... } CONTROL_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [13/24]

struct { ... } IPSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [14/24]

struct { ... } IPSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [15/24]

struct { ... } IPSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [16/24]

struct { ... } IPSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [17/24]

struct { ... } IPSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [18/24]

struct { ... } IPSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [19/24]

struct { ... } xPSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [20/24]

struct { ... } xPSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [21/24]

struct { ... } xPSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [22/24]

struct { ... } xPSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [23/24]

struct { ... } xPSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[struct] [24/24]

struct { ... } xPSR_Type::b

Structure used for bit access.

Referenced by robust_calibration.GaussMarkovBiasModel::bias_contribution(), robust_calibration.GaussMarkovBiasModel::propagate(), and robust_calibration.GaussMarkovBiasModel::update().

[] [1/12]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 241 of file core_armv8mbl.h.

[] [2/12]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 205 of file core_cm0.h.

[] [3/12]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 241 of file core_cm23.h.

[] [4/12]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 216 of file core_sc000.h.

[] [5/12]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 216 of file core_cm0plus.h.

[] [6/12]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 205 of file core_cm1.h.

[] [7/12]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 292 of file core_cm23.h.

[] [8/12]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 292 of file core_armv8mbl.h.

[] [9/12]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 267 of file core_cm0plus.h.

[] [10/12]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 267 of file core_sc000.h.

[] [11/12]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 256 of file core_cm1.h.

[] [12/12]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 256 of file core_cm0.h.

CLAIMCLR

__IOM uint32_t TPI_Type::CLAIMCLR

Offset: 0xFA4 (R/W) Claim tag clear.

Definition at line 749 of file core_cm23.h.

CLAIMSET

__IOM uint32_t TPI_Type::CLAIMSET

Offset: 0xFA0 (R/W) Claim tag set.

Definition at line 748 of file core_cm23.h.

DEVID

__IM uint32_t TPI_Type::DEVID

Offset: 0xFC8 (R/ ) Device Configuration Register.

Offset: 0xFC8 (R/ ) TPIU_DEVID.

Definition at line 751 of file core_cm23.h.

IP

__IOM uint8_t NVIC_Type::IP

Offset: 0x300 (R/W) Interrupt Priority Register.

Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide).

Definition at line 325 of file core_cm0.h.

IPR

__IOM uint32_t NVIC_Type::IPR[124U]

Offset: 0x300 (R/W) Interrupt Priority Register.

Definition at line 367 of file core_armv8mbl.h.

[] [1/12]

uint32_t { ... } ::ISR

bit: 0.

. 8 Exception number

Definition at line 233 of file core_cm1.h.

[] [2/12]

uint32_t { ... } ::ISR

bit: 0.

. 8 Exception number

Definition at line 244 of file core_cm0plus.h.

[] [3/12]

uint32_t { ... } ::ISR

bit: 0.

. 8 Exception number

Definition at line 233 of file core_cm0.h.

[] [4/12]

uint32_t { ... } ::ISR

bit: 0.

. 8 Exception number

Definition at line 244 of file core_sc000.h.

[] [5/12]

uint32_t { ... } ::ISR

bit: 0.

. 8 Exception number

Definition at line 269 of file core_cm23.h.

[] [6/12]

uint32_t { ... } ::ISR

bit: 0.

. 8 Exception number

Definition at line 269 of file core_armv8mbl.h.

[] [7/12]

uint32_t { ... } ::ISR

bit: 0.

. 8 Exception number

Definition at line 287 of file core_cm23.h.

[] [8/12]

uint32_t { ... } ::ISR

bit: 0.

. 8 Exception number

Definition at line 287 of file core_armv8mbl.h.

[] [9/12]

uint32_t { ... } ::ISR

bit: 0.

. 8 Exception number

Definition at line 262 of file core_cm0plus.h.

[] [10/12]

uint32_t { ... } ::ISR

bit: 0.

. 8 Exception number

Definition at line 262 of file core_sc000.h.

[] [11/12]

uint32_t { ... } ::ISR

bit: 0.

. 8 Exception number

Definition at line 251 of file core_cm1.h.

[] [12/12]

uint32_t { ... } ::ISR

bit: 0.

. 8 Exception number

Definition at line 251 of file core_cm0.h.

ITATBCTR0

__IM uint32_t TPI_Type::ITATBCTR0

Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0.

Offset: 0xEF8 (R/ ) ITATBCTR0.

Definition at line 744 of file core_cm23.h.

ITATBCTR2

__IOM uint32_t TPI_Type::ITATBCTR2

Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2.

Offset: 0xEF0 (R/ ) ITATBCTR2.

Definition at line 742 of file core_cm23.h.

ITCTRL

__IOM uint32_t TPI_Type::ITCTRL

Offset: 0xF00 (R/W) Integration Mode Control.

Definition at line 746 of file core_cm23.h.

ITFTTD0

__IM uint32_t TPI_Type::ITFTTD0

Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register.

Definition at line 741 of file core_cm23.h.

ITFTTD1

__IM uint32_t TPI_Type::ITFTTD1

Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register.

Definition at line 745 of file core_cm23.h.

[] [1/2]

__IOM uint32_t { ... } ::MAIR[2]

Definition at line 910 of file core_cm23.h.

[] [2/2]

__IOM uint32_t { ... } ::MAIR[2]

Definition at line 835 of file core_armv8mbl.h.

[] [1/2]

__IOM uint32_t { ... } ::MAIR0

Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0.

Definition at line 912 of file core_cm23.h.

[] [2/2]

__IOM uint32_t { ... } ::MAIR0

Offset: 0x030 (R/W) MPU Memory Attribute Indirection Register 0.

Definition at line 837 of file core_armv8mbl.h.

[] [1/2]

__IOM uint32_t { ... } ::MAIR1

Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1.

Definition at line 913 of file core_cm23.h.

[] [2/2]

__IOM uint32_t { ... } ::MAIR1

Offset: 0x034 (R/W) MPU Memory Attribute Indirection Register 1.

Definition at line 838 of file core_armv8mbl.h.

[] [1/12]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 243 of file core_armv8mbl.h.

Referenced by engine.control.robust_ddp.data_models.ControllerConfig::__post_init__(), and test_numba_ab_parity.TestRandomizedSweep::test_sweep().

[] [2/12]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 207 of file core_cm0.h.

Referenced by engine.control.robust_ddp.data_models.ControllerConfig::__post_init__(), and test_numba_ab_parity.TestRandomizedSweep::test_sweep().

[] [3/12]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 243 of file core_cm23.h.

Referenced by engine.control.robust_ddp.data_models.ControllerConfig::__post_init__(), and test_numba_ab_parity.TestRandomizedSweep::test_sweep().

[] [4/12]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 218 of file core_sc000.h.

Referenced by engine.control.robust_ddp.data_models.ControllerConfig::__post_init__(), and test_numba_ab_parity.TestRandomizedSweep::test_sweep().

[] [5/12]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 218 of file core_cm0plus.h.

Referenced by engine.control.robust_ddp.data_models.ControllerConfig::__post_init__(), and test_numba_ab_parity.TestRandomizedSweep::test_sweep().

[] [6/12]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 207 of file core_cm1.h.

Referenced by engine.control.robust_ddp.data_models.ControllerConfig::__post_init__(), and test_numba_ab_parity.TestRandomizedSweep::test_sweep().

[] [7/12]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 294 of file core_cm23.h.

Referenced by engine.control.robust_ddp.data_models.ControllerConfig::__post_init__(), and test_numba_ab_parity.TestRandomizedSweep::test_sweep().

[] [8/12]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 294 of file core_armv8mbl.h.

Referenced by engine.control.robust_ddp.data_models.ControllerConfig::__post_init__(), and test_numba_ab_parity.TestRandomizedSweep::test_sweep().

[] [9/12]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 269 of file core_cm0plus.h.

Referenced by engine.control.robust_ddp.data_models.ControllerConfig::__post_init__(), and test_numba_ab_parity.TestRandomizedSweep::test_sweep().

[] [10/12]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 269 of file core_sc000.h.

Referenced by engine.control.robust_ddp.data_models.ControllerConfig::__post_init__(), and test_numba_ab_parity.TestRandomizedSweep::test_sweep().

[] [11/12]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 258 of file core_cm1.h.

Referenced by engine.control.robust_ddp.data_models.ControllerConfig::__post_init__(), and test_numba_ab_parity.TestRandomizedSweep::test_sweep().

[] [12/12]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 258 of file core_cm0.h.

Referenced by engine.control.robust_ddp.data_models.ControllerConfig::__post_init__(), and test_numba_ab_parity.TestRandomizedSweep::test_sweep().

[] [1/3]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 326 of file core_cm23.h.

[] [2/3]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 326 of file core_armv8mbl.h.

[] [3/3]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 301 of file core_cm0plus.h.

RASR

__IOM uint32_t MPU_Type::RASR

Offset: 0x010 (R/W) MPU Region Attribute and Size Register.

Definition at line 530 of file core_cm0plus.h.

RESERVED0 [1/4]

uint32_t CoreDebug_Type::RESERVED0

Definition at line 997 of file core_armv8mbl.h.

RESERVED0 [2/4]

uint32_t DCB_Type::RESERVED0

Definition at line 1098 of file core_armv8mbl.h.

RESERVED0 [3/4]

uint32_t DWT_Type::RESERVED0

Definition at line 615 of file core_armv8mbl.h.

RESERVED0 [4/4]

uint32_t SCB_Type::RESERVED0

Definition at line 390 of file core_armv8mbl.h.

RESERVED1 [1/2]

uint32_t NVIC_Type::RESERVED1

Definition at line 319 of file core_cm0.h.

RESERVED1 [2/2]

uint32_t SCB_Type::RESERVED1

Definition at line 395 of file core_armv8mbl.h.

RESERVED5

uint32_t TPI_Type::RESERVED5

Definition at line 747 of file core_cm23.h.

RESERVED7

uint32_t TPI_Type::RESERVED7

Definition at line 750 of file core_cm23.h.

SFCR

__IOM uint32_t SCB_Type::SFCR

Offset: 0x290 (R/W) Security Features Control Register.

Definition at line 364 of file core_sc000.h.

SHP

__IOM uint8_t SCB_Type::SHP

Offset: 0x01C (R/W) System Handlers Priority Registers.

Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15).

[0] is RESERVED

Definition at line 350 of file core_cm0.h.

SHPR [1/2]

__IOM uint8_t SCB_Type::SHPR

Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15).

Offset: 0x01C (R/W) System Handlers Priority Registers.

[0] is RESERVED

Definition at line 519 of file core_armv81mml.h.

SHPR [2/2]

__IOM uint32_t SCB_Type::SHPR[2U]

Offset: 0x01C (R/W) System Handlers Priority Registers.

[0] is RESERVED

Definition at line 396 of file core_armv8mbl.h.

[] [1/6]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 302 of file core_sc000.h.

[] [2/6]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 291 of file core_cm0.h.

[] [3/6]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 327 of file core_cm23.h.

[] [4/6]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 327 of file core_armv8mbl.h.

[] [5/6]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 302 of file core_cm0plus.h.

[] [6/6]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 291 of file core_cm1.h.

[] [1/6]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 289 of file core_cm23.h.

Referenced by engine.pipeline.thermal.wall_conduction.WallModel::__post_init__(), engine.pipeline.thermal.wall_conduction.WallModel::_interior(), engine.pipeline.thermal.wall_conduction.WallModel::_remap(), engine.pipeline.thermal.wall_conduction.WallModel::_set_capacity(), engine.pipeline.thermal.wall_conduction.WallModel::advance(), engine.pipeline.thermal.wall_conduction.WallModel::depth_of_isotherm(), engine.pipeline.thermal.wall_conduction.WallModel::interface_temperature(), engine.pipeline.thermal.wall_conduction.WallModel::step(), and engine.pipeline.thermal.wall_conduction.WallModel::T_back().

[] [2/6]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 289 of file core_armv8mbl.h.

Referenced by engine.pipeline.thermal.wall_conduction.WallModel::__post_init__(), engine.pipeline.thermal.wall_conduction.WallModel::_interior(), engine.pipeline.thermal.wall_conduction.WallModel::_remap(), engine.pipeline.thermal.wall_conduction.WallModel::_set_capacity(), engine.pipeline.thermal.wall_conduction.WallModel::advance(), engine.pipeline.thermal.wall_conduction.WallModel::depth_of_isotherm(), engine.pipeline.thermal.wall_conduction.WallModel::interface_temperature(), engine.pipeline.thermal.wall_conduction.WallModel::step(), and engine.pipeline.thermal.wall_conduction.WallModel::T_back().

[] [3/6]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 264 of file core_cm0plus.h.

Referenced by engine.pipeline.thermal.wall_conduction.WallModel::__post_init__(), engine.pipeline.thermal.wall_conduction.WallModel::_interior(), engine.pipeline.thermal.wall_conduction.WallModel::_remap(), engine.pipeline.thermal.wall_conduction.WallModel::_set_capacity(), engine.pipeline.thermal.wall_conduction.WallModel::advance(), engine.pipeline.thermal.wall_conduction.WallModel::depth_of_isotherm(), engine.pipeline.thermal.wall_conduction.WallModel::interface_temperature(), engine.pipeline.thermal.wall_conduction.WallModel::step(), and engine.pipeline.thermal.wall_conduction.WallModel::T_back().

[] [4/6]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 264 of file core_sc000.h.

Referenced by engine.pipeline.thermal.wall_conduction.WallModel::__post_init__(), engine.pipeline.thermal.wall_conduction.WallModel::_interior(), engine.pipeline.thermal.wall_conduction.WallModel::_remap(), engine.pipeline.thermal.wall_conduction.WallModel::_set_capacity(), engine.pipeline.thermal.wall_conduction.WallModel::advance(), engine.pipeline.thermal.wall_conduction.WallModel::depth_of_isotherm(), engine.pipeline.thermal.wall_conduction.WallModel::interface_temperature(), engine.pipeline.thermal.wall_conduction.WallModel::step(), and engine.pipeline.thermal.wall_conduction.WallModel::T_back().

[] [5/6]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 253 of file core_cm1.h.

Referenced by engine.pipeline.thermal.wall_conduction.WallModel::__post_init__(), engine.pipeline.thermal.wall_conduction.WallModel::_interior(), engine.pipeline.thermal.wall_conduction.WallModel::_remap(), engine.pipeline.thermal.wall_conduction.WallModel::_set_capacity(), engine.pipeline.thermal.wall_conduction.WallModel::advance(), engine.pipeline.thermal.wall_conduction.WallModel::depth_of_isotherm(), engine.pipeline.thermal.wall_conduction.WallModel::interface_temperature(), engine.pipeline.thermal.wall_conduction.WallModel::step(), and engine.pipeline.thermal.wall_conduction.WallModel::T_back().

[] [6/6]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 253 of file core_cm0.h.

Referenced by engine.pipeline.thermal.wall_conduction.WallModel::__post_init__(), engine.pipeline.thermal.wall_conduction.WallModel::_interior(), engine.pipeline.thermal.wall_conduction.WallModel::_remap(), engine.pipeline.thermal.wall_conduction.WallModel::_set_capacity(), engine.pipeline.thermal.wall_conduction.WallModel::advance(), engine.pipeline.thermal.wall_conduction.WallModel::depth_of_isotherm(), engine.pipeline.thermal.wall_conduction.WallModel::interface_temperature(), engine.pipeline.thermal.wall_conduction.WallModel::step(), and engine.pipeline.thermal.wall_conduction.WallModel::T_back().

TRIGGER

__IM uint32_t TPI_Type::TRIGGER

Offset: 0xEE8 (R/ ) TRIGGER Register.

Definition at line 740 of file core_cm23.h.

[] [1/12]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 240 of file core_armv8mbl.h.

[] [2/12]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 204 of file core_cm0.h.

[] [3/12]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 240 of file core_cm23.h.

[] [4/12]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 215 of file core_sc000.h.

[] [5/12]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 215 of file core_cm0plus.h.

[] [6/12]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 204 of file core_cm1.h.

[] [7/12]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 291 of file core_cm23.h.

[] [8/12]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 291 of file core_armv8mbl.h.

[] [9/12]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 266 of file core_cm0plus.h.

[] [10/12]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 266 of file core_sc000.h.

[] [11/12]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 255 of file core_cm1.h.

[] [12/12]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 255 of file core_cm0.h.

[] [1/12]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 242 of file core_armv8mbl.h.

[] [2/12]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 206 of file core_cm0.h.

[] [3/12]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 242 of file core_cm23.h.

[] [4/12]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 217 of file core_sc000.h.

[] [5/12]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 217 of file core_cm0plus.h.

[] [6/12]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 206 of file core_cm1.h.

[] [7/12]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 293 of file core_cm23.h.

[] [8/12]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 293 of file core_armv8mbl.h.

[] [9/12]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 268 of file core_cm0plus.h.

[] [10/12]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 268 of file core_sc000.h.

[] [11/12]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 257 of file core_cm1.h.

[] [12/12]

uint32_t { ... } ::Z

bit: 30 Zero condition code flag

Definition at line 257 of file core_cm0.h.