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STAR
Cal STAR — firmware, DAQ server, and engine design
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Definitions for base addresses, unions, and structures. More...
Topics | |
| Backwards Compatibility Aliases | |
| Register alias definitions for backwards compatibility. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | ITM_BASE (0xE0000000UL) |
| ITM Base Address. | |
| #define | DWT_BASE (0xE0001000UL) |
| DWT Base Address. | |
| #define | TPI_BASE (0xE0040000UL) |
| TPI Base Address. | |
| #define | DCB_BASE (0xE000EDF0UL) |
| DCB Base Address. | |
| #define | DIB_BASE (0xE000EFB0UL) |
| DIB Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| System control Register not in SCB. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| ITM configuration struct. | |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| DWT configuration struct. | |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| TPI configuration struct. | |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| DCB configuration struct. | |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| DIB configuration struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| Floating Point Unit. | |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| Floating Point Unit. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | DWT_BASE (0xE0001000UL) |
| DWT Base Address. | |
| #define | TPI_BASE (0xE0040000UL) |
| TPI Base Address. | |
| #define | DCB_BASE (0xE000EDF0UL) |
| DCB Base Address. | |
| #define | DIB_BASE (0xE000EFB0UL) |
| DIB Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| DWT configuration struct. | |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| TPI configuration struct. | |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| DCB configuration struct. | |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| DIB configuration struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | ITM_BASE (0xE0000000UL) |
| ITM Base Address. | |
| #define | DWT_BASE (0xE0001000UL) |
| DWT Base Address. | |
| #define | TPI_BASE (0xE0040000UL) |
| TPI Base Address. | |
| #define | DCB_BASE (0xE000EDF0UL) |
| DCB Base Address. | |
| #define | DIB_BASE (0xE000EFB0UL) |
| DIB Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| System control Register not in SCB. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| ITM configuration struct. | |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| DWT configuration struct. | |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| TPI configuration struct. | |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| DCB configuration struct. | |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| DIB configuration struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| Floating Point Unit. | |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| Floating Point Unit. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| System control Register not in SCB. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | DWT_BASE (0xE0001000UL) |
| DWT Base Address. | |
| #define | TPI_BASE (0xE0040000UL) |
| TPI Base Address. | |
| #define | DCB_BASE (0xE000EDF0UL) |
| DCB Base Address. | |
| #define | DIB_BASE (0xE000EFB0UL) |
| DIB Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| DWT configuration struct. | |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| TPI configuration struct. | |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| DCB configuration struct. | |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| DIB configuration struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | ITM_BASE (0xE0000000UL) |
| ITM Base Address. | |
| #define | DWT_BASE (0xE0001000UL) |
| DWT Base Address. | |
| #define | TPI_BASE (0xE0040000UL) |
| TPI Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| System control Register not in SCB. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| ITM configuration struct. | |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| DWT configuration struct. | |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| TPI configuration struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | ITM_BASE (0xE0000000UL) |
| ITM Base Address. | |
| #define | DWT_BASE (0xE0001000UL) |
| DWT Base Address. | |
| #define | TPI_BASE (0xE0040000UL) |
| TPI Base Address. | |
| #define | DCB_BASE (0xE000EDF0UL) |
| DCB Base Address. | |
| #define | DIB_BASE (0xE000EFB0UL) |
| DIB Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| System control Register not in SCB. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| ITM configuration struct. | |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| DWT configuration struct. | |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| TPI configuration struct. | |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| DCB configuration struct. | |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| DIB configuration struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| Floating Point Unit. | |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| Floating Point Unit. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | ITM_BASE (0xE0000000UL) |
| ITM Base Address. | |
| #define | DWT_BASE (0xE0001000UL) |
| DWT Base Address. | |
| #define | TPI_BASE (0xE0040000UL) |
| TPI Base Address. | |
| #define | DCB_BASE (0xE000EDF0UL) |
| DCB Base Address. | |
| #define | DIB_BASE (0xE000EFB0UL) |
| DIB Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| System control Register not in SCB. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| ITM configuration struct. | |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| DWT configuration struct. | |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| TPI configuration struct. | |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| DCB configuration struct. | |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| DIB configuration struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| Floating Point Unit. | |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| Floating Point Unit. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | ITM_BASE (0xE0000000UL) |
| ITM Base Address. | |
| #define | DWT_BASE (0xE0001000UL) |
| DWT Base Address. | |
| #define | TPI_BASE (0xE0040000UL) |
| TPI Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| System control Register not in SCB. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| ITM configuration struct. | |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| DWT configuration struct. | |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| TPI configuration struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| Floating Point Unit. | |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| Floating Point Unit. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | ITM_BASE (0xE0000000UL) |
| ITM Base Address. | |
| #define | DWT_BASE (0xE0001000UL) |
| DWT Base Address. | |
| #define | TPI_BASE (0xE0040000UL) |
| TPI Base Address. | |
| #define | DCB_BASE (0xE000EDF0UL) |
| DCB Base Address. | |
| #define | DIB_BASE (0xE000EFB0UL) |
| DIB Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| ITM configuration struct. | |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| DWT configuration struct. | |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| TPI configuration struct. | |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| DCB configuration struct. | |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| DIB configuration struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| Floating Point Unit. | |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| Floating Point Unit. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | ITM_BASE (0xE0000000UL) |
| ITM Base Address. | |
| #define | DWT_BASE (0xE0001000UL) |
| DWT Base Address. | |
| #define | TPI_BASE (0xE0040000UL) |
| TPI Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| System control Register not in SCB. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| ITM configuration struct. | |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| DWT configuration struct. | |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| TPI configuration struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| Floating Point Unit. | |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| Floating Point Unit. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | ITM_BASE (0xE0000000UL) |
| ITM Base Address. | |
| #define | DWT_BASE (0xE0001000UL) |
| DWT Base Address. | |
| #define | TPI_BASE (0xE0040000UL) |
| TPI Base Address. | |
| #define | DCB_BASE (0xE000EDF0UL) |
| DCB Base Address. | |
| #define | DIB_BASE (0xE000EFB0UL) |
| DIB Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| ITM configuration struct. | |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| DWT configuration struct. | |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| TPI configuration struct. | |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| DCB configuration struct. | |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| DIB configuration struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| Floating Point Unit. | |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| Floating Point Unit. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| System control Register not in SCB. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | ITM_BASE (0xE0000000UL) |
| ITM Base Address. | |
| #define | DWT_BASE (0xE0001000UL) |
| DWT Base Address. | |
| #define | TPI_BASE (0xE0040000UL) |
| TPI Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| System control Register not in SCB. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| ITM configuration struct. | |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| DWT configuration struct. | |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| TPI configuration struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | SCS_BASE (0xE000E000UL) |
| System Control Space Base Address. | |
| #define | ITM_BASE (0xE0000000UL) |
| ITM Base Address. | |
| #define | DWT_BASE (0xE0001000UL) |
| DWT Base Address. | |
| #define | TPI_BASE (0xE0040000UL) |
| TPI Base Address. | |
| #define | DCB_BASE (0xE000EDF0UL) |
| DCB Base Address. | |
| #define | DIB_BASE (0xE000EFB0UL) |
| DIB Base Address. | |
| #define | EMSS_BASE (0xE001E000UL) |
| Enhanced Memory SubSystem Base Address. | |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| SysTick Base Address. | |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| NVIC Base Address. | |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| System Control Block Base Address. | |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| System control Register not in SCB. | |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| SCB configuration struct. | |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| SysTick configuration struct. | |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| NVIC configuration struct. | |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| ITM configuration struct. | |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| DWT configuration struct. | |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| TPI configuration struct. | |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| DCB configuration struct. | |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| DIB configuration struct. | |
| #define | EMSS ((EMSS_Type *) EMSS_BASE ) |
| Ehanced MSS Registers struct. | |
| #define | MPU_BASE (SCS_BASE + 0x0D90UL) |
| Memory Protection Unit. | |
| #define | MPU ((MPU_Type *) MPU_BASE ) |
| Memory Protection Unit. | |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| Floating Point Unit. | |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| Floating Point Unit. | |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| Core Debug Base Address. | |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| Core Debug configuration struct. | |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| Core Debug Base Address. | |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| Core Debug configuration struct. | |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| Core Debug Base Address. | |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| Core Debug configuration struct. | |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| Core Debug Base Address. | |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| Core Debug configuration struct. | |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| Core Debug Base Address. | |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
| Core Debug configuration struct. | |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| Core Debug Base Address. | |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| Core Debug configuration struct. | |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| Core Debug Base Address. | |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| Core Debug configuration struct. | |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| Core Debug Base Address. | |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
| Core Debug configuration struct. | |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| Core Debug Base Address. | |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| Core Debug configuration struct. | |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| Core Debug Base Address. | |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
| Core Debug configuration struct. | |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| Core Debug Base Address. | |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| Core Debug configuration struct. | |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| Core Debug Base Address. | |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
| Core Debug configuration struct. | |
| #define | MEMSYSCTL_BASE (0xE001E000UL) |
| Memory System Control Base Address. | |
| #define | ERRBNK_BASE (0xE001E100UL) |
| Error Banking Base Address. | |
| #define | PWRMODCTL_BASE (0xE001E300UL) |
| Power Mode Control Base Address. | |
| #define | EWIC_BASE (0xE001E400UL) |
| External Wakeup Interrupt Controller Base Address. | |
| #define | PRCCFGINF_BASE (0xE001E700UL) |
| Processor Configuration Information Base Address. | |
| #define | ICB ((ICB_Type *) SCS_BASE ) |
| System control Register not in SCB. | |
| #define | MEMSYSCTL ((MemSysCtl_Type *) MEMSYSCTL_BASE ) |
| Memory System Control configuration struct. | |
| #define | ERRBNK ((ErrBnk_Type *) ERRBNK_BASE ) |
| Error Banking configuration struct. | |
| #define | PWRMODCTL ((PwrModCtl_Type *) PWRMODCTL_BASE ) |
| Power Mode Control configuration struct. | |
| #define | EWIC ((EWIC_Type *) EWIC_BASE ) |
| EWIC configuration struct. | |
| #define | PRCCFGINF ((PrcCfgInf_Type *) PRCCFGINF_BASE ) |
| Processor Configuration Information configuration struct. | |
| #define | MEMSYSCTL_BASE (0xE001E000UL) |
| Memory System Control Base Address. | |
| #define | ERRBNK_BASE (0xE001E100UL) |
| Error Banking Base Address. | |
| #define | PWRMODCTL_BASE (0xE001E300UL) |
| Power Mode Control Base Address. | |
| #define | EWIC_BASE (0xE001E400UL) |
| External Wakeup Interrupt Controller Base Address. | |
| #define | PRCCFGINF_BASE (0xE001E700UL) |
| Processor Configuration Information Base Address. | |
| #define | ICB ((ICB_Type *) SCS_BASE ) |
| System control Register not in SCB. | |
| #define | MEMSYSCTL ((MemSysCtl_Type *) MEMSYSCTL_BASE ) |
| Memory System Control configuration struct. | |
| #define | ERRBNK ((ErrBnk_Type *) ERRBNK_BASE ) |
| Error Banking configuration struct. | |
| #define | PWRMODCTL ((PwrModCtl_Type *) PWRMODCTL_BASE ) |
| Power Mode Control configuration struct. | |
| #define | EWIC ((EWIC_Type *) EWIC_BASE ) |
| EWIC configuration struct. | |
| #define | PRCCFGINF ((PrcCfgInf_Type *) PRCCFGINF_BASE ) |
| Processor Configuration Information configuration struct. | |
| #define | STL_BASE (0xE001E800UL) |
| Software Test Library Base Address. | |
| #define | STL ((STL_Type *) STL_BASE ) |
| Software Test Library configuration struct. | |
Definitions for base addresses, unions, and structures.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct.
Definition at line 3112 of file core_armv81mml.h.
Referenced by board_sleep_init().
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct.
Definition at line 1317 of file core_armv8mbl.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct.
Definition at line 2142 of file core_armv8mml.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct.
Definition at line 1392 of file core_cm23.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
Core Debug configuration struct.
Definition at line 1396 of file core_cm3.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct.
Definition at line 2217 of file core_cm33.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct.
Definition at line 2217 of file core_cm35p.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
Core Debug configuration struct.
Definition at line 1566 of file core_cm4.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct.
Definition at line 3620 of file core_cm55.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
Core Debug configuration struct.
Definition at line 1793 of file core_cm7.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct.
Definition at line 3523 of file core_cm85.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
Core Debug configuration struct.
Definition at line 1379 of file core_sc300.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address.
Definition at line 3098 of file core_armv81mml.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address.
Definition at line 1304 of file core_armv8mbl.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address.
Definition at line 2128 of file core_armv8mml.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address.
Definition at line 1379 of file core_cm23.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address.
Definition at line 1384 of file core_cm3.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address.
Definition at line 2203 of file core_cm33.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address.
Definition at line 2203 of file core_cm35p.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address.
Definition at line 1554 of file core_cm4.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address.
Definition at line 3600 of file core_cm55.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address.
Definition at line 1781 of file core_cm7.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address.
Definition at line 3504 of file core_cm85.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address.
Definition at line 1367 of file core_sc300.h.
DCB configuration struct.
Definition at line 3113 of file core_armv81mml.h.
Referenced by DCB_GetAuthCtrl(), and DCB_SetAuthCtrl().
DCB configuration struct.
Definition at line 1318 of file core_armv8mbl.h.
DCB configuration struct.
Definition at line 2143 of file core_armv8mml.h.
DCB configuration struct.
Definition at line 1393 of file core_cm23.h.
DCB configuration struct.
Definition at line 2218 of file core_cm33.h.
DCB configuration struct.
Definition at line 2218 of file core_cm35p.h.
DCB configuration struct.
Definition at line 3621 of file core_cm55.h.
DCB configuration struct.
Definition at line 3524 of file core_cm85.h.
DCB configuration struct.
Definition at line 2145 of file core_starmc1.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address.
Definition at line 3099 of file core_armv81mml.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address.
Definition at line 1305 of file core_armv8mbl.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address.
Definition at line 2129 of file core_armv8mml.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address.
Definition at line 1380 of file core_cm23.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address.
Definition at line 2204 of file core_cm33.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address.
Definition at line 2204 of file core_cm35p.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address.
Definition at line 3601 of file core_cm55.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address.
Definition at line 3505 of file core_cm85.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address.
Definition at line 2130 of file core_starmc1.h.
DIB configuration struct.
Definition at line 3114 of file core_armv81mml.h.
Referenced by DIB_GetAuthStatus().
DIB configuration struct.
Definition at line 1319 of file core_armv8mbl.h.
DIB configuration struct.
Definition at line 2144 of file core_armv8mml.h.
DIB configuration struct.
Definition at line 1394 of file core_cm23.h.
DIB configuration struct.
Definition at line 2219 of file core_cm33.h.
DIB configuration struct.
Definition at line 2219 of file core_cm35p.h.
DIB configuration struct.
Definition at line 3622 of file core_cm55.h.
DIB configuration struct.
Definition at line 3525 of file core_cm85.h.
DIB configuration struct.
Definition at line 2146 of file core_starmc1.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address.
Definition at line 3100 of file core_armv81mml.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address.
Definition at line 1306 of file core_armv8mbl.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address.
Definition at line 2130 of file core_armv8mml.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address.
Definition at line 1381 of file core_cm23.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address.
Definition at line 2205 of file core_cm33.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address.
Definition at line 2205 of file core_cm35p.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address.
Definition at line 3602 of file core_cm55.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address.
Definition at line 3506 of file core_cm85.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address.
Definition at line 2131 of file core_starmc1.h.
DWT configuration struct.
Definition at line 3110 of file core_armv81mml.h.
DWT configuration struct.
Definition at line 1315 of file core_armv8mbl.h.
DWT configuration struct.
Definition at line 2140 of file core_armv8mml.h.
DWT configuration struct.
Definition at line 1390 of file core_cm23.h.
DWT configuration struct.
Definition at line 1394 of file core_cm3.h.
DWT configuration struct.
Definition at line 2215 of file core_cm33.h.
DWT configuration struct.
Definition at line 2215 of file core_cm35p.h.
DWT configuration struct.
Definition at line 1564 of file core_cm4.h.
DWT configuration struct.
Definition at line 3612 of file core_cm55.h.
DWT configuration struct.
Definition at line 1791 of file core_cm7.h.
DWT configuration struct.
Definition at line 3516 of file core_cm85.h.
DWT configuration struct.
Definition at line 1377 of file core_sc300.h.
DWT configuration struct.
Definition at line 2143 of file core_starmc1.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address.
Definition at line 3096 of file core_armv81mml.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address.
Definition at line 1302 of file core_armv8mbl.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address.
Definition at line 2126 of file core_armv8mml.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address.
Definition at line 1377 of file core_cm23.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address.
Definition at line 1382 of file core_cm3.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address.
Definition at line 2201 of file core_cm33.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address.
Definition at line 2201 of file core_cm35p.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address.
Definition at line 1552 of file core_cm4.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address.
Definition at line 3592 of file core_cm55.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address.
Definition at line 1779 of file core_cm7.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address.
Definition at line 3497 of file core_cm85.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address.
Definition at line 1365 of file core_sc300.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address.
Definition at line 2128 of file core_starmc1.h.
Ehanced MSS Registers struct.
Definition at line 2147 of file core_starmc1.h.
| #define EMSS_BASE (0xE001E000UL) |
Enhanced Memory SubSystem Base Address.
Definition at line 2132 of file core_starmc1.h.
| #define ERRBNK ((ErrBnk_Type *) ERRBNK_BASE ) |
Error Banking configuration struct.
Definition at line 3615 of file core_cm55.h.
| #define ERRBNK ((ErrBnk_Type *) ERRBNK_BASE ) |
Error Banking configuration struct.
Definition at line 3519 of file core_cm85.h.
| #define ERRBNK_BASE (0xE001E100UL) |
Error Banking Base Address.
Definition at line 3594 of file core_cm55.h.
| #define ERRBNK_BASE (0xE001E100UL) |
Error Banking Base Address.
Definition at line 3499 of file core_cm85.h.
EWIC configuration struct.
Definition at line 3617 of file core_cm55.h.
EWIC configuration struct.
Definition at line 3521 of file core_cm85.h.
| #define EWIC_BASE (0xE001E400UL) |
External Wakeup Interrupt Controller Base Address.
Definition at line 3596 of file core_cm55.h.
| #define EWIC_BASE (0xE001E400UL) |
External Wakeup Interrupt Controller Base Address.
Definition at line 3501 of file core_cm85.h.
Floating Point Unit.
Definition at line 3132 of file core_armv81mml.h.
Referenced by SCB_GetFPUType(), and SCB_GetMVEType().
Floating Point Unit.
Definition at line 2157 of file core_armv8mml.h.
Floating Point Unit.
Definition at line 2232 of file core_cm33.h.
Floating Point Unit.
Definition at line 2232 of file core_cm35p.h.
Floating Point Unit.
Definition at line 1574 of file core_cm4.h.
Floating Point Unit.
Definition at line 3640 of file core_cm55.h.
Floating Point Unit.
Definition at line 1801 of file core_cm7.h.
Floating Point Unit.
Definition at line 3543 of file core_cm85.h.
Floating Point Unit.
Definition at line 2160 of file core_starmc1.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit.
Definition at line 3131 of file core_armv81mml.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit.
Definition at line 2156 of file core_armv8mml.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit.
Definition at line 2231 of file core_cm33.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit.
Definition at line 2231 of file core_cm35p.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit.
Definition at line 1573 of file core_cm4.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit.
Definition at line 3639 of file core_cm55.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit.
Definition at line 1800 of file core_cm7.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit.
Definition at line 3542 of file core_cm85.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit.
Definition at line 2159 of file core_starmc1.h.
System control Register not in SCB.
Definition at line 3607 of file core_cm55.h.
System control Register not in SCB.
Definition at line 3511 of file core_cm85.h.
ITM configuration struct.
Definition at line 3109 of file core_armv81mml.h.
Referenced by ITM_SendChar().
ITM configuration struct.
Definition at line 2139 of file core_armv8mml.h.
ITM configuration struct.
Definition at line 1393 of file core_cm3.h.
ITM configuration struct.
Definition at line 2214 of file core_cm33.h.
ITM configuration struct.
Definition at line 2214 of file core_cm35p.h.
ITM configuration struct.
Definition at line 1563 of file core_cm4.h.
ITM configuration struct.
Definition at line 3611 of file core_cm55.h.
ITM configuration struct.
Definition at line 1790 of file core_cm7.h.
ITM configuration struct.
Definition at line 3515 of file core_cm85.h.
ITM configuration struct.
Definition at line 1376 of file core_sc300.h.
ITM configuration struct.
Definition at line 2142 of file core_starmc1.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address.
Definition at line 3095 of file core_armv81mml.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address.
Definition at line 2125 of file core_armv8mml.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address.
Definition at line 1381 of file core_cm3.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address.
Definition at line 2200 of file core_cm33.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address.
Definition at line 2200 of file core_cm35p.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address.
Definition at line 1551 of file core_cm4.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address.
Definition at line 3591 of file core_cm55.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address.
Definition at line 1778 of file core_cm7.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address.
Definition at line 3496 of file core_cm85.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address.
Definition at line 1364 of file core_sc300.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address.
Definition at line 2127 of file core_starmc1.h.
| #define MEMSYSCTL ((MemSysCtl_Type *) MEMSYSCTL_BASE ) |
Memory System Control configuration struct.
Definition at line 3614 of file core_cm55.h.
| #define MEMSYSCTL ((MemSysCtl_Type *) MEMSYSCTL_BASE ) |
Memory System Control configuration struct.
Definition at line 3518 of file core_cm85.h.
| #define MEMSYSCTL_BASE (0xE001E000UL) |
Memory System Control Base Address.
Definition at line 3593 of file core_cm55.h.
| #define MEMSYSCTL_BASE (0xE001E000UL) |
Memory System Control Base Address.
Definition at line 3498 of file core_cm85.h.
Memory Protection Unit.
Definition at line 3118 of file core_armv81mml.h.
Referenced by ARM_MPU_ClrRegion(), ARM_MPU_Disable(), ARM_MPU_Enable(), ARM_MPU_Load(), ARM_MPU_Load(), ARM_MPU_SetMemAttr(), ARM_MPU_SetRegion(), ARM_MPU_SetRegion(), and ARM_MPU_SetRegionEx().
Memory Protection Unit.
Definition at line 1323 of file core_armv8mbl.h.
Memory Protection Unit.
Definition at line 2148 of file core_armv8mml.h.
Memory Protection Unit.
Definition at line 659 of file core_cm0plus.h.
Memory Protection Unit.
Definition at line 1398 of file core_cm23.h.
Memory Protection Unit.
Definition at line 1400 of file core_cm3.h.
Memory Protection Unit.
Definition at line 2223 of file core_cm33.h.
Memory Protection Unit.
Definition at line 2223 of file core_cm35p.h.
Memory Protection Unit.
Definition at line 1570 of file core_cm4.h.
Memory Protection Unit.
Definition at line 3626 of file core_cm55.h.
Memory Protection Unit.
Definition at line 1797 of file core_cm7.h.
Memory Protection Unit.
Definition at line 3529 of file core_cm85.h.
Memory Protection Unit.
Definition at line 674 of file core_sc000.h.
Memory Protection Unit.
Definition at line 1383 of file core_sc300.h.
Memory Protection Unit.
Definition at line 2151 of file core_starmc1.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 3117 of file core_armv81mml.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 1322 of file core_armv8mbl.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 2147 of file core_armv8mml.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 658 of file core_cm0plus.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 1397 of file core_cm23.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 1399 of file core_cm3.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 2222 of file core_cm33.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 2222 of file core_cm35p.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 1569 of file core_cm4.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 3625 of file core_cm55.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 1796 of file core_cm7.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 3528 of file core_cm85.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 673 of file core_sc000.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 1382 of file core_sc300.h.
| #define MPU_BASE (SCS_BASE + 0x0D90UL) |
Memory Protection Unit.
Definition at line 2150 of file core_starmc1.h.
NVIC configuration struct.
Definition at line 3108 of file core_armv81mml.h.
Referenced by __NVIC_ClearPendingIRQ(), __NVIC_DisableIRQ(), __NVIC_EnableIRQ(), __NVIC_GetActive(), __NVIC_GetEnableIRQ(), __NVIC_GetPendingIRQ(), __NVIC_GetPriority(), __NVIC_SetPendingIRQ(), and __NVIC_SetPriority().
NVIC configuration struct.
Definition at line 1314 of file core_armv8mbl.h.
NVIC configuration struct.
Definition at line 2138 of file core_armv8mml.h.
NVIC configuration struct.
Definition at line 541 of file core_cm0.h.
NVIC configuration struct.
Definition at line 655 of file core_cm0plus.h.
NVIC configuration struct.
Definition at line 568 of file core_cm1.h.
NVIC configuration struct.
Definition at line 1389 of file core_cm23.h.
NVIC configuration struct.
Definition at line 1392 of file core_cm3.h.
NVIC configuration struct.
Definition at line 2213 of file core_cm33.h.
NVIC configuration struct.
Definition at line 2213 of file core_cm35p.h.
NVIC configuration struct.
Definition at line 1562 of file core_cm4.h.
NVIC configuration struct.
Definition at line 3610 of file core_cm55.h.
NVIC configuration struct.
Definition at line 1789 of file core_cm7.h.
NVIC configuration struct.
Definition at line 3514 of file core_cm85.h.
NVIC configuration struct.
Definition at line 670 of file core_sc000.h.
NVIC configuration struct.
Definition at line 1375 of file core_sc300.h.
NVIC configuration struct.
Definition at line 2141 of file core_starmc1.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 3102 of file core_armv81mml.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 1308 of file core_armv8mbl.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 2132 of file core_armv8mml.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 536 of file core_cm0.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 650 of file core_cm0plus.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 562 of file core_cm1.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 1383 of file core_cm23.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 1386 of file core_cm3.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 2207 of file core_cm33.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 2207 of file core_cm35p.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 1556 of file core_cm4.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 3604 of file core_cm55.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 1783 of file core_cm7.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 3508 of file core_cm85.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 664 of file core_sc000.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 1369 of file core_sc300.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address.
Definition at line 2135 of file core_starmc1.h.
| #define PRCCFGINF ((PrcCfgInf_Type *) PRCCFGINF_BASE ) |
Processor Configuration Information configuration struct.
Definition at line 3618 of file core_cm55.h.
| #define PRCCFGINF ((PrcCfgInf_Type *) PRCCFGINF_BASE ) |
Processor Configuration Information configuration struct.
Definition at line 3522 of file core_cm85.h.
| #define PRCCFGINF_BASE (0xE001E700UL) |
Processor Configuration Information Base Address.
Definition at line 3597 of file core_cm55.h.
| #define PRCCFGINF_BASE (0xE001E700UL) |
Processor Configuration Information Base Address.
Definition at line 3502 of file core_cm85.h.
| #define PWRMODCTL ((PwrModCtl_Type *) PWRMODCTL_BASE ) |
Power Mode Control configuration struct.
Definition at line 3616 of file core_cm55.h.
| #define PWRMODCTL ((PwrModCtl_Type *) PWRMODCTL_BASE ) |
Power Mode Control configuration struct.
Definition at line 3520 of file core_cm85.h.
| #define PWRMODCTL_BASE (0xE001E300UL) |
Power Mode Control Base Address.
Definition at line 3595 of file core_cm55.h.
| #define PWRMODCTL_BASE (0xE001E300UL) |
Power Mode Control Base Address.
Definition at line 3500 of file core_cm85.h.
SCB configuration struct.
Definition at line 3106 of file core_armv81mml.h.
Referenced by __NVIC_GetPriority(), __NVIC_GetPriorityGrouping(), __NVIC_GetVector(), __NVIC_SetPriority(), __NVIC_SetPriorityGrouping(), __NVIC_SetVector(), __NVIC_SystemReset(), __SW_SystemReset(), ARM_MPU_Disable(), ARM_MPU_Enable(), dcache_on(), HAL_PCD_SuspendCallback(), LL_CPUID_GetConstant(), LL_CPUID_GetImplementer(), LL_CPUID_GetParNo(), LL_CPUID_GetRevision(), LL_CPUID_GetVariant(), LL_HANDLER_DisableFault(), LL_HANDLER_EnableFault(), LL_LPM_DisableEventOnPend(), LL_LPM_DisableSleepOnExit(), LL_LPM_EnableDeepSleep(), LL_LPM_EnableEventOnPend(), LL_LPM_EnableSleep(), LL_LPM_EnableSleepOnExit(), SCB_CleanDCache(), SCB_CleanDCache_by_Addr(), SCB_CleanDCache_by_Addr(), SCB_CleanInvalidateDCache(), SCB_CleanInvalidateDCache_by_Addr(), SCB_CleanInvalidateDCache_by_Addr(), SCB_DisableDCache(), SCB_DisableICache(), SCB_EnableDCache(), SCB_EnableICache(), SCB_InvalidateDCache(), SCB_InvalidateDCache_by_Addr(), SCB_InvalidateDCache_by_Addr(), SCB_InvalidateICache(), SCB_InvalidateICache_by_Addr(), SCB_InvalidateICache_by_Addr(), and SystemInit().
SCB configuration struct.
Definition at line 1312 of file core_armv8mbl.h.
SCB configuration struct.
Definition at line 2136 of file core_armv8mml.h.
SCB configuration struct.
Definition at line 539 of file core_cm0.h.
SCB configuration struct.
Definition at line 653 of file core_cm0plus.h.
SCB configuration struct.
Definition at line 566 of file core_cm1.h.
SCB configuration struct.
Definition at line 1387 of file core_cm23.h.
SCB configuration struct.
Definition at line 1390 of file core_cm3.h.
SCB configuration struct.
Definition at line 2211 of file core_cm33.h.
SCB configuration struct.
Definition at line 2211 of file core_cm35p.h.
SCB configuration struct.
Definition at line 1560 of file core_cm4.h.
SCB configuration struct.
Definition at line 3608 of file core_cm55.h.
SCB configuration struct.
Definition at line 1787 of file core_cm7.h.
SCB configuration struct.
Definition at line 3512 of file core_cm85.h.
SCB configuration struct.
Definition at line 668 of file core_sc000.h.
SCB configuration struct.
Definition at line 1373 of file core_sc300.h.
SCB configuration struct.
Definition at line 2139 of file core_starmc1.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 3103 of file core_armv81mml.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 1309 of file core_armv8mbl.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 2133 of file core_armv8mml.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 537 of file core_cm0.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 651 of file core_cm0plus.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 563 of file core_cm1.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 1384 of file core_cm23.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 1387 of file core_cm3.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 2208 of file core_cm33.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 2208 of file core_cm35p.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 1557 of file core_cm4.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 3605 of file core_cm55.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 1784 of file core_cm7.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 3509 of file core_cm85.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 665 of file core_sc000.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 1370 of file core_sc300.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address.
Definition at line 2136 of file core_starmc1.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB.
Definition at line 3105 of file core_armv81mml.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB.
Definition at line 2135 of file core_armv8mml.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB.
Definition at line 565 of file core_cm1.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB.
Definition at line 1389 of file core_cm3.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB.
Definition at line 2210 of file core_cm33.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB.
Definition at line 2210 of file core_cm35p.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB.
Definition at line 1559 of file core_cm4.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB.
Definition at line 1786 of file core_cm7.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB.
Definition at line 667 of file core_sc000.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB.
Definition at line 1372 of file core_sc300.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB.
Definition at line 2138 of file core_starmc1.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 3094 of file core_armv81mml.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 1301 of file core_armv8mbl.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 2124 of file core_armv8mml.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 534 of file core_cm0.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 648 of file core_cm0plus.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 560 of file core_cm1.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 1376 of file core_cm23.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 1380 of file core_cm3.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 2199 of file core_cm33.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 2199 of file core_cm35p.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 1550 of file core_cm4.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 3590 of file core_cm55.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 1777 of file core_cm7.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 3495 of file core_cm85.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 662 of file core_sc000.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 1363 of file core_sc300.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address.
Definition at line 2126 of file core_starmc1.h.
Software Test Library configuration struct.
Definition at line 3619 of file core_cm55.h.
| #define STL_BASE (0xE001E800UL) |
Software Test Library Base Address.
Definition at line 3598 of file core_cm55.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 3107 of file core_armv81mml.h.
Referenced by board_sleep(), HAL_ResumeTick(), HAL_SuspendTick(), LL_InitTick(), LL_SYSTICK_DisableIT(), LL_SYSTICK_EnableIT(), LL_SYSTICK_GetClkSource(), LL_SYSTICK_IsActiveCounterFlag(), LL_SYSTICK_IsEnabledIT(), LL_SYSTICK_SetClkSource(), OS_Tick_GetCount(), OS_Tick_GetInterval(), OS_Tick_GetOverflow(), and SysTick_Config().
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 1313 of file core_armv8mbl.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 2137 of file core_armv8mml.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 540 of file core_cm0.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 654 of file core_cm0plus.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 567 of file core_cm1.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 1388 of file core_cm23.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 1391 of file core_cm3.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 2212 of file core_cm33.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 2212 of file core_cm35p.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 1561 of file core_cm4.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 3609 of file core_cm55.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 1788 of file core_cm7.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 3513 of file core_cm85.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 669 of file core_sc000.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 1374 of file core_sc300.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct.
Definition at line 2140 of file core_starmc1.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 3101 of file core_armv81mml.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 1307 of file core_armv8mbl.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 2131 of file core_armv8mml.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 535 of file core_cm0.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 649 of file core_cm0plus.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 561 of file core_cm1.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 1382 of file core_cm23.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 1385 of file core_cm3.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 2206 of file core_cm33.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 2206 of file core_cm35p.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 1555 of file core_cm4.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 3603 of file core_cm55.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 1782 of file core_cm7.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 3507 of file core_cm85.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 663 of file core_sc000.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 1368 of file core_sc300.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address.
Definition at line 2134 of file core_starmc1.h.
TPI configuration struct.
Definition at line 3111 of file core_armv81mml.h.
TPI configuration struct.
Definition at line 1316 of file core_armv8mbl.h.
TPI configuration struct.
Definition at line 2141 of file core_armv8mml.h.
TPI configuration struct.
Definition at line 1391 of file core_cm23.h.
TPI configuration struct.
Definition at line 1395 of file core_cm3.h.
TPI configuration struct.
Definition at line 2216 of file core_cm33.h.
TPI configuration struct.
Definition at line 2216 of file core_cm35p.h.
TPI configuration struct.
Definition at line 1565 of file core_cm4.h.
TPI configuration struct.
Definition at line 3613 of file core_cm55.h.
TPI configuration struct.
Definition at line 1792 of file core_cm7.h.
TPI configuration struct.
Definition at line 3517 of file core_cm85.h.
TPI configuration struct.
Definition at line 1378 of file core_sc300.h.
TPI configuration struct.
Definition at line 2144 of file core_starmc1.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address.
Definition at line 3097 of file core_armv81mml.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address.
Definition at line 1303 of file core_armv8mbl.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address.
Definition at line 2127 of file core_armv8mml.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address.
Definition at line 1378 of file core_cm23.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address.
Definition at line 1383 of file core_cm3.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address.
Definition at line 2202 of file core_cm33.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address.
Definition at line 2202 of file core_cm35p.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address.
Definition at line 1553 of file core_cm4.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address.
Definition at line 3599 of file core_cm55.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address.
Definition at line 1780 of file core_cm7.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address.
Definition at line 3503 of file core_cm85.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address.
Definition at line 1366 of file core_sc300.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address.
Definition at line 2129 of file core_starmc1.h.